Tiago Medicci Serrano a71a3258b7 esp32s3/ble: enable the BLE interrupt during a SPI flash operation ... This commit sets the BLE's interrupt as a IRAM-enabled interrupt, which enables it to run during a SPI flash operation. This enables us to create a cache to off-load semaphores and message queues operations and treat them when the SPI flash operation is finished. By doing that, we avoid packet losses during a SPI flash operation.		2023-10-05 11:25:43 +08:00
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.gitignore
esp32s3_aliases.ld	xtensa/esp32s3: LCD controller driver	2023-09-19 11:38:05 +08:00
esp32s3_peripherals.ld
esp32s3_rom_aliases.ld	arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3	2023-08-14 16:29:21 -03:00
esp32s3_rom_api.ld	arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3	2023-08-14 16:29:21 -03:00
esp32s3_rom.ld	arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3	2023-08-14 16:29:21 -03:00
flat_memory.ld	arch/xtensa/esp32s3: Update MCUboot build process	2023-08-18 14:44:11 +08:00
kernel-space.ld	esp32s3/wifi: support the Wi-Fi to work with protected build	2023-08-02 21:38:44 +02:00
legacy_sections.ld	esp32s3/ble: enable the BLE interrupt during a SPI flash operation	2023-10-05 11:25:43 +08:00
mcuboot_sections.ld
protected_memory.ld	arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3	2023-08-14 16:29:21 -03:00
user-space.ld