Xiang Xiao ea614090cd arch/risc-v: Change hex number to low case in csr.h ...

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

2022-03-13 10:17:25 +02:00

..

bl602

arch/risc-v: Remove dupped irq code from bl602

2022-01-21 00:44:43 +08:00

c906

arch/risc-v: Remove dupped irq code from c906

2022-01-21 00:44:43 +08:00

esp32c3

riscv/esp32c3: Add esp32c3 BLE driver

2021-06-28 23:14:30 -05:00

fe310

arch/risc-v: Remove dupped irq code from fe310

2022-01-21 00:44:43 +08:00

k210

arch/risc-v: Remove dupped irq code from k210

2022-01-21 00:44:43 +08:00

litex

arch/risc-v: Remove dupped irq code from litex

2022-01-21 00:44:43 +08:00

mpfs

arch/risc-v: Remove dupped irq code from mpfs

2022-01-21 00:44:43 +08:00

qemu-rv

arch/risc-v: Remove dupped irq code from qemu-rv

2022-01-21 00:44:43 +08:00

rv32m1

arch/risc-v: Merge mcause.h into irq.h

2022-01-22 14:57:05 +08:00

.gitignore

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arch.h

arch/risc-v: Remove unneeded ISA specifc interface

2022-02-25 20:36:16 +08:00

csr.h

arch/risc-v: Change hex number to low case in csr.h

2022-03-13 10:17:25 +02:00

elf.h

…

inttypes.h

arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64

2022-01-04 23:22:43 +08:00

irq.h

arch/risc-v: Correct handling of QPFPU and DPFPU

2022-03-09 10:15:54 +02:00

limits.h

arch/risc-v: Refine Toolchain.defs

2021-12-28 00:30:10 -06:00

setjmp.h

arch/risc-v: Save/Load float register in setjmp

2022-03-09 10:15:54 +02:00

spinlock.h

arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64

2022-01-04 23:22:43 +08:00

stdarg.h

arch: risc-V: Author Gregory Nutt: update licenses to Apache

2021-03-31 08:48:51 -07:00

syscall.h

arch: Remove SYS_RESERVED from Kconfg

2022-02-27 22:54:13 +08:00

types.h

arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64

2022-01-04 23:22:43 +08:00