8bc90a1899
Squashed commit of the following: arch/arm/src/lpc54xx: Finish off some missing logic. Complete now execpt for GPIO and LED support. arch/arm/src/lpc54xx: Add lpc54_clrpend.c arch/arm/src/lpc54xx: Serial driver is complete and compiles. arch/arm/src/lpc54xx: Add beginning of a serial driver (still missing some logic) arch/arm/src/lpc54xx: Fleshes out low level USART intialization. arch/arm/src/lpc546xx/Kconfig: Add hooks to integrate with common seril upper half. arch/arm/src/lpc54xx: Beginning of USART console support. arch/arm/src/lpc54xx: Completes very basic clock configuration. arch/arm/src/lpc54xx: Add clocking logic (still not complete) arch/arm/src/lpc54xx: Beginning of PLL configuration logic. arch/arm/src/lpc54xx: Fix a few things from first compile attempt. Compilation cannot work until I at least finish the clock configuration logic. arch/arm/src/lpc54xx: Addes some SysTick logic. arch/arm/src/lpc54xx: Completes basic startup logic (sans clock configuration) and interrupt configuration. arch/arm/src/lpc54xx: Add generic ARMv7-M start-up logic (needs LPC54628 customizations); add emtpy file that will eventually hold the clock configuration logic. arch/arm/src/lpc54xx: Add (incomplete) SYSCON register definition header file. arch/arm/src/lpc54xx: Add FLEXCOMM header file. arch/arm/src/lpc54xx: Bring in tickless clock logic from LPC43; configs/lpcxpresso-lpc54628: mount procfs if enabled. arch/arm/src/lpc54xx: Add RIT clock definitions; add SysTick initialization (not finished) LPC54xx and LPCXpresso-LPC54628: add more boilerplate files and stubbed out files. arch/arm/src/lpc54xx: Add (incomplete) USART header file. Add another condition to a Kconfig; refresh a defconfig. arch/arm/src/lpc54xx/chip: Add LPC54628 memory map header files. configs/lpcxpresso-lpc54628: Add basic build files for the LPCXpresso-LPC54628 arch/: Basic build directory structure for the LPC54628
117 lines
3.6 KiB
Plaintext
117 lines
3.6 KiB
Plaintext
/****************************************************************************
|
|
* configs/lpcxpresso-lpc54628/scripts/flash.ld
|
|
*
|
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions
|
|
* are met:
|
|
*
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer.
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in
|
|
* the documentation and/or other materials provided with the
|
|
* distribution.
|
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
|
* used to endorse or promote products derived from this software
|
|
* without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
*
|
|
****************************************************************************/
|
|
|
|
/* The LPC54628 on the LPCXPressio has 512Kb of FLASH at address 0x0000:0000.
|
|
* The Main SRAM is comprised of up to a total 160 KB of contiguous, on-chip
|
|
* static RAM memory beginning at address 0x2000:0000 (this is in addition
|
|
* to SRAMX aso the total device SRAM can be up to 200 KB).
|
|
*/
|
|
|
|
MEMORY
|
|
{
|
|
progmem (rx) : ORIGIN = 0x00000000, LENGTH = 512K
|
|
datamem (rwx) : ORIGIN = 0x20000000, LENGTH = 160K
|
|
}
|
|
|
|
OUTPUT_ARCH(arm)
|
|
ENTRY(__start) /* Treat __start as the anchor for dead code stripping */
|
|
EXTERN(_vectors) /* Force the vectors to be included in the output */
|
|
SECTIONS
|
|
{
|
|
.text : {
|
|
_stext = ABSOLUTE(.);
|
|
*(.vectors)
|
|
*(.text .text.*)
|
|
*(.fixup)
|
|
*(.gnu.warning)
|
|
*(.rodata .rodata.*)
|
|
*(.gnu.linkonce.t.*)
|
|
*(.glue_7)
|
|
*(.glue_7t)
|
|
*(.got)
|
|
*(.gcc_except_table)
|
|
*(.gnu.linkonce.r.*)
|
|
_etext = ABSOLUTE(.);
|
|
} > progmem
|
|
|
|
.init_section : {
|
|
_sinit = ABSOLUTE(.);
|
|
*(.init_array .init_array.*)
|
|
_einit = ABSOLUTE(.);
|
|
} > progmem
|
|
|
|
.ARM.extab : {
|
|
*(.ARM.extab*)
|
|
} > progmem
|
|
|
|
__exidx_start = ABSOLUTE(.);
|
|
.ARM.exidx : {
|
|
*(.ARM.exidx*)
|
|
} > progmem
|
|
__exidx_end = ABSOLUTE(.);
|
|
|
|
_eronly = ABSOLUTE(.);
|
|
|
|
.data : {
|
|
_sdata = ABSOLUTE(.);
|
|
*(.data .data.*)
|
|
*(.gnu.linkonce.d.*)
|
|
CONSTRUCTORS
|
|
_edata = ABSOLUTE(.);
|
|
} > datamem AT > progmem
|
|
|
|
.bss : {
|
|
_sbss = ABSOLUTE(.);
|
|
*(.bss .bss.*)
|
|
*(.gnu.linkonce.b.*)
|
|
*(COMMON)
|
|
_ebss = ABSOLUTE(.);
|
|
} > datamem
|
|
|
|
/* Stabs debugging sections. */
|
|
.stab 0 : { *(.stab) }
|
|
.stabstr 0 : { *(.stabstr) }
|
|
.stab.excl 0 : { *(.stab.excl) }
|
|
.stab.exclstr 0 : { *(.stab.exclstr) }
|
|
.stab.index 0 : { *(.stab.index) }
|
|
.stab.indexstr 0 : { *(.stab.indexstr) }
|
|
.comment 0 : { *(.comment) }
|
|
.debug_abbrev 0 : { *(.debug_abbrev) }
|
|
.debug_info 0 : { *(.debug_info) }
|
|
.debug_line 0 : { *(.debug_line) }
|
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
|
.debug_aranges 0 : { *(.debug_aranges) }
|
|
}
|