nuttx/arch/risc-v
hujun5 ed998c08c4 sched: change the SMP scheduling policy from synchronous to asynchronous
reason:
Currently, if we need to schedule a task to another CPU, we have to completely halt the other CPU,
manipulate the scheduling linked list, and then resume the operation of that CPU. This process is both time-consuming and unnecessary.

During this process, both the current CPU and the target CPU are inevitably subjected to busyloop.

The improved strategy is to simply send a cross-core interrupt to the target CPU.
The current CPU continues to run while the target CPU responds to the interrupt, eliminating the certainty of a busyloop occurring.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-09 23:32:31 +08:00
..
include riscv_fork.c: Fix race condition when handling parent integer registers 2024-10-03 09:07:57 +08:00
src sched: change the SMP scheduling policy from synchronous to asynchronous 2024-10-09 23:32:31 +08:00
CMakeLists.txt cmake:init RISC-V cmake qemu-rv build 2023-10-26 21:01:46 +08:00
Kconfig risc-v: Add a new option to control exception reason 2024-09-17 15:26:06 -03:00