replace all GPIO_MODE_xxMHz with GPIO_MODE_2MHz provide GPIO_ADJUST_MODE and add legacy pinmap For the stm32F1 pinmaps should not have contained GPIO_MODE_50MHz settings on all pins. Speed is board dependent. This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for lazy migration to using pinmaps that can have the GPIO_MODE_xxMHz set. The work required to do this can be aided by running tools/stm32_pinmap_tool.py. The tools will take a board.h, and use all the defconfigs with the legacy pinmap and output the required changes that one needs to make to a board.h file. Eventually, CONFIG_STM32_USE_LEGACY_PINMAP will be deprecated and the legacy pinmaps removed from NuttX. Any new boards added should set CONFIG_STM32_USE_LEGACY_PINMAP=n and fully define the pins in board.hf1
561 lines
22 KiB
C
561 lines
22 KiB
C
/****************************************************************************
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* arch/arm/src/stm32/stm32_gpio.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_GPIO_H
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#define __ARCH_ARM_SRC_STM32_STM32_GPIO_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stdbool.h>
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#endif
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#include <nuttx/irq.h>
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#include "chip.h"
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#if defined(CONFIG_STM32_STM32L15XX)
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# include "hardware/stm32l15xxx_gpio.h"
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#elif defined(CONFIG_STM32_STM32F10XX)
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# include "hardware/stm32f10xxx_gpio.h"
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#elif defined(CONFIG_STM32_STM32F20XX)
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# include "hardware/stm32f20xxx_gpio.h"
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#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
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defined(CONFIG_STM32_STM32F37XX)
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# include "hardware/stm32f30xxx_gpio.h"
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#elif defined(CONFIG_STM32_STM32F4XXX)
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# include "hardware/stm32f40xxx_gpio.h"
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#elif defined(CONFIG_STM32_STM32G4XXX)
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# include "hardware/stm32g4xxxx_gpio.h"
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#else
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# error "Unrecognized STM32 chip"
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#endif
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/****************************************************************************
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* Pre-Processor Declarations
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****************************************************************************/
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/* Bit-encoded input to stm32_configgpio() */
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#if defined(CONFIG_STM32_STM32F10XX)
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/* 16-bit Encoding:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* OFFS SX.. VPPP BBBB
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*/
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/* Output mode:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* O... .... .... ....
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*/
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#define GPIO_INPUT (1 << 15) /* Bit 15: 1=Input mode */
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#define GPIO_OUTPUT (0) /* 0=Output or alternate function */
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#define GPIO_ALT (0)
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/* If the pin is a GPIO digital output, then this identifies the initial
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* output value. If the pin is an input, this bit is overloaded to
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* provide the qualifier to\ distinguish input pull-up and -down:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .... .... V... ....
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*/
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#define GPIO_OUTPUT_SET (1 << 7) /* Bit 7: If output, initial value of output */
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#define GPIO_OUTPUT_CLEAR (0)
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/* These bits set the primary function of the pin:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .FF. .... .... ....
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*/
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#define GPIO_CNF_SHIFT 13 /* Bits 13-14: GPIO function */
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#define GPIO_CNF_MASK (3 << GPIO_CNF_SHIFT)
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# define GPIO_CNF_ANALOGIN (0 << GPIO_CNF_SHIFT) /* Analog input */
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# define GPIO_CNF_INFLOAT (1 << GPIO_CNF_SHIFT) /* Input floating */
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# define GPIO_CNF_INPULLUD (2 << GPIO_CNF_SHIFT) /* Input pull-up/down general bit, since up is composed of two parts */
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# define GPIO_CNF_INPULLDWN (2 << GPIO_CNF_SHIFT) /* Input pull-down */
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# define GPIO_CNF_INPULLUP ((2 << GPIO_CNF_SHIFT) \
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| GPIO_OUTPUT_SET) /* Input pull-up */
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# define GPIO_CNF_OUTPP (0 << GPIO_CNF_SHIFT) /* Output push-pull */
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# define GPIO_CNF_OUTOD (1 << GPIO_CNF_SHIFT) /* Output open-drain */
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# define GPIO_CNF_AFPP (2 << GPIO_CNF_SHIFT) /* Alternate function push-pull */
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# define GPIO_CNF_AFOD (3 << GPIO_CNF_SHIFT) /* Alternate function open-drain */
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/* Maximum frequency selection:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* ...S S... .... ....
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*/
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#define GPIO_MODE_SHIFT 11 /* Bits 11-12: GPIO frequency selection */
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#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT)
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# define GPIO_MODE_INPUT (0 << GPIO_MODE_SHIFT) /* Input mode (reset state) */
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# define GPIO_MODE_10MHz (1 << GPIO_MODE_SHIFT) /* Output mode, max speed 10 MHz */
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# define GPIO_MODE_2MHz (2 << GPIO_MODE_SHIFT) /* Output mode, max speed 2 MHz */
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# define GPIO_MODE_50MHz (3 << GPIO_MODE_SHIFT) /* Output mode, max speed 50 MHz */
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#define GPIO_ADJUST_MODE(p, m) (((p) & ~GPIO_MODE_MASK) | (m))
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/* External interrupt selection (GPIO inputs only):
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .... .X.. .... ....
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*/
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#define GPIO_EXTI (1 << 10) /* Bit 10: Configure as EXTI interrupt */
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/* This identifies the GPIO port:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .... .... .PPP ....
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*/
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#define GPIO_PORT_SHIFT 4 /* Bit 4-6: Port number */
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#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
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# define GPIO_PORTA (0 << GPIO_PORT_SHIFT) /* GPIOA */
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# define GPIO_PORTB (1 << GPIO_PORT_SHIFT) /* GPIOB */
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# define GPIO_PORTC (2 << GPIO_PORT_SHIFT) /* GPIOC */
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# define GPIO_PORTD (3 << GPIO_PORT_SHIFT) /* GPIOD */
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# define GPIO_PORTE (4 << GPIO_PORT_SHIFT) /* GPIOE */
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# define GPIO_PORTF (5 << GPIO_PORT_SHIFT) /* GPIOF */
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# define GPIO_PORTG (6 << GPIO_PORT_SHIFT) /* GPIOG */
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/* This identifies the bit in the port:
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*
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* 1111 1100 0000 0000
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* 5432 1098 7654 3210
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* ---- ---- ---- ----
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* .... .... .... BBBB
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*/
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#define GPIO_PIN_SHIFT 0 /* Bits 0-3: GPIO number: 0-15 */
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#define GPIO_PIN_MASK (15 << GPIO_PIN_SHIFT)
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#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
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#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
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#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
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#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
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#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
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#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
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#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
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#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
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#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
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#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
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#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
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#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
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#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
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#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
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#elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
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defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
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defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F4XXX) || \
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defined(CONFIG_STM32_STM32G4XXX)
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/* Each port bit of the general-purpose I/O (GPIO) ports can be
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* individually configured by software in several modes:
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*
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* - Input floating
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* - Input pull-up
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* - Input-pull-down
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* - Output open-drain with pull-up or pull-down capability
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* - Output push-pull with pull-up or pull-down capability
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* - Alternate function push-pull with pull-up or pull-down capability
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* - Alternate function open-drain with pull-up or pull-down capability
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* - Analog
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*
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* 20-bit Encoding: 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* Inputs: MMUU .... ...X PPPP BBBB
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* Outputs: MMUU .... FFOV PPPP BBBB
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* Alternate Functions: MMUU AAAA FFO. PPPP BBBB
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* Analog: MM.. .... .... PPPP BBBB
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*/
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/* Mode:
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*
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* MM.. .... .... .... ....
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*/
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#define GPIO_MODE_SHIFT (18) /* Bits 18-19: GPIO port mode */
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#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT)
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# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* Input mode */
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# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* General purpose output mode */
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# define GPIO_ALT (2 << GPIO_MODE_SHIFT) /* Alternate function mode */
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# define GPIO_ANALOG (3 << GPIO_MODE_SHIFT) /* Analog mode */
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/* Input/output pull-ups/downs (not used with analog):
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*
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* ..UU .... .... .... ....
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*/
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#define GPIO_PUPD_SHIFT (16) /* Bits 16-17: Pull-up/pull down */
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#define GPIO_PUPD_MASK (3 << GPIO_PUPD_SHIFT)
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# define GPIO_FLOAT (0 << GPIO_PUPD_SHIFT) /* No pull-up, pull-down */
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# define GPIO_PULLUP (1 << GPIO_PUPD_SHIFT) /* Pull-up */
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# define GPIO_PULLDOWN (2 << GPIO_PUPD_SHIFT) /* Pull-down */
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/* Alternate Functions:
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*
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... AAAA .... .... ....
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*/
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#define GPIO_AF_SHIFT (12) /* Bits 12-15: Alternate function */
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#define GPIO_AF_MASK (15 << GPIO_AF_SHIFT)
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# define GPIO_AF(n) ((n) << GPIO_AF_SHIFT)
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# define GPIO_AF0 (0 << GPIO_AF_SHIFT)
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# define GPIO_AF1 (1 << GPIO_AF_SHIFT)
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# define GPIO_AF2 (2 << GPIO_AF_SHIFT)
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# define GPIO_AF3 (3 << GPIO_AF_SHIFT)
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# define GPIO_AF4 (4 << GPIO_AF_SHIFT)
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# define GPIO_AF5 (5 << GPIO_AF_SHIFT)
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# define GPIO_AF6 (6 << GPIO_AF_SHIFT)
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# define GPIO_AF7 (7 << GPIO_AF_SHIFT)
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# define GPIO_AF8 (8 << GPIO_AF_SHIFT)
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# define GPIO_AF9 (9 << GPIO_AF_SHIFT)
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# define GPIO_AF10 (10 << GPIO_AF_SHIFT)
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# define GPIO_AF11 (11 << GPIO_AF_SHIFT)
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# define GPIO_AF12 (12 << GPIO_AF_SHIFT)
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# define GPIO_AF13 (13 << GPIO_AF_SHIFT)
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# define GPIO_AF14 (14 << GPIO_AF_SHIFT)
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# define GPIO_AF15 (15 << GPIO_AF_SHIFT)
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/* Output/Alt function frequency selection:
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*
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... FF.. .... ....
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*/
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#define GPIO_SPEED_SHIFT (10) /* Bits 10-11: GPIO frequency selection */
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#define GPIO_SPEED_MASK (3 << GPIO_SPEED_SHIFT)
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#if defined(CONFIG_STM32_STM32L15XX)
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# define GPIO_SPEED_400KHz (0 << GPIO_SPEED_SHIFT) /* 400 kHz Very low speed output */
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# define GPIO_SPEED_2MHz (1 << GPIO_SPEED_SHIFT) /* 2 MHz Low speed output */
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# define GPIO_SPEED_10MHz (2 << GPIO_SPEED_SHIFT) /* 10 MHz Medium speed output */
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# define GPIO_SPEED_40MHz (3 << GPIO_SPEED_SHIFT) /* 40 MHz High speed output */
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#elif defined(CONFIG_STM32_STM32G4XXX) /* With C=50pF, 2.7<VDD<3.6, DS12288 Rev2 Table 59 */
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# define GPIO_SPEED_5MHz (0 << GPIO_SPEED_SHIFT) /* 5 MHz Low speed output */
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# define GPIO_SPEED_25MHz (1 << GPIO_SPEED_SHIFT) /* 25 MHz Medium speed output */
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# define GPIO_SPEED_50MHz (2 << GPIO_SPEED_SHIFT) /* 50 MHz Fast speed output */
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# define GPIO_SPEED_120MHz (3 << GPIO_SPEED_SHIFT) /* 120 MHz High speed output */
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#else
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# define GPIO_SPEED_2MHz (0 << GPIO_SPEED_SHIFT) /* 2 MHz Low speed output */
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# define GPIO_SPEED_25MHz (1 << GPIO_SPEED_SHIFT) /* 25 MHz Medium speed output */
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# define GPIO_SPEED_50MHz (2 << GPIO_SPEED_SHIFT) /* 50 MHz Fast speed output */
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#ifndef CONFIG_STM32_STM32F30XX
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# define GPIO_SPEED_100MHz (3 << GPIO_SPEED_SHIFT) /* 100 MHz High speed output */
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#endif
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#endif
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/* Output/Alt function type selection:
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*
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... ..O. .... ....
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*/
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#define GPIO_OPENDRAIN (1 << 9) /* Bit9: 1=Open-drain output */
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#define GPIO_PUSHPULL (0) /* Bit9: 0=Push-pull output */
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/* If the pin is a GPIO digital output, then this identifies the initial
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* output value. If the pin is an input, this bit is overloaded to
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* provide the qualifier to distinguish input pull-up and -down:
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*
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... ...V .... ....
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*/
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#define GPIO_OUTPUT_SET (1 << 8) /* Bit 8: If output, initial value of output */
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#define GPIO_OUTPUT_CLEAR (0)
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/* External interrupt selection (GPIO inputs only):
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*
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... ...X .... ....
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*/
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#define GPIO_EXTI (1 << 8) /* Bit 8: Configure as EXTI interrupt */
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/* This identifies the GPIO port:
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*
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... .... PPPP ....
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*/
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#define GPIO_PORT_SHIFT (4) /* Bit 4-7: Port number */
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#define GPIO_PORT_MASK (15 << GPIO_PORT_SHIFT)
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# define GPIO_PORTA (0 << GPIO_PORT_SHIFT) /* GPIOA */
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# define GPIO_PORTB (1 << GPIO_PORT_SHIFT) /* GPIOB */
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# define GPIO_PORTC (2 << GPIO_PORT_SHIFT) /* GPIOC */
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# define GPIO_PORTD (3 << GPIO_PORT_SHIFT) /* GPIOD */
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# define GPIO_PORTE (4 << GPIO_PORT_SHIFT) /* GPIOE */
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#if defined (CONFIG_STM32_STM32L15XX)
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# define GPIO_PORTH (5 << GPIO_PORT_SHIFT) /* GPIOH */
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# define GPIO_PORTF (6 << GPIO_PORT_SHIFT) /* GPIOF */
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# define GPIO_PORTG (7 << GPIO_PORT_SHIFT) /* GPIOG */
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#else
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# define GPIO_PORTF (5 << GPIO_PORT_SHIFT) /* GPIOF */
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# define GPIO_PORTG (6 << GPIO_PORT_SHIFT) /* GPIOG */
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# define GPIO_PORTH (7 << GPIO_PORT_SHIFT) /* GPIOH */
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# define GPIO_PORTI (8 << GPIO_PORT_SHIFT) /* GPIOI */
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# define GPIO_PORTJ (9 << GPIO_PORT_SHIFT) /* GPIOJ */
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# define GPIO_PORTK (10 << GPIO_PORT_SHIFT) /* GPIOK */
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#endif
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/* This identifies the bit in the port:
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*
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* 1111 1111 1100 0000 0000
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* 9876 5432 1098 7654 3210
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* ---- ---- ---- ---- ----
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* .... .... .... .... BBBB
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*/
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#define GPIO_PIN_SHIFT (0) /* Bits 0-3: GPIO number: 0-15 */
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#define GPIO_PIN_MASK (15 << GPIO_PIN_SHIFT)
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# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
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# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
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# define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
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# define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
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# define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
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# define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
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# define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
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# define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
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# define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
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# define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
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# define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
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# define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
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# define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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# define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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# define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
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# define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
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#else
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# error "Unrecognized STM32 chip"
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/* Base addresses for each GPIO block */
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EXTERN const uint32_t g_gpiobase[STM32_NGPIO_PORTS];
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_configgpio
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*
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* Description:
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* Configure a GPIO pin based on bit-encoded description of the pin.
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* Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...)
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* function, it must be unconfigured with stm32_unconfiggpio() with
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* the same cfgset first before it can be set to non-alternative function.
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*
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* Returned Value:
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* OK on success
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* ERROR on invalid port, or when pin is locked as ALT function.
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*
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****************************************************************************/
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int stm32_configgpio(uint32_t cfgset);
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/****************************************************************************
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* Name: stm32_unconfiggpio
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*
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* Description:
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* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
|
|
* it into default HiZ state (and possibly mark it's unused) and unlock it
|
|
* whether it was previously selected as alternative function
|
|
* (GPIO_ALT|GPIO_CNF_AFPP|...).
|
|
*
|
|
* This is a safety function and prevents hardware from shocks, as
|
|
* unexpected write to the Timer Channel Output GPIO to fixed '1' or '0'
|
|
* while it should operate in PWM mode could produce excessive on-board
|
|
* currents and trigger over-current/alarm function.
|
|
*
|
|
* Returned Value:
|
|
* OK on success
|
|
* ERROR on invalid port
|
|
*
|
|
****************************************************************************/
|
|
|
|
int stm32_unconfiggpio(uint32_t cfgset);
|
|
|
|
/****************************************************************************
|
|
* Name: stm32_gpiowrite
|
|
*
|
|
* Description:
|
|
* Write one or zero to the selected GPIO pin
|
|
*
|
|
****************************************************************************/
|
|
|
|
void stm32_gpiowrite(uint32_t pinset, bool value);
|
|
|
|
/****************************************************************************
|
|
* Name: stm32_gpioread
|
|
*
|
|
* Description:
|
|
* Read one or zero from the selected GPIO pin
|
|
*
|
|
****************************************************************************/
|
|
|
|
bool stm32_gpioread(uint32_t pinset);
|
|
|
|
/****************************************************************************
|
|
* Name: stm32_iocompensation
|
|
*
|
|
* Description:
|
|
* Enable I/O compensation.
|
|
*
|
|
* By default the I/O compensation cell is not used. However when the I/O
|
|
* output buffer speed is configured in 50 MHz or 100 MHz mode, it is
|
|
* recommended to use the compensation cell for slew rate control on I/O
|
|
* tf(IO)out)/tr(IO)out commutation to reduce the I/O noise on power
|
|
* supply.
|
|
*
|
|
* The I/O compensation cell can be used only when the supply voltage
|
|
* ranges from 2.4 to 3.6 V.
|
|
*
|
|
* Input Parameters:
|
|
* None
|
|
*
|
|
* Returned Value:
|
|
* None
|
|
*
|
|
****************************************************************************/
|
|
|
|
#ifdef CONFIG_STM32_HAVE_IOCOMPENSATION
|
|
void stm32_iocompensation(void);
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Name: stm32_gpiosetevent
|
|
*
|
|
* Description:
|
|
* Sets/clears GPIO based event and interrupt triggers.
|
|
*
|
|
* Input Parameters:
|
|
* - pinset: gpio pin configuration
|
|
* - rising/falling edge: enables
|
|
* - event: generate event when set
|
|
* - func: when non-NULL, generate interrupt
|
|
* - arg: Argument passed to the interrupt callback
|
|
*
|
|
* Returned Value:
|
|
* Zero (OK) on success; a negated errno value on failure indicating the
|
|
* nature of the failure.
|
|
*
|
|
****************************************************************************/
|
|
|
|
int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
|
|
bool event, xcpt_t func, void *arg);
|
|
|
|
/****************************************************************************
|
|
* Function: stm32_dumpgpio
|
|
*
|
|
* Description:
|
|
* Dump all GPIO registers associated with the provided base address
|
|
*
|
|
****************************************************************************/
|
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
|
int stm32_dumpgpio(uint32_t pinset, const char *msg);
|
|
#else
|
|
# define stm32_dumpgpio(p,m)
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Function: stm32_gpioinit
|
|
*
|
|
* Description:
|
|
* Based on configuration within the .config file, it does:
|
|
* - Remaps positions of alternative functions.
|
|
*
|
|
* Typically called from stm32_start().
|
|
*
|
|
****************************************************************************/
|
|
|
|
void stm32_gpioinit(void);
|
|
|
|
#undef EXTERN
|
|
#if defined(__cplusplus)
|
|
}
|
|
#endif
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
#endif /* __ARCH_ARM_SRC_STM32_STM32_GPIO_H */
|