Petro Karashchenko f39de6fd1a arch/arm/armv[7|8]-m: implement dcache clean as barrier in write-through mode ... This change fixes the issue when SAMv7 GMAC sometimes does not start packet transmission. The issue is that EMAC_NCR_TSTART is written to EMAC_NCR register while tx descriptor is not delivered to memory. Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>		2023-09-08 11:54:04 +08:00
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include	Handle GPIO IRQs	2023-09-06 12:30:35 +08:00
src	arch/arm/armv[7|8]-m: implement dcache clean as barrier in write-through mode	2023-09-08 11:54:04 +08:00
CMakeLists.txt	build: add initial cmake build system	2023-07-08 13:50:48 +08:00
Kconfig	Add i2c support for the i.MX8MP	2023-08-31 10:35:46 -03:00