nuttx/boards/risc-v/fe310/hifive1-revb/README.txt
Masayuki Ishikawa f46e5d58d0 Merged in masayuki2009/nuttx.nuttx/fe310_updates (pull request #1085)
fe310 updates

* arch: fe310: Rename CLIC to CLINT

* boards: hifive1-revb: Add README.txt

* arch: fe310: Use atomic operations in up_irq_save() and up_irq_enable()

* arch: fe310: Remove unused configs in Kconfig

* boards: hifive1-revb: Change UART0 buff size and remove debug features.

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-12-02 14:45:41 +00:00

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1. Download and install toolchain
$ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
2. Build and install qemu
$ git clone https://github.com/qemu/qemu
$ cd qemu
$ ./configure --target-list=riscv32-softmmu
$ make
$ sudo make install
3. Configure and build NuttX
$ mkdir ./nuttx; cd ./nuttx
$ git clone https://bitbucket.org/nuttx/nuttx.git
$ git clone https://bitbucket.org/nuttx/apps.git
$ cd nuttx
$ make distclean
$ ./tools/configure.sh hifive1-revb:nsh
$ make V=1
4. Run the nuttx with qemu
$ qemu-system-riscv32 -nographic -machine sifive_e -kernel ./nuttx
5. TODO
Configure PLL and UART divisor
Run nuttx on HiFive1-Rev.B board
Support GPIO/SPI/I2C/RTC/WDT/PWM
Support RISC-V User mode