f46e5d58d0
fe310 updates * arch: fe310: Rename CLIC to CLINT * boards: hifive1-revb: Add README.txt * arch: fe310: Use atomic operations in up_irq_save() and up_irq_enable() * arch: fe310: Remove unused configs in Kconfig * boards: hifive1-revb: Change UART0 buff size and remove debug features. Approved-by: Gregory Nutt <gnutt@nuttx.org>
33 lines
802 B
Plaintext
33 lines
802 B
Plaintext
1. Download and install toolchain
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$ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
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2. Build and install qemu
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$ git clone https://github.com/qemu/qemu
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$ cd qemu
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$ ./configure --target-list=riscv32-softmmu
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$ make
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$ sudo make install
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3. Configure and build NuttX
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$ mkdir ./nuttx; cd ./nuttx
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$ git clone https://bitbucket.org/nuttx/nuttx.git
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$ git clone https://bitbucket.org/nuttx/apps.git
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$ cd nuttx
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$ make distclean
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$ ./tools/configure.sh hifive1-revb:nsh
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$ make V=1
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4. Run the nuttx with qemu
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$ qemu-system-riscv32 -nographic -machine sifive_e -kernel ./nuttx
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5. TODO
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Configure PLL and UART divisor
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Run nuttx on HiFive1-Rev.B board
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Support GPIO/SPI/I2C/RTC/WDT/PWM
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Support RISC-V User mode
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