306 lines
9.1 KiB
ReStructuredText
306 lines
9.1 KiB
ReStructuredText
==========
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ST STM32F2
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==========
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Supported MCUs
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==============
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TODO
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Peripheral Support
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==================
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The following list indicates peripherals supported in NuttX:
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========== ======= =====
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Peripheral Support Notes
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========== ======= =====
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FLASH Yes
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CRC Yes
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PM ?
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RCC Yes
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GPIO Yes
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SYSCFG Yes
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EXTI Yes
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DMA Yes
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ADC Yes
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DAC Yes
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DCMI No
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TIM Yes
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IWDG Yes
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WWDG Yes
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CRYP Yes
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RNG Yes
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HASH ?
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RTC Yes
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I2C Yes
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USART Yes
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SPI Yes
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SDIO Yes
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CAN Yes
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ETH Yes
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OTG_FS Yes
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OTG_HS Yes
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FSMC Yes
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========== ======= =====
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Memory
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------
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- CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case)
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- CONFIG_RAM_START - The start address of installed DRAM
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In addition to internal SRAM, SRAM may also be available through the FSMC.
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In order to use FSMC SRAM, the following additional things need to be
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present in the NuttX configuration file:
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- CONFIG_STM32_EXTERNAL_RAM - Indicates that SRAM is available via the
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FSMC (as opposed to an LCD or FLASH).
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- CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex)
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- CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal)
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- CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that have LEDs
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- CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
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stack. If defined, this symbol is the size of the interrupt
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stack in bytes. If not defined, the user task stacks will be
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used during interrupt handling.
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- CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
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- CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
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Clock
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-----
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- CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
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configuration features.::
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CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
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- CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
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of delay loops
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CAN
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---
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- CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
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CONFIG_STM32_CAN2 must also be defined)
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- CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID.
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Default Standard 11-bit IDs.
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- CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
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Default: 8
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- CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
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Default: 4
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- CONFIG_STM32_CAN1 - Enable support for CAN1
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- CONFIG_STM32_CAN2 - Enable support for CAN2
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- CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate.
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Required if CONFIG_STM32_CAN1 is defined.
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- CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate.
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Required if CONFIG_STM32_CAN2 is defined.
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- CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
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Default: 6
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- CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
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Default: 7
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- CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
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dump of all CAN registers.
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FSMC SRAM
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---------
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Internal SRAM is available in all members of the STM32 family. In addition
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to internal SRAM, SRAM may also be available through the FSMC. In order to
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use FSMC SRAM, the following additional things need to be present in the
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NuttX configuration file:
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- CONFIG_STM32_FSMC=y - Enables the FSMC
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- CONFIG_STM32_EXTERNAL_RAM=y - Indicates that SRAM is available via the
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FSMC (as opposed to an LCD or FLASH).
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- CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC
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address space
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- CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC
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address space
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- CONFIG_MM_REGIONS - Must be set to a large enough value to
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include the FSMC SRAM
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Timers
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------
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
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is defined (as above) then the following may also be defined to indicate that
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the timer is intended to be used for pulsed output modulation, ADC conversion,
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or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
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to assign the timer (n) for used by the ADC or DAC, but then you also have to
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configure which ADC or DAC (m) it is assigned to.:
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- CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
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- CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
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- CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
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- CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
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- CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
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For each timer that is enabled for PWM usage, we need the following additional
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configuration settings:
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- CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
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NOTE: The STM32 timers are each capable of generating different signals on
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each of the four channels with different duty cycles. That capability is
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not supported by this driver: Only one output channel per timer.
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JTAG
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----
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JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
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- CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
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- CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
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but without JNTRST.
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- CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
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USART
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-----
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Options:
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- CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UARTm (m=4,5)
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for the console and ttys0 (default is the USART1).
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- CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
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This specific the size of the receive buffer
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- CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
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being sent. This specific the size of the transmit buffer
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- CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
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- CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
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- CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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- CONFIG_U[S]ARTn_2STOP - Two stop bits
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SPI
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---
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- CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
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support. Non-interrupt-driven, poll-waiting is recommended if the
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interrupt rate would be to high in the interrupt driven case.
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- CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
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Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
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SDIO
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----
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Options:
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- CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
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and CONFIG_STM32_DMA2.
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- CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128
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- CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
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Default: Medium
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- CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
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4-bit transfer mode.
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ETH
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---
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Options:
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- CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
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- CONFIG_STM32_MII - Support Ethernet MII interface
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- CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface
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- CONFIG_STM32_MII_MCO2 - Use MCO2 to clock the MII interface
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- CONFIG_STM32_RMII - Support Ethernet RMII interface
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- CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode
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- CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
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may be defined to select full duplex mode. Default: half-duplex
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- CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
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may be defined to select 100 MBps speed. Default: 10 Mbps
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- CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
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defined. The PHY status register address may diff from PHY to PHY. This
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configuration sets the address of the PHY status register.
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- CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
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defined. This provides bit mask indicating 10 or 100MBps speed.
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- CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
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defined. This provides the value of the speed bit(s) indicating 100MBps speed.
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- CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
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defined. This provide bit mask indicating full or half duplex modes.
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- CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
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defined. This provides the value of the mode bits indicating full duplex mode.
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- CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
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but some hooks are indicated with this condition.
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USB OTG FS
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----------
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STM32 USB OTG FS Host Driver Support
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Pre-requisites:
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- CONFIG_USBHOST - Enable general USB host support
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- CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block
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- CONFIG_STM32_SYSCFG - Needed
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- CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
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Default 128 (512 bytes)
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- CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
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in 32-bit words. Default 96 (384 bytes)
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- CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
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words. Default 96 (384 bytes)
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- CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128
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- CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
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want to do that?
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- CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
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debug. Depends on CONFIG_DEBUG_FEATURES.
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- CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
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packets. Depends on CONFIG_DEBUG_FEATURES.
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Supported Boards
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================
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.. toctree::
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:glob:
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:maxdepth: 1
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boards/*/*
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