348 lines
9.6 KiB
C
348 lines
9.6 KiB
C
/****************************************************************************
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* arch/arm/src/am335x/am335x_irq.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <nuttx/arch.h>
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#include "arm_internal.h"
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#include "sctlr.h"
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#include "am335x_gpio.h"
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#include "am335x_irq.h"
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/* Symbols defined via the linker script */
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extern uint8_t _vector_start[]; /* Beginning of vector block */
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extern uint8_t _vector_end[]; /* End+1 of vector block */
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_irqinitialize
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*
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* Description:
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* This function is called by up_initialize() during the bring-up of the
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* system. It is the responsibility of this function to but the interrupt
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* subsystem into the working and ready state.
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*
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****************************************************************************/
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void up_irqinitialize(void)
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{
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int i;
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#ifdef CONFIG_ARCH_LOWVECTORS
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/* If CONFIG_ARCH_LOWVECTORS is defined, then the vectors located at the
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* beginning of the .text region must appear at address at the address
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* specified in the VBAR. There are two ways to accomplish this:
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*
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* 1. By explicitly mapping the beginning of .text region with a page
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* table entry so that the virtual address zero maps to the beginning
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* of the .text region. VBAR == 0x0000:0000.
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*
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* 2. Set the Cortex-A8 VBAR register so that the vector table address
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* is moved to a location other than 0x0000:0000.
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*
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* The second method is used by this logic.
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*/
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/* Set the VBAR register to the address of the vector table */
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DEBUGASSERT((((uintptr_t)_vector_start) & ~VBAR_MASK) == 0);
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cp15_wrvbar((uint32_t)_vector_start);
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#endif /* CONFIG_ARCH_LOWVECTORS */
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/* The following operations need to be atomic, but since this function is
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* called early in the initialization sequence, we expect to have exclusive
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* access to the INTC.
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*/
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/* Reset the ARM interrupt controller */
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putreg32(INTC_SYSCONFIG_SOFTRESET, AM335X_INTC_SYSCONFIG);
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/* Wait for the reset to complete */
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while ((getreg32(AM335X_INTC_SYSSTATUS) & INTC_SYSSTATUS_RESETDONE) !=
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INTC_SYSSTATUS_RESETDONE)
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{
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}
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/* Enable any interrupt generation by setting priority threshold */
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putreg32(INTC_THRESHOLD_DISABLE, AM335X_INTC_THRESHOLD);
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/* Disable, mask, and clear all interrupts */
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for (i = 0; i < AM335X_IRQ_NINT; i += 32)
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{
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putreg32(0xffffffff, AM335X_INTC_MIR_SET(i)); /* 1 masks corresponding interrupt */
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getreg32(AM335X_INTC_PEND_IRQ(i)); /* Reading status clears pending interrupts */
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getreg32(AM335X_INTC_PEND_FIQ(i)); /* Reading status clears pending interrupts */
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}
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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/* Initialize logic to support a second level of interrupt decoding for
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* GPIO pins.
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*/
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#ifdef CONFIG_AM335X_GPIO_IRQ
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am335x_gpio_irqinitialize();
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#endif
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/* And finally, enable interrupts */
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up_irq_enable();
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#endif
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}
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/****************************************************************************
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* Name: arm_decodeirq
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*
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* Description:
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* This function is called from the IRQ vector handler in arm_vectors.S.
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* At this point, the interrupt has been taken and the registers have
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* been saved on the stack. This function simply needs to determine the
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* the irq number of the interrupt and then to call arm_doirq to dispatch
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* the interrupt.
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*
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* Input parameters:
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* regs - A pointer to the register save area on the stack.
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*
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****************************************************************************/
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uint32_t *arm_decodeirq(uint32_t *regs)
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{
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#if 1 /* Use PEND registers instead */
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uint32_t regval;
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/* Get active interrupt line */
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regval = getreg32(AM335X_INTC_SIR_IRQ) & INTC_SIR_IRQ_ACTIVE_MASK;
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/* Dispatch the interrupt */
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regs = arm_doirq((int)regval, regs);
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/* Enable new interrupt generation */
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putreg32(INTC_CONTROL_NEWIRQAGR, AM335X_INTC_CONTROL);
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return regs;
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#else
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uintptr_t regaddr;
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uint32_t pending;
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int startirq;
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int lastirq;
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int irq;
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#if 0
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/* Check each PEND register for pending interrupts. Since the unused
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* interrupts are disabled, we do not have to be concerned about which
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* are MASKed.
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*/
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for (startirq = 0, regaddr = AM335X_INTC_IRQ_PEND0;
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startirq < AM335X_IRQ_NINT;
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startirq += 32, regaddr += 4)
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{
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/* Check this register for pending interrupts */
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pending = getreg32(regaddr);
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if (pending != 0)
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{
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/* The last interrupt in this register */
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lastirq = startirq + 32;
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if (lastirq > AM335X_IRQ_NINT)
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{
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lastirq = AM335X_IRQ_NINT;
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}
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for (irq = startirq; irq < lastirq && pending != 0; )
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{
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/* Check for pending interrupts in any of the lower 16-bits */
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if ((pending & 0x0000ffff) == 0)
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{
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irq += 16;
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pending >>= 16;
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}
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/* Check for pending interrupts in any of the lower 16-bits */
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else if ((pending & 0x000000ff) == 0)
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{
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irq += 8;
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pending >>= 8;
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}
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/* Check for pending interrupts in any of the lower 4-bits */
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else if ((pending & 0x0000000f) == 0)
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{
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irq += 4;
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pending >>= 4;
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}
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/* Check for pending interrupts in any of the lower 2-bits */
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else if ((pending & 0x00000003) == 0)
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{
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irq += 2;
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pending >>= 2;
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}
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/* Check for pending interrupts in any of the last bits */
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else
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{
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if ((pending & 0x00000001) != 0)
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{
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/* Yes.. dispatch the interrupt */
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regs = arm_doirq(irq, regs);
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}
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irq++;
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pending >>= 1;
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}
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}
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}
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}
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#endif
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return regs;
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#endif
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}
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/****************************************************************************
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* Name: up_disable_irq
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*
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* Description:
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* Disable the IRQ specified by 'irq'
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*
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****************************************************************************/
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void up_disable_irq(int irq)
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{
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if (irq < AM335X_IRQ_NINT)
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{
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__asm__ __volatile__ ("\tdsb");
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/* Disable interrupt on INTC */
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putreg32(INTC_MIR_SET(irq), AM335X_INTC_MIR_SET(irq));
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}
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#ifdef CONFIG_AM335X_GPIO_IRQ
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else
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{
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/* Maybe it is a (derived) GPIO IRQ */
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am335x_gpioirq_disable(irq);
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}
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#endif
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}
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/****************************************************************************
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* Name: up_enable_irq
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*
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* Description:
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* Enable the IRQ specified by 'irq'
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*
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****************************************************************************/
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void up_enable_irq(int irq)
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{
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if (irq < AM335X_IRQ_NINT)
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{
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__asm__ __volatile__ ("\tdsb");
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/* Enable interrupt on INTC */
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putreg32(INTC_MIR_CLEAR(irq), AM335X_INTC_MIR_CLEAR(irq));
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}
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#ifdef CONFIG_AM335X_GPIO_IRQ
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else
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{
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/* Maybe it is a (derived) GPIO IRQ */
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am335x_gpioirq_enable(irq);
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}
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#endif
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}
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/****************************************************************************
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* Name: up_prioritize_irq
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*
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* Description:
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* Set the priority of an IRQ.
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*
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* Since this API is not supported on all architectures, it should be
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* avoided in common implementations where possible.
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*
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****************************************************************************/
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#ifdef CONFIG_ARCH_IRQPRIO
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int up_prioritize_irq(int irq, int priority)
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{
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irqstate_t flags;
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uintptr_t regaddr;
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uint32_t regval;
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DEBUGASSERT(irq < AM335X_IRQ_NINT && (unsigned)priority <= INTC_PRIO_MAX);
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if (irq < AM335X_IRQ_NINT)
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{
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/* These operations must be atomic */
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flags = enter_critical_section();
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#if 0 // TODO
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/* Set the new priority */
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regaddr = A1X_INTC_PRIO_OFFSET(irq);
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regval = getreg32(regaddr);
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regval &= ~INTC_PRIO_MASK(irq);
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regval |= INTC_PRIO(irq, priority);
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putreg32(regval, regaddr);
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#endif
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leave_critical_section(flags);
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return OK;
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}
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return -EINVAL;
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}
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#endif
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