161 lines
4.3 KiB
C
161 lines
4.3 KiB
C
/****************************************************************************
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* arch/ceva/include/xm6/spinlock.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_CEVA_INCLUDE_XM6_SPINLOCK_H
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#define __ARCH_CEVA_INCLUDE_XM6_SPINLOCK_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <arch/xm6/irq.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define SP_SECTION __attribute__ ((section(".DSECT spinlock")))
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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static inline void up_dsb(void)
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{
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/* MSS_BARRIER(0x638):
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* Bit [7] Internal Barrier Activation
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*/
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#define MSS_BARRIER 0x638
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uint32_t barrier = 0x80;
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__asm__ __volatile__
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(
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"out {cpm} %0.ui, (%1.ui).ui"
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: : "r"(barrier), "r"(MSS_BARRIER)
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);
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do
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{
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__asm__ __volatile__
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(
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"in {cpm} (%1.ui).ui, %0.ui\n"
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"nop #0x04\nnop #0x02"
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: "=r"(barrier)
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: "r"(MSS_BARRIER)
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);
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/* Wait unitl the barrier operation complete */
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}
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while ((barrier & 0x80) != 0);
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#undef MSS_BARRIER
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}
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static inline void up_dmb(void)
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{
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up_dsb(); /* use dsb instead since dmb doesn't exist on xm6 */
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}
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/****************************************************************************
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* Name: up_testset
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*
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* Description:
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* Perform an atomic test and set operation on the provided spinlock.
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*
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* This function must be provided via the architecture-specific logoic.
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*
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* Input Parameters:
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* lock - The address of spinlock object.
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*
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* Returned Value:
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* The spinlock is always locked upon return. The value of previous value
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* of the spinlock variable is returned, either SP_LOCKED if the spinlock
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* as previously locked (meaning that the test-and-set operation failed to
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* obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked
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* (meaning that we successfully obtained the lock)
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*
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****************************************************************************/
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static inline spinlock_t up_testset(volatile FAR spinlock_t *lock)
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{
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irqstate_t flags;
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spinlock_t old;
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/* Disable the interrupt */
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flags = up_irq_save();
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while (1)
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{
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uint32_t modc = 0;
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/* Issue exclusive read */
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__asm__ __volatile__
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(
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"nop\n"
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"LS0.ld (%1.ui).ui, %0.ui || monitor {on}\n"
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"nop #0x02"
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: "=r"(old)
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: "r"(lock)
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);
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/* Is it already locked by other? */
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if (old == SP_LOCKED)
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{
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break; /* Yes, exit */
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}
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/* Not yet, issue exclusive write */
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__asm__ __volatile__
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(
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"LS1.st %2.ui, (%1.ui).ui || monitor {off}\n"
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"mov modc.ui, %0.ui\n"
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"nop"
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: "=r"(modc)
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: "r"(lock), "r"(SP_LOCKED)
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: "memory"
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);
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/* Exclusive write success? */
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if ((modc & 0x01) == 0) /* Bit[0] Monitor status */
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{
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break; /* Yes, we are done */
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}
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/* Fail, let's try again */
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}
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/* Restore the interrupt */
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up_irq_restore(flags);
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return old;
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_CEVA_INCLUDE_XM6_SPINLOCK_H */
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