232 lines
7.5 KiB
C
232 lines
7.5 KiB
C
/****************************************************************************
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* configs/sama5d3-xplained/src/sam_nandflash.c
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Most of this file derives from Atmel sample code for the SAMA5D3-Xplained
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* board. That sample code has licensing that is compatible with the NuttX
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* modified BSD license:
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*
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* Copyright (c) 2012, Atmel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor Atmel nor the names of its contributors may
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* be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/mount.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/mtd/mtd.h>
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#include <nuttx/fs/nxffs.h>
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#include "up_arch.h"
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#include "sam_periphclks.h"
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#include "sam_pio.h"
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#include "sam_nand.h"
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#include "chip/sam_hsmc.h"
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#include "chip/sam_pinmap.h"
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#include "sama5d3-xplained.h"
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#ifdef CONFIG_SAMA5_EBICS3_NAND
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: board_nandflash_config
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*
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* Description:
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* If CONFIG_SAMA5_EBICS3_NAND is defined, then NAND FLASH support is
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* enabled. This function provides the board-specific implementation of
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* the logic to reprogram the SMC to support NAND FLASH on the specified
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* CS.
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*
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* Input Parameters:
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* cs - Chip select number (in the event that multiple NAND devices
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* are connected on-board).
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*
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* Returned Value:
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* OK if the HSMC was successfully configured for this CS. A negated
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* errno value is returned on a failure. This would fail with -ENODEV,
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* for example, if the board does not support NAND FLASH on the requested
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* CS.
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*
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****************************************************************************/
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int board_nandflash_config(int cs)
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{
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uint32_t regval;
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/* The Embest and Ronetix CM boards and one Hynix NAND HY27UF(08/16)2G2B
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* Series NAND (MT29F2G08ABAEAWP). This part has a capacity of 256Mx8bit
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* () with spare 8Mx8 bit capacity. The device contains 2048 blocks, composed
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* by 64 x 2112 byte pages. The effective size is approximately 256MiB.
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*
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* NAND is available on CS3.
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*/
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if (cs == HSMC_CS3)
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{
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/* Make sure that the SMC peripheral is enabled. */
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sam_hsmc_enableclk();
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/* Configure the SMC */
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regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(1) |
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HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(1);
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putreg32(regval, SAM_HSMC_SETUP(HSMC_CS3));
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regval = HSMC_PULSE_NWE_PULSE(5) | HSMC_PULSE_NCS_WRPULSE(7) |
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HSMC_PULSE_NRD_PULSE(5) | HSMC_PULSE_NCS_RDPULSE(7);
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putreg32(regval, SAM_HSMC_PULSE(HSMC_CS3));
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regval = HSMC_CYCLE_NWE_CYCLE(8) | HSMC_CYCLE_NRD_CYCLE(9);
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putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS3));
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regval = HSMC_TIMINGS_TCLR(3) | HSMC_TIMINGS_TADL(10) |
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HSMC_TIMINGS_TAR(3) | HSMC_TIMINGS_TRR(4) |
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HSMC_TIMINGS_TWB(5) | HSMC_TIMINGS_RBNSEL(3) |
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HSMC_TIMINGS_NFSEL;
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putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS3));
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regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE |
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HSMC_MODE_BIT_8 | HSMC_MODE_TDFCYCLES(1);
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putreg32(regval, SAM_HSMC_MODE(HSMC_CS3));
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/* Configure NAND PIO pins
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*
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* NAND Interface:
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*
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* NCS3/NANDCE - Dedicated pin; no configuration needed
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* NANDCLE - PE21
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* NANDALE - PE22
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* NRD/NANDOE - Dedicated pin; no configuration needed
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* NWE/NANDWE - Dedicated pin; no configuration needed
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* NANDRDY - Dedicated pin; no configuration needed
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* M_EBI_D0-7 - Dedicated pins; no configuration needed
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*/
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sam_configpio(PIO_HSMC_NANDALE);
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sam_configpio(PIO_HSMC_NANDCLE);
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return OK;
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}
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return -ENODEV;
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}
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/****************************************************************************
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* Name: sam_nand_automount
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*
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* Description:
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* Initialize and configure the NAND on CS3
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*
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****************************************************************************/
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#ifdef HAVE_NAND
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int sam_nand_automount(int minor)
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{
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FAR struct mtd_dev_s *mtd;
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static bool initialized = false;
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int ret;
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/* Have we already initialized? */
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if (!initialized)
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{
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/* Create and initialize an NAND MATD device */
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mtd = sam_nand_initialize(HSMC_CS3);
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if (!mtd)
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{
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ferr("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3);
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return -ENODEV;
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}
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#if defined(CONFIG_SAMA5D3XPLAINED_NAND_FTL)
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/* Use the FTL layer to wrap the MTD driver as a block driver */
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ret = ftl_initialize(NAND_MINOR, mtd);
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if (ret < 0)
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{
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ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
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return ret;
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}
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#elif defined(CONFIG_SAMA5D3XPLAINED_NAND_NXFFS)
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/* Initialize to provide NXFFS on the MTD interface */
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ret = nxffs_initialize(mtd);
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if (ret < 0)
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{
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ferr("ERROR: NXFFS initialization failed: %d\n", ret);
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return ret;
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}
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/* Mount the file system at /mnt/nand */
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ret = mount(NULL, "/mnt/nand", "nxffs", 0, NULL);
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if (ret < 0)
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{
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ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
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return ret;
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}
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#endif
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/* Now we are initialized */
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initialized = true;
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}
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return OK;
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}
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#endif
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#endif /* CONFIG_SAMA5_EBICS3_NAND */
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