fae5aef4fe
Porting memory and string optimize functions from newlib and bionic Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
78 lines
2.7 KiB
ArmAsm
78 lines
2.7 KiB
ArmAsm
/****************************************************************************
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* libs/libc/machine/arm64/gnu/arch_setjmp.S
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*
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* Copyright (c) 2011, 2012 ARM Ltd
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#define GPR_LAYOUT \
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REG_PAIR (x19, x20, 0); \
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REG_PAIR (x21, x22, 16); \
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REG_PAIR (x23, x24, 32); \
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REG_PAIR (x25, x26, 48); \
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REG_PAIR (x27, x28, 64); \
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REG_PAIR (x29, x30, 80); \
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REG_ONE (x16, 96)
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#define FPR_LAYOUT \
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REG_PAIR ( d8, d9, 112); \
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REG_PAIR (d10, d11, 128); \
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REG_PAIR (d12, d13, 144); \
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REG_PAIR (d14, d15, 160);
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// int setjmp (jmp_buf)
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.global setjmp
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.type setjmp, %function
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setjmp:
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mov x16, sp
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#define REG_PAIR(REG1, REG2, OFFS) stp REG1, REG2, [x0, OFFS]
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#define REG_ONE(REG1, OFFS) str REG1, [x0, OFFS]
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GPR_LAYOUT
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FPR_LAYOUT
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#undef REG_PAIR
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#undef REG_ONE
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mov w0, #0
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ret
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.size setjmp, .-setjmp
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// void longjmp (jmp_buf, int) __attribute__ ((noreturn))
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.global longjmp
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.type longjmp, %function
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longjmp:
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#define REG_PAIR(REG1, REG2, OFFS) ldp REG1, REG2, [x0, OFFS]
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#define REG_ONE(REG1, OFFS) ldr REG1, [x0, OFFS]
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GPR_LAYOUT
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FPR_LAYOUT
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#undef REG_PAIR
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#undef REG_ONE
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mov sp, x16
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cmp w1, #0
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cinc w0, w1, eq
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// use br not ret, as ret is guaranteed to mispredict
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br x30
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.size longjmp, .-longjmp
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