252dabc2d8
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3680 42af7a65-404d-4744-a932-0658087f49c3
130 lines
6.0 KiB
C
130 lines
6.0 KiB
C
/****************************************************************************
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* arch/avr/include/avr/atmega/irq.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_AVR_INCLUDE_ATMEGA_IRQ_H
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#define __ARCH_AVR_INCLUDE_ATMEGA_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/irq.h>
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#include <arch/avr/avr.h>
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* The ATmega128 has 35 interrupt vectors including vector 0, the reset
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* vector. The remaining 34 are assigned IRQ numbers here:
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*/
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#define ATMEGA_IRQ_INT0 0 /* 0x0002 External Interrupt Request 0 */
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#define ATMEGA_IRQ_INT1 1 /* 0x0004 External Interrupt Request 1 */
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#define ATMEGA_IRQ_INT2 2 /* 0x0006 External Interrupt Request 2 */
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#define ATMEGA_IRQ_INT3 3 /* 0x0008 External Interrupt Request 3 */
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#define ATMEGA_IRQ_INT4 4 /* 0x000a External Interrupt Request 4 */
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#define ATMEGA_IRQ_INT5 5 /* 0x000c External Interrupt Request 5 */
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#define ATMEGA_IRQ_INT6 6 /* 0x000e External Interrupt Request 6 */
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#define ATMEGA_IRQ_INT7 7 /* 0x0010 External Interrupt Request 7 */
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#define ATMEGA_IRQ_T2COMP 8 /* 0x0012 TIMER2 COMP Timer/Counter2 Compare Match */
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#define ATMEGA_IRQ_T2OVF 9 /* 0x0014 TIMER2 OVF Timer/Counter2 Overflow */
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#define ATMEGA_IRQ_T1CAPT 10 /* 0x0016 TIMER1 CAPT Timer/Counter1 Capture Event */
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#define ATMEGA_IRQ_T1COMPA 11 /* 0x0018 TIMER1 COMPA Timer/Counter1 Compare Match A */
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#define ATMEGA_IRQ_T1COMPB 12 /* 0x001a TIMER1 COMPB Timer/Counter1 Compare Match B */
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#define ATMEGA_IRQ_T1OVF 13 /* 0x001c TIMER1 OVF Timer/Counter1 Overflow */
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#define ATMEGA_IRQ_T0COMP 14 /* 0x001e TIMER0 COMP Timer/Counter0 Compare Match */
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#define ATMEGA_IRQ_T0OVF 15 /* 0x0020 TIMER0 OVF Timer/Counter0 Overflow */
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#define ATMEGA_IRQ_SPI 16 /* 0x0022 STC SPI Serial Transfer Complete */
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#define ATMEGA_IRQ_U0RX 17 /* 0x0024 USART0 Rx Complete */
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#define ATMEGA_IRQ_U0DRE 18 /* 0x0026 USART0 Data Register Empty */
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#define ATMEGA_IRQ_U0TX 19 /* 0x0028 USART0 Tx Complete */
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#define ATMEGA_IRQ_ADC 20 /* 0x002a ADC Conversion Complete */
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#define ATMEGA_IRQ_EE 21 /* 0x002c EEPROM Ready */
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#define ATMEGA_IRQ_ANACOMP 22 /* 0x002e ANALOG COMP Analog Comparator */
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#define ATMEGA_IRQ_T1COMPC 23 /* 0x0030 TIMER1 COMPC Timer/Countre1 Compare Match C */
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#define ATMEGA_IRQ_T3CAPT 24 /* 0x0032 TIMER3 CAPT Timer/Counter3 Capture Event */
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#define ATMEGA_IRQ_T3COMPA 25 /* 0x0034 TIMER3 COMPA Timer/Counter3 Compare Match A */
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#define ATMEGA_IRQ_T3COMPB 26 /* 0x0036 TIMER3 COMPB Timer/Counter3 Compare Match B */
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#define ATMEGA_IRQ_T3COMPC 27 /* 0x0038 TIMER3 COMPC Timer/Counter3 Compare Match C */
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#define ATMEGA_IRQ_T3OVF 28 /* 0x003a TIMER3 OVF Timer/Counter3 Overflow */
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#define ATMEGA_IRQ_U1RX 29 /* 0x003c USART1 Rx Complete */
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#define ATMEGA_IRQ_U1DRE 30 /* 0x003e USART1 Data Register Empty */
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#define ATMEGA_IRQ_U1TX 31 /* 0x0040 USART1 Tx Complete */
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#define ATMEGA_IRQ_TWI 32 /* 0x0042 TWI Two-wire Serial Interface */
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#define ATMEGA_IRQ_SPMRDY 33 /* 0x0044 Store Program Memory Ready */
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#define NR_IRQS 34
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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* Public Variables
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_AVR_INCLUDE_ATMEGA_IRQ_H */
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