c481a5b7ac
Gregory Nutt is the copyright holder for those files and he has submitted the SGA as a result we can migrate the licenses to Apache. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
136 lines
4.9 KiB
C
136 lines
4.9 KiB
C
/****************************************************************************
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* boards/arm/stm32/stm32vldiscovery/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_STM32_STM32VLDISCOVERY_INCLUDE_BOARD_H
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#define __BOARDS_ARM_STM32_STM32VLDISCOVERY_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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#include "stm32_rcc.h"
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#include "stm32.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* On-board crystal frequency is 8MHz (HSE) */
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#define STM32_BOARD_XTAL 8000000ul
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/* PLL source is HSE / 1,
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* PLL multiplier is 3: PLL output frequency is 8MHz (XTAL) x 3 = 24MHz
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*/
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#define STM32_CFGR2_PREDIV1 RCC_CFGR2_PREDIV1d1
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#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
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#define STM32_CFGR_PLLXTPRE 0
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#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx3
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#define STM32_PLL_FREQUENCY (3 * STM32_BOARD_XTAL)
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/* Use the PLL and set the SYSCLK source to be the PLL */
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#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL
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#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL
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#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY
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/* AHB clock (HCLK) is SYSCLK (24MHz) */
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#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK
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#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY
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/* APB2 clock (PCLK2) is HCLK (24MHz) */
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
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#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
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/* APB2 timers (1, 15-17) will receive PCLK2. */
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#define STM32_APB2_TIM1_CLKIN STM32_PCLK2_FREQUENCY
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#define STM32_APB2_TIM15_CLKIN STM32_PCLK2_FREQUENCY
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#define STM32_APB2_TIM16_CLKIN STM32_PCLK2_FREQUENCY
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#define STM32_APB2_TIM17_CLKIN STM32_PCLK2_FREQUENCY
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/* APB1 clock (PCLK1) is HCLK (24MHz) */
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#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK
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#define STM32_PCLK1_FREQUENCY STM32_HCLK_FREQUENCY
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/* APB1 timers (2-7, 12-14) will receive PCLK1. */
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#define STM32_APB1_TIM2_CLKIN STM32_PCLK1_FREQUENCY
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#define STM32_APB1_TIM3_CLKIN STM32_PCLK1_FREQUENCY
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#define STM32_APB1_TIM4_CLKIN STM32_PCLK1_FREQUENCY
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#define STM32_APB1_TIM5_CLKIN STM32_PCLK1_FREQUENCY
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#define STM32_APB1_TIM6_CLKIN STM32_PCLK1_FREQUENCY
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#define STM32_APB1_TIM7_CLKIN STM32_PCLK1_FREQUENCY
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#define STM32_APB1_TIM12_CLKIN STM32_PCLK1_FREQUENCY
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#define STM32_APB1_TIM13_CLKIN STM32_PCLK1_FREQUENCY
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#define STM32_APB1_TIM14_CLKIN STM32_PCLK1_FREQUENCY
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,15-17 are on APB2, others on APB1
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*/
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#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
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/* LED definitions **********************************************************/
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/* It is assumed that a generic board has 1 LED. Thus only two different
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* states can be shown. Statuses defined as "1" will light the LED, the
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* ones defined as "0" will turn the LED off.
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*/
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#define LED_STARTED 1
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#define LED_HEAPALLOCATE 1
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#define LED_IRQSENABLED 1
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#define LED_STACKCREATED 1
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#define LED_INIRQ 1
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#define LED_SIGNAL 1
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#define LED_ASSERTION 0
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#define LED_PANIC 0
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/* Button definitions *******************************************************/
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/* It is assumed that a generic board has 1 button. */
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#define BUTTON_0 0
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#define NUM_BUTTONS 1
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#define BUTTON_0_BIT (1 << BUTTON_0)
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#endif /* __BOARDS_ARM_STM32_STM32VLDISCOVERY_INCLUDE_BOARD_H */
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