2018-08-19 02:45:18 +02:00
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/*
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* Copyright (C) 2013 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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2021-08-27 04:33:23 +02:00
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#ifdef __aarch64__
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2021-08-27 04:03:07 +02:00
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// Copied and simplified macros from bionic_asm.h.
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#define ENTRY(f) \
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.text; \
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.globl f; \
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2021-08-27 04:33:23 +02:00
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.type f, @function; \
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2021-08-27 04:03:07 +02:00
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f: \
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2021-08-27 04:33:23 +02:00
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.cfi_startproc \
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2021-08-27 04:03:07 +02:00
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#define END(f) \
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.cfi_endproc; \
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.size f, .-f; \
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2018-08-19 02:45:18 +02:00
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// According to AARCH64 PCS document we need to save the following
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// registers:
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//
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// Core x19 - x30, sp (see section 5.1.1)
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// VFP d8 - d15 (see section 5.1.2)
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//
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2021-08-27 04:03:07 +02:00
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// NOTE: All the registers saved here will have 64 bit values.
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2018-08-19 02:45:18 +02:00
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// AAPCS mandates that the higher part of q registers do not need to
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// be saved by the callee.
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//
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// The internal structure of a jmp_buf is totally private.
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// Current layout (changes from release to release):
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//
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// word name description
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// 0 sigflag/cookie setjmp cookie in top 31 bits, signal mask flag in low bit
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// 1 sigmask signal mask (not used with _setjmp / _longjmp)
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2021-08-27 04:33:23 +02:00
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// 2 core_base base of core registers (x19-x30, sp)
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// 15 float_base base of float registers (d8-d15)
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// 23 checksum checksum of core registers
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// 24 reserved reserved entries (room to grow)
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2018-08-19 02:45:18 +02:00
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// 32
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2021-08-27 04:33:23 +02:00
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// 'sigmask' and 'checksum' are not used in this simplified version for valgrind.
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2018-08-19 02:45:18 +02:00
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#define _JB_SIGFLAG 0
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#define _JB_SIGMASK (_JB_SIGFLAG + 1)
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#define _JB_X30_SP (_JB_SIGMASK + 1)
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#define _JB_X28_X29 (_JB_X30_SP + 2)
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#define _JB_X26_X27 (_JB_X28_X29 + 2)
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#define _JB_X24_X25 (_JB_X26_X27 + 2)
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#define _JB_X22_X23 (_JB_X24_X25 + 2)
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#define _JB_X20_X21 (_JB_X22_X23 + 2)
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2021-08-27 04:33:23 +02:00
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#define _JB_X19 (_JB_X20_X21 + 2)
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#define _JB_D14_D15 (_JB_X19 + 1)
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2018-08-19 02:45:18 +02:00
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#define _JB_D12_D13 (_JB_D14_D15 + 2)
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#define _JB_D10_D11 (_JB_D12_D13 + 2)
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#define _JB_D8_D9 (_JB_D10_D11 + 2)
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2021-08-27 04:33:23 +02:00
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// int setjmp(jmp_buf env);
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2018-08-19 02:45:18 +02:00
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ENTRY(setjmp)
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// Save core registers.
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mov x10, sp
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stp x30, x10, [x0, #(_JB_X30_SP * 8)]
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stp x28, x29, [x0, #(_JB_X28_X29 * 8)]
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stp x26, x27, [x0, #(_JB_X26_X27 * 8)]
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stp x24, x25, [x0, #(_JB_X24_X25 * 8)]
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stp x22, x23, [x0, #(_JB_X22_X23 * 8)]
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stp x20, x21, [x0, #(_JB_X20_X21 * 8)]
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str x19, [x0, #(_JB_X19 * 8)]
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2018-08-19 02:45:18 +02:00
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// Save floating point registers.
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stp d14, d15, [x0, #(_JB_D14_D15 * 8)]
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stp d12, d13, [x0, #(_JB_D12_D13 * 8)]
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stp d10, d11, [x0, #(_JB_D10_D11 * 8)]
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stp d8, d9, [x0, #(_JB_D8_D9 * 8)]
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mov w0, #0
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ret
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2021-08-27 04:33:23 +02:00
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END(setjmp)
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2021-08-27 02:56:41 +02:00
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2021-08-27 04:33:23 +02:00
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// void longjmp(jmp_buf env, int value);
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ENTRY(longjmp)
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2018-08-19 02:45:18 +02:00
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// Restore core registers.
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ldp x30, x10, [x0, #(_JB_X30_SP * 8)]
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ldp x28, x29, [x0, #(_JB_X28_X29 * 8)]
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ldp x26, x27, [x0, #(_JB_X26_X27 * 8)]
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ldp x24, x25, [x0, #(_JB_X24_X25 * 8)]
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ldp x22, x23, [x0, #(_JB_X22_X23 * 8)]
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ldp x20, x21, [x0, #(_JB_X20_X21 * 8)]
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2021-08-27 04:33:23 +02:00
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ldr x19, [x0, #(_JB_X19 * 8)]
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2018-08-19 02:45:18 +02:00
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mov sp, x10
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// Restore floating point registers.
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ldp d14, d15, [x0, #(_JB_D14_D15 * 8)]
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ldp d12, d13, [x0, #(_JB_D12_D13 * 8)]
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ldp d10, d11, [x0, #(_JB_D10_D11 * 8)]
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ldp d8, d9, [x0, #(_JB_D8_D9 * 8)]
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// Set return value.
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cmp w1, wzr
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csinc w0, w1, wzr, ne
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ret
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2021-08-27 04:33:23 +02:00
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END(longjmp)
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2021-08-27 02:56:41 +02:00
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2021-08-27 04:33:23 +02:00
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#endif // __aarch64__
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