2022-06-18 13:26:10 +02:00
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#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_ARM64
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comment "ARM64 Options"
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2023-01-05 12:28:47 +01:00
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choice
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prompt "ARM64 Toolchain Selection"
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default ARM64_TOOLCHAIN_GNU_EABI
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config ARM64_TOOLCHAIN_GNU_EABI
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bool "Generic GNU EABI toolchain"
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select ARCH_TOOLCHAIN_GNU
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---help---
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This option should work for any modern GNU toolchain (GCC 4.5 or newer)
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config ARM64_TOOLCHAIN_CLANG
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bool "LLVM Clang toolchain"
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select ARCH_TOOLCHAIN_CLANG
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endchoice
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2022-06-18 13:26:10 +02:00
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choice
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prompt "ARM64 chip selection"
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default ARCH_CHIP_QEMU
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2022-11-22 00:32:45 +01:00
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config ARCH_CHIP_A64
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bool "Allwinner A64"
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select ARCH_CORTEX_A53
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select ARCH_HAVE_ADDRENV
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2022-12-07 04:41:39 +01:00
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select ARCH_HAVE_RESET
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2023-02-28 07:23:02 +01:00
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select ARCH_HAVE_PSCI
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2022-11-22 00:32:45 +01:00
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select ARCH_NEED_ADDRENV_MAPPING
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---help---
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Allwinner A64 SoC
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2022-06-18 13:26:10 +02:00
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config ARCH_CHIP_QEMU
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2022-10-13 15:32:59 +02:00
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bool "QEMU virt platform (ARMv8a)"
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2022-06-18 13:26:10 +02:00
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select ARCH_CORTEX_A53
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select ARCH_HAVE_ADDRENV
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select ARCH_NEED_ADDRENV_MAPPING
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---help---
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2022-10-13 15:32:59 +02:00
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QEMU virt platform (ARMv8a)
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2022-06-18 13:26:10 +02:00
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endchoice
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config ARCH_ARMV8A
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bool
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default n
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2023-02-28 10:01:24 +01:00
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select ARCH_HAVE_EL3
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2022-06-18 13:26:10 +02:00
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config ARCH_ARMV8R
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bool
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default n
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2023-02-28 10:01:24 +01:00
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select ARCH_SINGLE_SECURITY_STATE
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2022-06-18 13:26:10 +02:00
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2023-02-28 07:23:02 +01:00
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config ARCH_HAVE_PSCI
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bool "ARM PCSI (Power State Coordination Interface) Support"
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default n
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---help---
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This Power State Coordination Interface (PSCI) defines
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a standard interface for power management. the PCSI need
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to implement handling firmware at EL2 or EL3. The option
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maybe not applicable for arm core without PCSI firmware
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interface implement
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2023-02-28 10:01:24 +01:00
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config ARCH_SINGLE_SECURITY_STATE
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bool "ARM Single Security State Support"
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default n
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---help---
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Some ARM aarch64 Cortex-family processors only supports single
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security state(eg. Cortex-R82). For these Processors,
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GIC or other ARM architecture feature will with different
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configure
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config ARCH_HAVE_EL3
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bool
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default n
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---help---
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Some ARM aarch64 Cortex-family processors only supports
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EL0~El2(eg. Cortex-R82). For these Processors, the code
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runing at EL3 is not necessary and system register for EL3
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is not accessible
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2023-02-28 08:07:42 +01:00
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config ARCH_EARLY_PRINT
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bool "arch early print support"
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default n
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---help---
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The aarch64 have EL0~El3 execute level and NS/S (security state),
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the NuttX should be execute at EL1 in NS(ARmv8-A) or S(ARmv8-R)
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state. but booting NuttX have different ELs and state while with
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different platform, if NuttX runing at wrong ELs or state it will
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be not normal anymore. So we need to print something in arm64_head.S
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to debug this situation.
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Enabling this option will need to implement up_earlyserialinit and
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up_lowputc functions just you see in qemu, if you not sure,
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keeping the option disable.
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2023-02-28 07:23:02 +01:00
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2022-06-18 13:26:10 +02:00
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config ARCH_CORTEX_A53
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bool
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default n
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select ARCH_ARMV8A
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select ARM_HAVE_NEON
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select ARCH_HAVE_TRUSTZONE
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select ARCH_DCACHE
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select ARCH_ICACHE
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select ARCH_HAVE_MMU
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select ARCH_HAVE_FPU
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select ARCH_HAVE_TESTSET
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2022-10-13 15:32:59 +02:00
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config ARCH_CORTEX_A57
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bool
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default n
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select ARCH_ARMV8A
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select ARM_HAVE_NEON
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select ARCH_HAVE_TRUSTZONE
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select ARCH_DCACHE
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select ARCH_ICACHE
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select ARCH_HAVE_MMU
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select ARCH_HAVE_FPU
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select ARCH_HAVE_TESTSET
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config ARCH_CORTEX_A72
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bool
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default n
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select ARCH_ARMV8A
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select ARM_HAVE_NEON
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select ARCH_HAVE_TRUSTZONE
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select ARCH_DCACHE
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select ARCH_ICACHE
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select ARCH_HAVE_MMU
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select ARCH_HAVE_FPU
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select ARCH_HAVE_TESTSET
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2022-06-18 13:26:10 +02:00
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config ARCH_CORTEX_R82
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bool
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default n
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select ARCH_ARMV8R
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select ARCH_DCACHE
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select ARCH_ICACHE
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select ARCH_HAVE_MPU
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select ARCH_HAVE_TESTSET
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config ARCH_FAMILY
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string
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default "armv8-a" if ARCH_ARMV8A
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default "armv8-r" if ARCH_ARMV8R
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config ARCH_CHIP
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string
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2022-11-22 00:32:45 +01:00
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default "a64" if ARCH_CHIP_A64
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2022-06-18 13:26:10 +02:00
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default "qemu" if ARCH_CHIP_QEMU
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config ARCH_HAVE_TRUSTZONE
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bool
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default n
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---help---
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Automatically selected to indicate that the ARM CPU supports
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TrustZone.
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config ARM_HAVE_NEON
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bool
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default n
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---help---
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Decide whether support NEON instruction
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arch/arm64: Add support for Generic Interrupt Controller Version 2
Currently NuttX on Arm64 supports Generic Interrupt Controller (GIC) Versions 3 and 4: [`arm64_gicv3.c`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm64/src/common/arm64_gicv3.c), [`arm64_gic.h`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm64/src/common/arm64_gic.h). This PR adds support for GIC Version 2, which is needed by [Pine64 PinePhone](https://lupyuen.github.io/articles/interrupt) based on Allwinner A64 SoC.
This 64-bit implementation of GIC v2 is mostly identical to the existing GIC v2 for 32-bit Armv7-A ([`armv7-a/arm_gicv2.c`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv7-a/arm_gicv2.c), [`armv7-a/gic.h`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv7-a/gic.h)), with minor modifications to support 64-bit Registers (Interrupt Context).
- `arch/arm64/Kconfig`: Under "ARM64 Options", we added an integer option `ARM_GIC_VERSION` ("GIC version") that selects the GIC Version. Valid values are 2, 3 and 4, default is 3.
- `arch/arm64/src/common/arm64_gicv2.c`: Implements 64-bit GIC v2 based on 32-bit [`armv7-a/arm_gicv2.c`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv7-a/arm_gicv2.c) and [`armv7-a/gic.h`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv7-a/gic.h), modified to support 64-bit Registers (Interrupt Context).
Function and Macro Names have not been changed, for easier cross-referencing between the 32-bit and 64-bit implementations of GIC v2.
- `arch/arm64/src/common/arm64_gicv3.c`: Added Conditional Compilation for GIC v3. This file will not be compiled if `ARM_GIC_VERSION` is 2.
- `arch/arm64/src/common/arm64_gic.h`: Added the Version Identifier for GIC v2. At startup we read the GIC Version from hardware and verify that it matches `ARM_GIC_VERSION`.
- `arch/arm64/include/qemu/chip.h`: Added the QEMU Base Addresses for GIC v2.
- `arch/arm64/src/common/Make.defs`: Added the source file that implements GIC v2.
- `boards/arm64/qemu/qemu-armv8a/README.txt`: Added the documentation for testing GIC v2 with QEMU.
- `boards/arm64/qemu/qemu-armv8a/configs/nsh_gicv2/defconfig`: Added the Board Configuration `qemu-armv8a:nsh_gicv2` for testing GIC v2 with QEMU. Identical to `qemu-armv8a:nsh`, except that `ARM_GIC_VERSION` is 2.
2022-11-16 08:29:43 +01:00
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config ARM_GIC_VERSION
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int "GIC version"
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2022-11-22 00:32:45 +01:00
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default 2 if ARCH_CHIP_A64
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arch/arm64: Add support for Generic Interrupt Controller Version 2
Currently NuttX on Arm64 supports Generic Interrupt Controller (GIC) Versions 3 and 4: [`arm64_gicv3.c`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm64/src/common/arm64_gicv3.c), [`arm64_gic.h`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm64/src/common/arm64_gic.h). This PR adds support for GIC Version 2, which is needed by [Pine64 PinePhone](https://lupyuen.github.io/articles/interrupt) based on Allwinner A64 SoC.
This 64-bit implementation of GIC v2 is mostly identical to the existing GIC v2 for 32-bit Armv7-A ([`armv7-a/arm_gicv2.c`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv7-a/arm_gicv2.c), [`armv7-a/gic.h`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv7-a/gic.h)), with minor modifications to support 64-bit Registers (Interrupt Context).
- `arch/arm64/Kconfig`: Under "ARM64 Options", we added an integer option `ARM_GIC_VERSION` ("GIC version") that selects the GIC Version. Valid values are 2, 3 and 4, default is 3.
- `arch/arm64/src/common/arm64_gicv2.c`: Implements 64-bit GIC v2 based on 32-bit [`armv7-a/arm_gicv2.c`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv7-a/arm_gicv2.c) and [`armv7-a/gic.h`](https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/armv7-a/gic.h), modified to support 64-bit Registers (Interrupt Context).
Function and Macro Names have not been changed, for easier cross-referencing between the 32-bit and 64-bit implementations of GIC v2.
- `arch/arm64/src/common/arm64_gicv3.c`: Added Conditional Compilation for GIC v3. This file will not be compiled if `ARM_GIC_VERSION` is 2.
- `arch/arm64/src/common/arm64_gic.h`: Added the Version Identifier for GIC v2. At startup we read the GIC Version from hardware and verify that it matches `ARM_GIC_VERSION`.
- `arch/arm64/include/qemu/chip.h`: Added the QEMU Base Addresses for GIC v2.
- `arch/arm64/src/common/Make.defs`: Added the source file that implements GIC v2.
- `boards/arm64/qemu/qemu-armv8a/README.txt`: Added the documentation for testing GIC v2 with QEMU.
- `boards/arm64/qemu/qemu-armv8a/configs/nsh_gicv2/defconfig`: Added the Board Configuration `qemu-armv8a:nsh_gicv2` for testing GIC v2 with QEMU. Identical to `qemu-armv8a:nsh`, except that `ARM_GIC_VERSION` is 2.
2022-11-16 08:29:43 +01:00
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default 3
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range 2 4
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---help---
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Version of Generic Interrupt Controller (GIC) supported by the
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architecture
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2022-11-22 00:32:45 +01:00
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if ARCH_CHIP_A64
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source "arch/arm64/src/a64/Kconfig"
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endif
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2022-06-18 13:26:10 +02:00
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if ARCH_CHIP_QEMU
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source "arch/arm64/src/qemu/Kconfig"
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endif
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endif # ARCH_ARM64
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