2019-08-13 18:08:49 +02:00
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/****************************************************************************
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* boards/arm/lpc17xx_40xx/olimex-lpc1766stk/include/board.h
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2010-11-06 16:55:07 +01:00
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* include/arch/board/board.h
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*
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2012-01-03 17:26:00 +01:00
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* Copyright (C) 2010-2012 Gregory Nutt. All rights reserved.
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2011-12-31 01:11:55 +01:00
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* Author: Gregory Nutt <gnutt@nuttx.org>
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2010-11-06 16:55:07 +01:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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2019-08-13 18:08:49 +02:00
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****************************************************************************/
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2010-11-06 16:55:07 +01:00
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2019-08-13 18:08:49 +02:00
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#ifndef __BOARDS_ARM_LPC17XX_40XX_OLIMEX_LPC1766STK_BOARD_H
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#define __BOARDS_ARM_LPC17XX_40XX_OLIMEX_LPC1766STK_BOARD_H
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2010-11-06 16:55:07 +01:00
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2019-08-13 18:08:49 +02:00
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/****************************************************************************
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2010-11-06 16:55:07 +01:00
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* Included Files
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2019-08-13 18:08:49 +02:00
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****************************************************************************/
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2010-11-06 16:55:07 +01:00
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#include <nuttx/config.h>
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2012-01-03 17:26:00 +01:00
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#include <stdbool.h>
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2019-07-11 18:50:00 +02:00
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#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_40_GPIOIRQ)
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2011-12-31 02:16:48 +01:00
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# include <nuttx/irq.h>
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#endif
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2019-08-13 18:08:49 +02:00
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/****************************************************************************
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2015-04-08 17:15:17 +02:00
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* Pre-processor Definitions
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2019-08-13 18:08:49 +02:00
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* NOTE: The following definitions require lpc17_40_syscon.h.
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* It is not included here because the including C file may not have that
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* file in its include path.
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2010-11-06 16:55:07 +01:00
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*/
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#define BOARD_XTAL_FREQUENCY (12000000) /* XTAL oscillator frequency */
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#define BOARD_OSCCLK_FREQUENCY BOARD_XTAL_FREQUENCY /* Main oscillator frequency */
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2010-11-06 20:25:24 +01:00
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#define BOARD_RTCCLK_FREQUENCY (32768) /* RTC oscillator frequency */
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2010-11-06 16:55:07 +01:00
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#define BOARD_INTRCOSC_FREQUENCY (4000000) /* Internal RC oscillator frequency */
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/* This is the clock setup we configure for:
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*
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2019-08-13 18:08:49 +02:00
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* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source
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* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1
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* CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6
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2010-11-06 16:55:07 +01:00
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*/
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2019-07-11 18:50:00 +02:00
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#define LPC17_40_CCLK 80000000 /* 80Mhz */
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2010-11-06 16:55:07 +01:00
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2019-08-13 18:08:49 +02:00
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/* Select the main oscillator as the frequency source.
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* SYSCLK is then the frequency of the main oscillator.
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2010-11-06 16:55:07 +01:00
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*/
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2019-07-11 18:50:00 +02:00
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#undef CONFIG_LPC17_40_MAINOSC
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#define CONFIG_LPC17_40_MAINOSC 1
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2010-11-06 16:55:07 +01:00
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#define BOARD_SCS_VALUE SYSCON_SCS_OSCEN
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2019-08-13 18:08:49 +02:00
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/* Select the main oscillator and CCLK divider.
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* The output of the divider is CCLK.
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2010-11-06 16:55:07 +01:00
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* The input to the divider (PLLCLK) will be determined by the PLL output.
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*/
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#define BOARD_CCLKCFG_DIVIDER 6
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#define BOARD_CCLKCFG_VALUE ((BOARD_CCLKCFG_DIVIDER-1) << SYSCON_CCLKCFG_SHIFT)
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/* PLL0. PLL0 is used to generate the CPU clock divider input (PLLCLK).
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*
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* Source clock: Main oscillator
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2014-04-14 00:22:22 +02:00
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* PLL0 Multiplier value (M): 20
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2010-11-06 16:55:07 +01:00
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* PLL0 Pre-divider value (N): 1
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2010-12-01 02:57:28 +01:00
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*
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* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz
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2010-11-06 16:55:07 +01:00
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*/
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2019-07-11 18:50:00 +02:00
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#undef CONFIG_LPC17_40_PLL0
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#define CONFIG_LPC17_40_PLL0 1
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2010-11-06 16:55:07 +01:00
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#define BOARD_CLKSRCSEL_VALUE SYSCON_CLKSRCSEL_MAIN
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#define BOARD_PLL0CFG_MSEL 20
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#define BOARD_PLL0CFG_NSEL 1
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#define BOARD_PLL0CFG_VALUE \
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(((BOARD_PLL0CFG_MSEL-1) << SYSCON_PLL0CFG_MSEL_SHIFT) | \
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((BOARD_PLL0CFG_NSEL-1) << SYSCON_PLL0CFG_NSEL_SHIFT))
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/* PLL1 -- Not used. */
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2019-07-11 18:50:00 +02:00
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#undef CONFIG_LPC17_40_PLL1
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2010-11-06 16:55:07 +01:00
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#define BOARD_PLL1CFG_MSEL 36
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#define BOARD_PLL1CFG_NSEL 1
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#define BOARD_PLL1CFG_VALUE \
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(((BOARD_PLL1CFG_MSEL-1) << SYSCON_PLL1CFG_MSEL_SHIFT) | \
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((BOARD_PLL1CFG_NSEL-1) << SYSCON_PLL1CFG_NSEL_SHIFT))
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2019-08-13 18:08:49 +02:00
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/* USB divider.
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* This divider is used when PLL1 is not enabled to get the
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2010-12-01 02:57:28 +01:00
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* USB clock from PLL0:
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2010-11-06 16:55:07 +01:00
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*
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* USBCLK = PLL0CLK / 10 = 48MHz
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*/
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#define BOARD_USBCLKCFG_VALUE SYSCON_USBCLKCFG_DIV10
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/* FLASH Configuration */
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2019-07-11 18:50:00 +02:00
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#undef CONFIG_LPC17_40_FLASH
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#define CONFIG_LPC17_40_FLASH 1
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2010-11-06 16:55:07 +01:00
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#define BOARD_FLASHCFG_VALUE 0x0000303a
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2010-11-12 05:21:23 +01:00
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/* Ethernet configuration */
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//#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV44
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#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20
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2019-08-13 18:08:49 +02:00
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/* LED definitions **********************************************************/
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2011-12-31 01:11:55 +01:00
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/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
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2019-08-13 18:08:49 +02:00
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* any way.
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* The following definitions are used to access individual LEDs.
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2011-12-31 01:11:55 +01:00
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*
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* LED1 -- Connected to P1[25]
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* LED2 -- Connected to P0[4]
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*/
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2015-11-01 17:53:34 +01:00
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/* LED index values for use with board_userled() */
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2011-12-31 01:11:55 +01:00
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#define BOARD_LED1 0
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#define BOARD_LED2 1
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#define BOARD_NLEDS 2
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2015-11-01 17:53:34 +01:00
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/* LED bits for use with board_userled_all() */
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2010-11-06 16:55:07 +01:00
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2011-12-31 01:11:55 +01:00
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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#define BOARD_LED2_BIT (1 << BOARD_LED2)
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 3 LEDs
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* on board the Olimex LPC1766-STK. The following definitions
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* describe how NuttX controls the LEDs:
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*/
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2010-11-06 20:25:24 +01:00
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/* LED1 LED2 */
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2010-11-06 20:53:44 +01:00
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#define LED_STARTED 0 /* OFF OFF = Still initializing */
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#define LED_HEAPALLOCATE 0 /* OFF OFF = Still initializing */
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#define LED_IRQSENABLED 0 /* OFF OFF = Still initializing */
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#define LED_STACKCREATED 1 /* ON OFF = Initialization complete */
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2011-03-02 15:43:28 +01:00
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#define LED_INIRQ 2 /* N/C ON = In an interrupt handler */
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#define LED_SIGNAL 2 /* N/C ON = In a signal handler (glowing) */
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#define LED_ASSERTION 2 /* N/C ON = In an assertion */
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#define LED_PANIC 2 /* N/C ON = Oops! We crashed. (flashing) */
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#define LED_IDLE 3 /* OFF N/C = LPC17 in sleep mode (LED1 glowing) */
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2014-04-14 00:22:22 +02:00
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2019-08-13 18:08:49 +02:00
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/* Button definitions *******************************************************/
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/* The LPC1766-STK supports several buttons.
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* All will read "1" when open and "0" when closed
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2011-12-31 01:11:55 +01:00
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*
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* BUT1 -- Connected to P0[23]
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* BUT2 -- Connected to P2[13]
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* WAKE-UP -- Connected to P2[12]
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*
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* And a Joystick
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*
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* CENTER -- Connected to P0[4]
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* DOWN -- Connected to P2[1]
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* LEFT -- Connected to P2[7]
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* RIGHT -- Connected to P2[8]
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* UP -- Connected to P2[0]
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*/
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#define BOARD_BUTTON_1 0
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#define BOARD_BUTTON_2 1
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#define BOARD_BUTTON_WAKEUP 2
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#define BOARD_JOYSTICK_CENTER 3
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2011-12-31 02:16:48 +01:00
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#define BOARD_JOYSTICK_UP 4
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#define BOARD_JOYSTICK_DOWN 5
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#define BOARD_JOYSTICK_LEFT 6
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#define BOARD_JOYSTICK_RIGHT 7
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2011-12-31 01:11:55 +01:00
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2017-12-16 20:00:06 +01:00
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#define NUM_BUTTONS 8
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2011-12-31 01:11:55 +01:00
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#define BOARD_BUTTON_BUTTON1_BIT (1 << BOARD_BUTTON_1)
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#define BOARD_BUTTON_BUTTON2_BIT (1 << BOARD_BUTTON_2)
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#define BOARD_BUTTON_WAKEUP_BIT (1 << BOARD_BUTTON_WAKEUP)
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#define BOARD_JOYSTICK_CENTER_BIT (1 << BOARD_JOYSTICK_CENTER)
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2011-12-31 02:16:48 +01:00
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#define BOARD_JOYSTICK_UP_BIT (1 << BOARD_JOYSTICK_UP)
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2011-12-31 01:11:55 +01:00
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#define BOARD_JOYSTICK_DOWN_BIT (1 << BOARD_JOYSTICK_DOWN)
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#define BOARD_JOYSTICK_LEFT_BIT (1 << BOARD_JOYSTICK_LEFT)
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#define BOARD_JOYSTICK_RIGHT_BIT (1 << BOARD_JOYSTICK_RIGHT)
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2019-08-13 18:08:49 +02:00
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/* Alternate pin selections *************************************************/
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2010-11-06 16:55:07 +01:00
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2010-11-06 20:25:24 +01:00
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/* CAN1 GPIO PIN SIGNAL NAME
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* -------------------------------- ---- --------------
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* P0[0]/RD1/TXD3/SDA1 46 RD1
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* P0[1]/TD1/RXD3/SCL1 47 TD1
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*/
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2010-11-06 16:55:07 +01:00
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2010-11-06 20:25:24 +01:00
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#define GPIO_CAN1_RD GPIO_CAN1_RD_1
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#define GPIO_CAN1_TD GPIO_CAN1_TD_1
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2010-11-06 16:55:07 +01:00
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2010-11-06 20:25:24 +01:00
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/* UART0 GPIO PIN SIGNAL NAME
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* -------------------------------- ---- --------------
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* P0[2]/TXD0/AD0[7] 98 TXD0
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* P0[3]/RXD0/AD0[6] 99 RXD0
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*/
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2010-11-06 16:55:07 +01:00
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2010-11-06 20:25:24 +01:00
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/* UART1 GPIO PIN SIGNAL NAME
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* -------------------------------- ---- --------------
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* P0[15]/TXD1/SCK0/SCK 62 TXD1
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* P0[16]/RXD1/SSEL0/SSEL 63 RXD1
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* P0[17]/CTS1/MISO0/MISO 61 CTS1
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* P0[18]/DCD1/MOSI0/MOSI 60 DCD1
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* P0[19]/DSR1/SDA1 59 DSR1
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* P0[20]/DTR1/SCL1 58 DTR1
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* P0[22]/RTS1/TD1 56 RTS1
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*/
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2010-11-06 16:55:07 +01:00
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2010-11-06 20:25:24 +01:00
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#define GPIO_UART1_TXD GPIO_UART1_TXD_1
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#define GPIO_UART1_RXD GPIO_UART1_RXD_1
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#define GPIO_UART1_CTS GPIO_UART1_CTS_1
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#define GPIO_UART1_DCD GPIO_UART1_DCD_1
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#define GPIO_UART1_DSR GPIO_UART1_DSR_1
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#define GPIO_UART1_DTR GPIO_UART1_DTR_1
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#define GPIO_UART1_RTS GPIO_UART1_RTS_1
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/* SSP0 GPIO PIN SIGNAL NAME
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* -------------------------------- ---- --------------
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* P1[21]/MCABORT/PWM1[3]/SSEL0 35 SSEL0
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* P1[20]/MCFB0/PWM1[2]/SCK0 34 SCK0
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* P1[23]/MCFB1/PWM1[4]/MISO0 37 MISO0
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* P1[24]/MCFB2/PWM1[5]/MOSI0 38 MOSI0
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*/
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2010-11-06 16:55:07 +01:00
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2010-11-06 20:25:24 +01:00
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#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_2
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#define GPIO_SSP0_SCK GPIO_SSP0_SCK_2
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#define GPIO_SSP0_MISO GPIO_SSP0_MISO_2
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#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_2
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/* SSP1 GPIO PIN SIGNAL NAME
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* -------------------------------- ---- --------------
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* P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 SSEL1
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* P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 SCK1
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* P0[8]/I2STX_WS/MISO1/MAT2[2] 77 MISO1
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* P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 MOSI1
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2010-11-06 16:55:07 +01:00
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*/
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2010-11-06 20:25:24 +01:00
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#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1
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/* I2C2 GPIO PIN SIGNAL NAME
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* -------------------------------- ---- --------------
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* P0[10]/TXD2/SDA2/MAT3[0] 48 SDA2
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* P0[11]/RXD2/SCL2/MAT3[1] 49 SCL2
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*/
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2010-11-06 16:55:07 +01:00
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2010-11-06 20:25:24 +01:00
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/* AD GPIO PIN SIGNAL NAME
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* -------------------------------- ---- --------------
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* P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 TEMP
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* P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 MIC IN
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2019-08-13 18:08:49 +02:00
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*/
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2010-11-06 20:25:24 +01:00
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/* USB GPIO PIN SIGNAL NAME
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* -------------------------------- ---- --------------
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* P0[27]/SDA0/USB_SDA 25 USB_SDA
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* P0[28]/SCL0/USB_SCL 24 USB_SCL
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* P0[29]/USB_D+ 29 USB_D+
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* P0[30]/USB_D- 30 USB_D-
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2010-11-11 03:19:40 +01:00
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* P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 32 USB_UP_LED
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* P1[19]/MC0A/#USB_PPWR/CAP1[1] 33 #USB_PPWR
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2010-11-06 20:25:24 +01:00
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* P1[22]/MC0B/USB_PWRD/MAT1[0] 36 USBH_PWRD
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* P1[27]/CLKOUT/#USB_OVRCR/CAP0[1] 43 #USB_OVRCR
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* P1[30]/VBUS/AD0[4] 21 VBUS
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* P2[9]/USB_CONNECT/RXD2 64 USBD_CONNECT
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*/
|
2010-11-06 16:55:07 +01:00
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|
2010-12-31 00:08:46 +01:00
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#ifdef GPIO_USB_PPWR /* We can only redefine this if they have been defined */
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/* The Olimex LPC1766-STK has 10K pull-ups on PPWR and OVRCR and a 100k
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* pull-down on PWRD so we should make sure that the outputs float.
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*/
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# undef GPIO_USB_PPWR
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|
# define GPIO_USB_PPWR (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN19)
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|
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|
# undef GPIO_USB_OVRCR
|
|
|
|
# define GPIO_USB_OVRCR (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN27)
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|
|
# undef GPIO_USB_PWRD
|
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|
|
# define GPIO_USB_PWRD (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN22)
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|
|
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|
/* In host mode (only) there are also 15K pull-downs on D+ and D- */
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|
# ifdef CONFIG_USBHOST
|
|
|
|
# undef GPIO_USB_DP
|
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|
|
# define GPIO_USB_DP (GPIO_ALT1 | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN29)
|
|
|
|
# undef GPIO_USB_DM
|
|
|
|
# define GPIO_USB_DM (GPIO_ALT1 | GPIO_FLOAT | GPIO_PORT0 | GPIO_PIN30)
|
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|
# endif
|
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|
|
#endif
|
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|
2010-11-06 20:25:24 +01:00
|
|
|
/* Ethernet GPIO PIN SIGNAL NAME
|
|
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|
* -------------------------------- ---- --------------
|
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|
* P1[0]/ENET_TXD0 95 E_TXD0
|
|
|
|
* P1[1]/ENET_TXD1 94 E_TXD1
|
|
|
|
* P1[4]/ENET_TX_EN 93 E_TX_EN
|
|
|
|
* P1[8]/ENET_CRS 92 E_CRS
|
|
|
|
* P1[9]/ENET_RXD0 91 E_RXD0
|
|
|
|
* P1[10]/ENET_RXD1 90 E_RXD1
|
|
|
|
* P1[14]/ENET_RX_ER 89 E_RX_ER
|
|
|
|
* P1[15]/ENET_REF_CLK 88 E_REF_CLK
|
|
|
|
* P1[16]/ENET_MDC 87 E_MDC
|
|
|
|
* P1[17]/ENET_MDIO 86 E_MDIO
|
|
|
|
*/
|
|
|
|
|
2010-11-11 03:19:40 +01:00
|
|
|
#define GPIO_ENET_MDC GPIO_ENET_MDC_1
|
|
|
|
#define GPIO_ENET_MDIO GPIO_ENET_MDIO_1
|
|
|
|
|
2010-11-06 20:25:24 +01:00
|
|
|
/* Trace GPIO PIN SIGNAL NAME
|
|
|
|
* -------------------------------- ---- --------------
|
|
|
|
* P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 TRACE_D3
|
|
|
|
* P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 TRACE_D2
|
|
|
|
* P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 TRACE_D1
|
|
|
|
* P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 TRACE_D0
|
|
|
|
* P2[6]/PCAP1[0]/RI1/TRACECLK 67 TRACE_CLK
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* EINT GPIO PIN SIGNAL NAME
|
|
|
|
* -------------------------------- ---- --------------
|
|
|
|
* P2[11]/#EINT1/I2STX_CLK 52 #EINT1
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* ?
|
|
|
|
* P0[26]/AD0[3]/AOUT/RXD3 6 AOUT
|
|
|
|
* P1[31]/SCK1/AD0[5] 20 AIN5
|
|
|
|
*/
|
2010-11-06 16:55:07 +01:00
|
|
|
|
2020-01-31 19:07:39 +01:00
|
|
|
#endif /* __BOARDS_ARM_LPC17XX_40XX_OLIMEX_LPC1766STK_INCLUDE_BOARD_H */
|