2012-04-06 17:49:35 +02:00
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#
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# For a description of the syntax of this configuration file,
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2015-06-28 16:08:57 +02:00
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# see the file kconfig-language.txt in the NuttX tools repository.
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2012-04-06 17:49:35 +02:00
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#
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2013-04-30 20:37:34 +02:00
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2020-02-15 14:38:35 +01:00
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menuconfig MTD
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bool "Memory Technology Device (MTD) Support"
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default n
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---help---
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Memory Technology Device (MTD) drivers. Some simple drivers for
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memory technologies like FLASH, EEPROM, NVRAM, etc. See
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include/nuttx/mtd/mtd.h
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2020-02-08 08:30:09 +01:00
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2020-02-15 14:38:35 +01:00
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(Note: This is a simple memory interface and should not be
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confused with the "real" MTD developed at infradead.org. This
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logic is unrelated; I just used the name MTD because I am not
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aware of any other common way to refer to this class of devices).
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if MTD
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2013-05-01 18:59:57 +02:00
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2013-04-30 20:37:34 +02:00
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config MTD_PARTITION
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bool "Support MTD partitions"
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default n
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---help---
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MTD partitions are build as MTD drivers that manage a sub-region
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of the FLASH memory. The contain the original FLASH MTD driver and
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simply manage all accesses to assure that (1) FLASH accesses are
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always offset to the beginning of the partition, and (2) that FLASH
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accesses do not extend outside of the partition.
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A FLASH device may be broken up into several partitions managed,
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2016-04-17 19:20:07 +02:00
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each managed by a separate MTD driver. The MTD partition interface
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2013-04-30 20:37:34 +02:00
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is described in:
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2013-11-15 18:22:23 +01:00
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include/nuttx/mtd/mtd.h
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2013-04-30 20:37:34 +02:00
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FAR struct mtd_dev_s *mtd_partition(FAR struct mtd_dev_s *mtd, off_t offset, off_t nblocks);
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Each call to mtd_partition() will create a new MTD driver instance
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managing the sub-region of flash beginning at 'offset' (in blocks)
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and of size 'nblocks' on the device specified by 'mtd'.
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2014-07-12 00:19:17 +02:00
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config FTL_WRITEBUFFER
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bool "Enable write buffering in the FTL layer"
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default n
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2020-03-21 17:36:26 +01:00
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depends on DRVR_WRITEBUFFER
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2014-07-12 00:19:17 +02:00
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config FTL_READAHEAD
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bool "Enable read-ahead buffering in the FTL layer"
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default n
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depends on DRVR_READAHEAD
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2014-03-25 00:45:45 +01:00
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config MTD_SECT512
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bool "512B sector conversion"
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default n
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---help---
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If enabled, a MTD driver will be created that will convert the
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sector size of any other MTD driver to a 512 byte "apparent" sector
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size. The managed MTD driver in this case must have an erase block
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2016-04-17 19:20:07 +02:00
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size that is greater than 512B and an even multiple of 512B.
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2014-03-25 00:45:45 +01:00
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if MTD_SECT512
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config MTD_SECT512_ERASED_STATE
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hex "Erased state of the FLASH"
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default 0xff
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config MTD_SECT512_READONLY
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bool "512B read-only"
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default n
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endif # MTD_SECT512
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2013-12-12 16:21:55 +01:00
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config MTD_PARTITION_NAMES
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bool "Support MTD partition naming"
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depends on FS_PROCFS
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depends on MTD_PARTITION
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default n
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---help---
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MTD partitions can be assigned a name for reporting via the procfs
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file system interface. This adds an API which must be called to
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specify the partition name.
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2013-05-01 18:59:57 +02:00
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config MTD_BYTE_WRITE
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bool "Byte write"
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default n
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---help---
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Some devices (such as the EON EN25F80) support writing an arbitrary
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number of bytes to FLASH. This setting enables MTD interfaces to
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support such writes. The SMART file system can take advantage of
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this option if it is enabled.
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2014-07-11 19:20:11 +02:00
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config MTD_WRBUFFER
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2014-07-12 00:51:50 +02:00
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bool "Enable MTD write buffering"
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2014-07-11 19:20:11 +02:00
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default n
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depends on DRVR_WRITEBUFFER
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2014-07-12 00:19:17 +02:00
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select DRVR_INVALIDATE
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select DRVR_READBYTES
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2014-07-11 19:20:11 +02:00
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---help---
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Build the mtd_rwbuffer layer and enable support for write buffering.
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if MTD_WRBUFFER
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config MTD_NWRBLOCKS
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int "MTD write buffer size"
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default 4
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---help---
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The size of the MTD write buffer (in blocks)
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endif # MTD_WRBUFFER
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config MTD_READAHEAD
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2014-07-12 00:51:50 +02:00
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bool "Enable MTD read-ahead buffering"
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2014-07-11 19:20:11 +02:00
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default n
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depends on DRVR_READAHEAD
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2014-07-12 00:19:17 +02:00
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select DRVR_INVALIDATE
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select DRVR_READBYTES
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2014-07-11 19:20:11 +02:00
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---help---
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Build the mtd_rwbuffer layer and enable support for read-ahead buffering.
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if MTD_READAHEAD
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config MTD_NRDBLOCKS
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int "MTD read-head buffer size"
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default 4
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---help---
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The size of the MTD read-ahead buffer (in blocks)
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endif # MTD_READAHEAD
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2015-11-12 20:40:18 +01:00
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config MTD_PROGMEM
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bool "Enable on-chip program FLASH MTD device"
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default n
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2021-03-01 16:02:18 +01:00
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depends on ARCH_HAVE_PROGMEM
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2015-11-12 20:40:18 +01:00
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---help---
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Enable to support an MTD device that supports the on-chip FLASH
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using the interfaces defined in include/nuttx/progmem. Those
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interfaces must be exported by chip-specific logic.
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2021-11-16 12:04:02 +01:00
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if MTD_PROGMEM
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endif #MTD_PROGMEM
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2013-11-01 14:39:20 +01:00
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config MTD_CONFIG
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bool "Enable Dev Config (MTD based) device"
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default n
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---help---
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Provides a /dev/config device for saving / restoring application
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configuration data to a standard MTD device or partition.
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2014-07-11 19:20:11 +02:00
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if MTD_CONFIG
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2013-11-01 19:22:55 +01:00
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config MTD_CONFIG_RAM_CONSOLIDATE
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bool "Always use RAM consolidation method (work in progress)"
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default n
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---help---
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When the MTD device used for /dev/config contains more than one
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erase block, the "unused entry" consolidation reserves one erase
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block by default for cleanup purposes. This consumes the minimum
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amount of RAM, however it "wastes" one erase block on the device.
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(For configurations that have only a single erase block assigned
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to the config device, RAM consolidation is the ONLY option.)
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2016-04-17 19:20:07 +02:00
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Another approach is to allow the driver to use the entire MTD
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2013-11-01 19:22:55 +01:00
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device (or partition) to save config data, and then allocate a
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RAM buffer (the size of one erase block) to perform the
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consolidation. Enabling this feature basically trades off RAM
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usage for FLASH usage. If the MTD device used for config data
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has small erase sizes (4K, etc.) and there is plenty of free RAM
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available, then this is probably a good option.
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Another benefit of this option is it reduces code space a bit
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since the "reserved block" consolidate routine is not needed.
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config MTD_CONFIG_ERASEDVALUE
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hex "Erased value of bytes on the MTD device"
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default 0xff
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---help---
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Specifies the value of the erased state of the MTD FLASH. For
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most FLASH parts, this is 0xff, but could also be zero depending
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on the device.
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2018-12-20 21:14:40 +01:00
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config MTD_CONFIG_NAMED
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bool "Use item NAMES instead of ID/enumeration in Dev Config device"
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default n
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---help---
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Changes config item identification from ID/INST to NAMED values.
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config MTD_CONFIG_NAME_LEN
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int "Dev Config item max name length"
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default 24
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depends on MTD_CONFIG_NAMED
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---help---
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Sets the maximum length of config item names.
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2014-07-11 19:20:11 +02:00
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endif # MTD_CONFIG
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2013-05-01 18:59:57 +02:00
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comment "MTD Device Drivers"
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2013-12-04 18:56:56 +01:00
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menuconfig MTD_NAND
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bool "MTD NAND support"
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2021-09-02 11:02:30 +02:00
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depends on ALLOW_BSD_COMPONENTS
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2013-12-04 18:56:56 +01:00
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default n
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---help---
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Enable support for NAND FLASH devices.
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2013-11-15 18:22:23 +01:00
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if MTD_NAND
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2013-11-15 21:11:21 +01:00
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2013-11-16 18:46:35 +01:00
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config MTD_NAND_MAXNUMBLOCKS
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int "Max blocks"
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default 1024
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---help---
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Maximum number of blocks in a device
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config MTD_NAND_MAXNUMPAGESPERBLOCK
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int "Max pages per block"
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default 256
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---help---
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Maximum number of pages in one block
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config MTD_NAND_MAXPAGEDATASIZE
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int "Max page size"
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default 4096
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---help---
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Maximum size of the data area of one page, in bytes.
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config MTD_NAND_MAXPAGESPARESIZE
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int "Max size of spare area"
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default 256
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---help---
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Maximum size of the spare area of one page, in bytes.
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config MTD_NAND_MAXSPAREECCBYTES
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int "Max number of ECC bytes"
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default 48
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---help---
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Maximum number of ECC bytes stored in the spare for one single page.
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2013-11-18 16:43:44 +01:00
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config MTD_NAND_BLOCKCHECK
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bool "Block check"
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default y
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---help---
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Enable support for ECC and bad block checking.
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config MTD_NAND_SWECC
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2018-07-09 02:24:45 +02:00
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bool "Software ECC support"
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2013-11-18 16:43:44 +01:00
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default n if ARCH_NAND_HWECC
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default y if !ARCH_NAND_HWECC
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---help---
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Build in logic to support software calculation of ECC.
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config MTD_NAND_HWECC
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bool "Hardware ECC support"
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default n
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depends on ARCH_NAND_HWECC
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---help---
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Build in logic to support hardware calculation of ECC.
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2013-11-18 18:42:17 +01:00
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config MTD_NAND_MAXSPAREEXTRABYTES
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int "Max extra free bytes"
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default 206
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---help---
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Maximum number of extra free bytes inside the spare area of a page.
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2013-11-15 21:11:21 +01:00
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config MTD_NAND_EMBEDDEDECC
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bool "Support devices with Embedded ECC"
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default n
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2013-11-15 22:56:24 +01:00
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---help---
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2013-11-15 21:11:21 +01:00
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Some NAND devices have internal, embedded ECC function. One (the
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only one supported) is Micron, 4-bit ECC, device size = 1Gb or 2Gb
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or 4Gb.
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2013-11-15 18:22:23 +01:00
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endif # MTD_NAND
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2013-04-30 23:54:02 +02:00
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config RAMMTD
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bool "RAM-based MTD driver"
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default n
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---help---
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Build support for a RAM-based MTD driver.
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if RAMMTD
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config RAMMTD_BLOCKSIZE
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int "RAM MTD block size"
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default 512
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config RAMMTD_ERASESIZE
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int "RAM MTD erase block size"
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default 4096
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config RAMMTD_ERASESTATE
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hex "Simulated erase state"
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default 0xff
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config RAMMTD_FLASHSIM
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bool "RAM MTD FLASH Simulation"
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default n
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---help---
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RAMMTD_FLASHSIM will add some extra logic to improve the level of
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FLASH simulation.
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2016-04-17 22:13:44 +02:00
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endif # RAMMTD
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2013-04-30 23:54:02 +02:00
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2015-11-28 16:00:26 +01:00
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config FILEMTD
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bool "File-based MTD driver"
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default n
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---help---
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Build support for a File-based MTD driver.
|
|
|
|
|
|
|
|
|
|
if FILEMTD
|
|
|
|
|
|
|
|
|
|
config FILEMTD_BLOCKSIZE
|
2021-12-04 13:48:15 +01:00
|
|
|
|
int "File MTD default block size"
|
2015-11-28 16:00:26 +01:00
|
|
|
|
default 512
|
|
|
|
|
|
|
|
|
|
config FILEMTD_ERASESIZE
|
2021-12-04 13:48:15 +01:00
|
|
|
|
int "File MTD default erase block size"
|
2015-11-28 16:00:26 +01:00
|
|
|
|
default 4096
|
|
|
|
|
|
|
|
|
|
config FILEMTD_ERASESTATE
|
|
|
|
|
hex "Simulated erase state"
|
|
|
|
|
default 0xff
|
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # FILEMTD
|
2015-11-28 16:00:26 +01:00
|
|
|
|
|
2021-12-04 13:48:15 +01:00
|
|
|
|
config NULLMTD
|
|
|
|
|
bool "MTD null driver"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Build support for a MTD null driver. It simulates an always erased
|
|
|
|
|
MTD device.
|
|
|
|
|
|
|
|
|
|
if NULLMTD
|
|
|
|
|
|
|
|
|
|
config NULLMTD_BLOCKSIZE
|
|
|
|
|
int "MTD null default block size"
|
|
|
|
|
default 512
|
|
|
|
|
|
|
|
|
|
config NULLMTD_ERASESIZE
|
|
|
|
|
int "MTD null detault erase block size"
|
|
|
|
|
default 4096
|
|
|
|
|
|
|
|
|
|
config NULLMTD_ERASESTATE
|
|
|
|
|
hex "Simulated erase state"
|
|
|
|
|
default 0xff
|
|
|
|
|
|
|
|
|
|
endif # NULLMTD
|
|
|
|
|
|
2012-04-07 16:50:57 +02:00
|
|
|
|
config MTD_AT24XX
|
2013-09-12 17:44:38 +02:00
|
|
|
|
bool "I2C-based AT24xx eeprom"
|
2012-04-07 16:50:57 +02:00
|
|
|
|
default n
|
|
|
|
|
select I2C
|
2013-04-30 20:37:34 +02:00
|
|
|
|
---help---
|
2013-09-12 17:44:38 +02:00
|
|
|
|
Build support for I2C-based AT24CXX EEPROM(at24c32, at24c64,
|
2013-04-30 20:37:34 +02:00
|
|
|
|
at24c128, at24c256)
|
2012-04-07 16:50:57 +02:00
|
|
|
|
|
2013-02-11 22:44:00 +01:00
|
|
|
|
if MTD_AT24XX
|
|
|
|
|
|
2015-11-17 14:40:17 +01:00
|
|
|
|
config AT24XX_MULTI
|
|
|
|
|
bool "Multiple AT24XX devices"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Build in additional support for multiple AT24XX devices, each with
|
2016-04-17 19:20:07 +02:00
|
|
|
|
dynamically allocated device structures with a separate I2C
|
2015-11-17 14:40:17 +01:00
|
|
|
|
addresses (but otherwise identical -- support for multiple, different
|
|
|
|
|
AT24xx, devices not yet supported).
|
|
|
|
|
|
2012-04-07 16:50:57 +02:00
|
|
|
|
config AT24XX_SIZE
|
2015-03-17 21:27:27 +01:00
|
|
|
|
int "AT24xx size (Kbit)"
|
2012-04-07 16:50:57 +02:00
|
|
|
|
default 64
|
2015-03-17 21:27:27 +01:00
|
|
|
|
---help---
|
2013-09-12 17:44:38 +02:00
|
|
|
|
This is the XX in the AT24Cxx part number. For example, if you have a
|
|
|
|
|
AT 24C512, then the correct value is 512. This value is also the capacity
|
|
|
|
|
of the part in kilobits. For example, the 24C512 supports 512 Kbits or
|
|
|
|
|
512 /8 = 64 KiB.
|
2012-04-07 16:50:57 +02:00
|
|
|
|
|
|
|
|
|
config AT24XX_ADDR
|
2013-09-12 17:44:38 +02:00
|
|
|
|
hex "AT24XX I2C address"
|
2012-04-07 16:50:57 +02:00
|
|
|
|
default 0x50
|
2013-09-12 17:44:38 +02:00
|
|
|
|
range 0x50 0x57
|
2015-11-17 14:40:17 +01:00
|
|
|
|
depends on !AT24XX_MULTI
|
2015-03-17 21:27:27 +01:00
|
|
|
|
---help---
|
|
|
|
|
The I2C address of the FLASH part. This is should be 0b01010aaa
|
|
|
|
|
(where aaa is determined by board/pin configuration).
|
|
|
|
|
|
|
|
|
|
For accesses to "extended memory" accesses, the driver will set
|
|
|
|
|
bit 3 of this address using 0xb01011aaa as the I2C address.
|
|
|
|
|
|
|
|
|
|
config AT24XX_EXTENDED
|
|
|
|
|
bool "Extended memory"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
2016-04-17 19:20:07 +02:00
|
|
|
|
If the device supports extended memory, then this operation may be set
|
2015-03-17 21:27:27 +01:00
|
|
|
|
to enabled the MTDIOC_EXTENDED ioctl() operation. When the
|
|
|
|
|
extended operation is selected, calls to the driver read method will
|
|
|
|
|
return data from the extended memory region.
|
|
|
|
|
|
|
|
|
|
config AT24XX_EXTSIZE
|
|
|
|
|
int "Extended memory size (bytes)"
|
|
|
|
|
default 0
|
|
|
|
|
depends on AT24XX_EXTENDED
|
|
|
|
|
---help---
|
|
|
|
|
If the device supports extended memory, then this option provides
|
|
|
|
|
the size of the memory in bytes.
|
|
|
|
|
|
|
|
|
|
Other, block-oriented access are not effected by this setting
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
2015-10-21 05:34:34 +02:00
|
|
|
|
config AT24XX_FREQUENCY
|
|
|
|
|
int "AT24xx I2C bus frequency"
|
|
|
|
|
default 100000
|
|
|
|
|
---help---
|
2016-04-17 22:13:44 +02:00
|
|
|
|
Set the I2C frequency to use when accessing the AT24CXX EEPROM. This value
|
|
|
|
|
must represent a valid I2C speed (normally less than 400.000) or the driver
|
|
|
|
|
might fail.
|
2015-10-21 05:34:34 +02:00
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_AT24XX
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
2013-08-05 00:56:41 +02:00
|
|
|
|
config MTD_AT25
|
|
|
|
|
bool "SPI-based AT25 FLASH"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
|
|
|
|
|
if MTD_AT25
|
|
|
|
|
|
|
|
|
|
config AT25_SPIMODE
|
|
|
|
|
int "AT25 SPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config AT25_SPIFREQUENCY
|
|
|
|
|
int "AT25 SPI Frequency"
|
|
|
|
|
default 20000000
|
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_AT25
|
2013-08-05 00:56:41 +02:00
|
|
|
|
|
2012-04-07 16:50:57 +02:00
|
|
|
|
config MTD_AT45DB
|
|
|
|
|
bool "SPI-based AT45DB flash"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
|
|
|
|
if MTD_AT45DB
|
|
|
|
|
|
2012-04-07 16:50:57 +02:00
|
|
|
|
config AT45DB_FREQUENCY
|
2013-08-05 00:56:41 +02:00
|
|
|
|
int "AT45DB frequency"
|
2012-04-07 16:50:57 +02:00
|
|
|
|
default 1000000
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
2012-04-07 16:50:57 +02:00
|
|
|
|
config AT45DB_PREWAIT
|
2013-08-05 00:56:41 +02:00
|
|
|
|
bool "Enable higher performance write logic"
|
2012-04-07 16:50:57 +02:00
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
config AT45DB_PWRSAVE
|
2013-08-05 00:56:41 +02:00
|
|
|
|
bool "Enable power save"
|
2012-04-07 16:50:57 +02:00
|
|
|
|
default n
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_AT45DB
|
2012-09-17 20:35:37 +02:00
|
|
|
|
|
2016-06-09 05:13:06 +02:00
|
|
|
|
config MTD_IS25XP
|
|
|
|
|
bool "SPI-based IS25XP FLASH"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
|
|
|
|
|
if MTD_IS25XP
|
|
|
|
|
|
|
|
|
|
config IS25XP_SPIMODE
|
|
|
|
|
int "IS25 SPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config IS25XP_SPIFREQUENCY
|
|
|
|
|
int "IS25 SPI Frequency"
|
|
|
|
|
default 20000000
|
|
|
|
|
|
|
|
|
|
endif # MTD_IS25XP
|
|
|
|
|
|
2013-05-01 20:04:39 +02:00
|
|
|
|
config MTD_M25P
|
2017-10-02 20:33:54 +02:00
|
|
|
|
bool "SPI-based M25P/MT25Q FLASH"
|
2012-04-07 16:50:57 +02:00
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
|
2013-05-01 20:04:39 +02:00
|
|
|
|
if MTD_M25P
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
2013-05-01 20:04:39 +02:00
|
|
|
|
config M25P_SPIMODE
|
|
|
|
|
int "M25P SPI mode"
|
2012-04-07 16:50:57 +02:00
|
|
|
|
default 0
|
|
|
|
|
|
2016-03-17 14:37:45 +01:00
|
|
|
|
config M25P_SPIFREQUENCY
|
|
|
|
|
int "M25P SPI Frequency"
|
|
|
|
|
default 20000000
|
|
|
|
|
|
2013-05-01 20:04:39 +02:00
|
|
|
|
config M25P_MANUFACTURER
|
|
|
|
|
hex "M25P manufacturers ID"
|
2012-04-07 16:50:57 +02:00
|
|
|
|
default 0x20
|
|
|
|
|
---help---
|
|
|
|
|
Various manufacturers may have produced the parts. 0x20 is the manufacturer ID
|
|
|
|
|
for the STMicro MP25x serial FLASH. If, for example, you are using the a Macronix
|
|
|
|
|
International MX25 serial FLASH, the correct manufacturer ID would be 0xc2.
|
|
|
|
|
|
2013-05-01 20:04:39 +02:00
|
|
|
|
config M25P_MEMORY_TYPE
|
|
|
|
|
hex "M25P memory type ID"
|
2013-05-01 03:10:54 +02:00
|
|
|
|
default 0x20
|
|
|
|
|
---help---
|
|
|
|
|
The memory type for M25 "P" series is 0x20, but the driver also supports "F" series
|
|
|
|
|
devices, such as the EON EN25F80 part which adds a 4K sector erase capability. The
|
2013-05-03 20:52:33 +02:00
|
|
|
|
memory type for "F" series parts from EON is 0x31. The 4K sector erase size will
|
2018-07-09 02:24:45 +02:00
|
|
|
|
automatically be enabled when filesystems that can use it are enabled, such as SMART.
|
2013-05-01 03:10:54 +02:00
|
|
|
|
|
2017-10-02 20:33:54 +02:00
|
|
|
|
config MT25Q_MEMORY_TYPE
|
|
|
|
|
hex "MT25Q memory type ID"
|
|
|
|
|
default 0xBA
|
|
|
|
|
---help---
|
|
|
|
|
The memory type for MT25 "Q" series is 0xBA.
|
|
|
|
|
|
2013-05-03 22:32:08 +02:00
|
|
|
|
config M25P_SUBSECTOR_ERASE
|
|
|
|
|
bool "Sub-Sector Erase"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Some devices (such as the EON EN25F80) support a smaller erase block
|
|
|
|
|
size (4K vs 64K). This option enables support for sub-sector erase.
|
|
|
|
|
The SMART file system can take advantage of this option if it is enabled.
|
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_M25P
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
2016-09-02 19:00:04 +02:00
|
|
|
|
config MTD_MX25L
|
|
|
|
|
bool "SPI-based MX25L3233F / MX25L6433F"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
---help---
|
|
|
|
|
SPI-based driver for Macronix MX25L3233F or MX25L6433F.
|
|
|
|
|
|
|
|
|
|
if MTD_MX25L
|
|
|
|
|
|
|
|
|
|
config MX25L_SPIMODE
|
|
|
|
|
int "MX25L SPI mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config MX25L_SPIFREQUENCY
|
|
|
|
|
int "MX25L SPI Frequency"
|
|
|
|
|
default 20000000
|
|
|
|
|
|
|
|
|
|
config MX25L_SECTOR512
|
|
|
|
|
bool "Simulate 512 byte Erase Blocks"
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config MX25L_SUBSECTOR_ERASE
|
|
|
|
|
bool "Sub-Sector Erase"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Some devices (such as the EON EN25F80) support a smaller erase block
|
|
|
|
|
size (4K vs 64K). This option enables support for sub-sector erase.
|
|
|
|
|
The SMART file system can take advantage of this option if it is enabled.
|
|
|
|
|
|
|
|
|
|
config MX25L_DEBUG
|
|
|
|
|
bool "Enable driver debug features"
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
endif # MTD_MX25L
|
|
|
|
|
|
2017-11-29 14:15:36 +01:00
|
|
|
|
config MTD_MX35
|
|
|
|
|
bool "SPI-based MX35LF1GE4AB / MX35LF2GE4AB"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
---help---
|
|
|
|
|
SPI-based driver for Macronix MX35LF1GE4AB or MX35LF2GE4AB.
|
|
|
|
|
|
|
|
|
|
if MTD_MX35
|
|
|
|
|
|
|
|
|
|
config MX35_SPIMODE
|
|
|
|
|
int "MX35 SPI mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config MX35_SPIFREQUENCY
|
|
|
|
|
int "MX35 SPI Frequency"
|
|
|
|
|
default 104000000
|
|
|
|
|
---help---
|
|
|
|
|
SPI frequency for MX35 is 104 MHz.
|
|
|
|
|
|
|
|
|
|
endif # MTD_MX35
|
|
|
|
|
|
2015-11-07 18:51:09 +01:00
|
|
|
|
config MTD_S25FL1
|
|
|
|
|
bool "QuadSPI-based S25FL1 FLASH"
|
2015-08-24 16:00:39 +02:00
|
|
|
|
default n
|
|
|
|
|
|
2015-11-07 18:51:09 +01:00
|
|
|
|
if MTD_S25FL1
|
2015-08-24 16:00:39 +02:00
|
|
|
|
|
2015-11-07 18:51:09 +01:00
|
|
|
|
config S25FL1_QSPIMODE
|
|
|
|
|
int "S25FL1 QuadSPI Mode"
|
2015-08-24 16:00:39 +02:00
|
|
|
|
default 0
|
|
|
|
|
|
2015-11-07 18:51:09 +01:00
|
|
|
|
config S25FL1_QSPI_FREQUENCY
|
|
|
|
|
int "S25FL1 QuadSPI Frequency"
|
2015-08-30 02:54:20 +02:00
|
|
|
|
default 108000000
|
|
|
|
|
---help---
|
|
|
|
|
Per data sheet:
|
|
|
|
|
– Normal Read (Serial):
|
|
|
|
|
– 50 MHz clock rate (-40°C to +85°C/105°C)
|
|
|
|
|
– 45 MHz clock rate (-40°C to +125°C)
|
|
|
|
|
– Fast Read (Serial):
|
|
|
|
|
– 108 MHz clock rate (-40°C to +85°C/105°C)
|
|
|
|
|
– 97 MHz clock rate (-40°C to +125°C)
|
|
|
|
|
– Dual Read:
|
|
|
|
|
– 108 MHz clock rate (-40°C to +85°C/105°C)
|
|
|
|
|
– 97 MHz clock rate (-40°C to +125°C)
|
|
|
|
|
– Quad Read:
|
|
|
|
|
– 108 MHz clock rate (-40°C to +85°C/105°C)
|
|
|
|
|
– 97 MHz clock rate for S25FL164K (-40°C to +125°C)
|
|
|
|
|
|
|
|
|
|
- Clock frequency for all SPI commands except for Read Data
|
|
|
|
|
command (0x03) and Fast Read command (0x0b): 108 MHz
|
|
|
|
|
- Clock frequency for Read Data command (0x03): 50 MHz
|
|
|
|
|
- Clock frequency for all Fast Read commands SIO and MIO: 108 MHz
|
|
|
|
|
|
|
|
|
|
In this implementation, only "Quad" reads are performed.
|
2015-08-24 16:00:39 +02:00
|
|
|
|
|
2015-11-07 18:51:09 +01:00
|
|
|
|
config S25FL1_SECTOR512
|
2015-08-24 16:00:39 +02:00
|
|
|
|
bool "Simulate 512 byte Erase Blocks"
|
|
|
|
|
default n
|
|
|
|
|
|
2015-11-07 18:51:09 +01:00
|
|
|
|
config S25FL1_SCRAMBLE
|
2015-08-28 20:01:08 +02:00
|
|
|
|
bool "Scramble data"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
2016-04-17 19:20:07 +02:00
|
|
|
|
Requires driver support for data scrambling/descrambling.
|
2015-08-28 20:01:08 +02:00
|
|
|
|
|
2015-11-07 18:51:09 +01:00
|
|
|
|
config S25FL1_SCRAMBLE_KEY
|
2015-08-28 20:01:08 +02:00
|
|
|
|
hex "Scramble key"
|
|
|
|
|
default 0x0baddead
|
2015-11-07 18:51:09 +01:00
|
|
|
|
depends on S25FL1_SCRAMBLE
|
2015-08-28 20:01:08 +02:00
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_S25FL1
|
2015-08-24 16:00:39 +02:00
|
|
|
|
|
2016-04-17 19:20:07 +02:00
|
|
|
|
config MTD_N25QXXX
|
|
|
|
|
bool "QuadSPI-based Micron N25QXXX family FLASH"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Support the N25Q016A, N25Q032A, N25Q064A, N25Q128A, N25Q256A
|
2016-06-09 05:13:06 +02:00
|
|
|
|
|
2016-04-17 19:20:07 +02:00
|
|
|
|
if MTD_N25QXXX
|
|
|
|
|
|
|
|
|
|
config N25QXXX_QSPIMODE
|
|
|
|
|
int "N25QXXX QuadSPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
---help---
|
|
|
|
|
This device can operate in SPI mode 0 or 3.
|
|
|
|
|
|
|
|
|
|
config N25QXXX_QSPI_FREQUENCY
|
|
|
|
|
int "N25QXXX QuadSPI Frequency"
|
|
|
|
|
default 108000000
|
|
|
|
|
---help---
|
|
|
|
|
- Clock frequency for all SPI commands except for Read Data
|
|
|
|
|
command (0x03)
|
|
|
|
|
- Clock frequency for Read Data command (0x03): 54 MHz
|
|
|
|
|
In this implementation, only "Quad" reads are performed.
|
|
|
|
|
|
|
|
|
|
config N25QXXX_SECTOR512
|
|
|
|
|
bool "Simulate 512 byte Erase Blocks"
|
|
|
|
|
default n
|
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_N25QXXX
|
2016-04-17 19:20:07 +02:00
|
|
|
|
|
2019-11-21 00:25:40 +01:00
|
|
|
|
config MTD_W25QXXXJV
|
|
|
|
|
bool "QuadSPI-based Winbond W25QXXXJV family FLASH"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Support the W25Q016JV, W25Q032JV, W25Q064JV, W25Q128JV, W25Q256JV, W25Q512JV, W25Q01JV
|
|
|
|
|
|
|
|
|
|
if MTD_W25QXXXJV
|
|
|
|
|
|
|
|
|
|
config W25QXXXJV_QSPIMODE
|
|
|
|
|
int "W25QXXXJV QuadSPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
---help---
|
|
|
|
|
This device can operate in SPI mode 0 or 3.
|
|
|
|
|
|
|
|
|
|
config W25QXXXJV_QSPI_FREQUENCY
|
|
|
|
|
int "W25QXXXJV QuadSPI Frequency"
|
|
|
|
|
default 133000000
|
|
|
|
|
---help---
|
|
|
|
|
Per data sheet:
|
|
|
|
|
– 133MHz Single, Dual/Quad SPI clocks
|
|
|
|
|
– 266/532MHz equivalent Dual/Quad SPI
|
|
|
|
|
– 66MB/S continuous data transfer rate
|
|
|
|
|
|
|
|
|
|
config W25QXXXJV_SECTOR512
|
|
|
|
|
bool "Simulate 512 byte Erase Blocks"
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
endif # MTD_W25QXXXJV
|
|
|
|
|
|
2017-08-06 18:51:17 +02:00
|
|
|
|
config MTD_MX25RXX
|
|
|
|
|
bool "QuadSPI-based Macronix MX25RXX family FLASH"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Support the MX25R6435F chip
|
|
|
|
|
|
|
|
|
|
if MTD_MX25RXX
|
|
|
|
|
|
|
|
|
|
config MX25RXX_QSPIMODE
|
|
|
|
|
int "MX25RXX QuadSPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
---help---
|
|
|
|
|
This device can operate in SPI mode 0 or 3.
|
|
|
|
|
|
|
|
|
|
config MX25RXX_QSPI_FREQUENCY
|
|
|
|
|
int "MX25RXX QuadSPI Frequency"
|
|
|
|
|
default 33000000
|
|
|
|
|
---help---
|
|
|
|
|
Clock frequency for all SPI commands except for Read Data
|
|
|
|
|
command. Dual and Quad read methods need different frequency
|
|
|
|
|
in low power mode (Only Quad read is supported in this driver).
|
|
|
|
|
|
|
|
|
|
config MX25RXX_QSPI_READ_FREQUENCY
|
|
|
|
|
int "MX25RXX QuadSPI Read command frequency"
|
|
|
|
|
default 8000000
|
|
|
|
|
---help---
|
|
|
|
|
Clock frequency for read data command.
|
|
|
|
|
Only Quad read is supported in this driver.
|
|
|
|
|
|
2019-07-26 17:17:56 +02:00
|
|
|
|
config MX25RXX_SECTOR512
|
|
|
|
|
bool "Simulate 512 byte Erase Blocks"
|
|
|
|
|
default n
|
|
|
|
|
|
2022-07-22 10:20:39 +02:00
|
|
|
|
config MX25RXX_PAGE128
|
|
|
|
|
bool "128 byte size pages"
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config MX25RXX_LXX
|
|
|
|
|
bool "Run MX25RXX driver in MX25LXX mode"
|
|
|
|
|
default n
|
|
|
|
|
|
2017-08-06 18:51:17 +02:00
|
|
|
|
endif # MTD_MX25RXX
|
|
|
|
|
|
2013-05-01 03:10:54 +02:00
|
|
|
|
config MTD_SMART
|
|
|
|
|
bool "Sector Mapped Allocation for Really Tiny (SMART) Flash support"
|
2013-08-05 00:56:41 +02:00
|
|
|
|
default n
|
2013-05-01 03:10:54 +02:00
|
|
|
|
---help---
|
|
|
|
|
The MP25x series of Flash devices are typically very small and have a very large
|
|
|
|
|
erase block size. This causes issues with the standard Flash Translation Layer
|
|
|
|
|
block driver since it tries to allocate a RAM block the size of a flash erase
|
|
|
|
|
block, which is typically 64K. This block driver uses a different approach
|
|
|
|
|
to sacrifice performance for RAM memory footprint by saving data in sectors
|
|
|
|
|
(typically 2K - 4K based on memory size) and relocating sectors as needed when
|
|
|
|
|
an erase block needs to be erased.
|
|
|
|
|
|
2014-07-12 00:19:17 +02:00
|
|
|
|
if MTD_SMART
|
|
|
|
|
|
2015-11-28 16:00:26 +01:00
|
|
|
|
config SMART_DEV_LOOP
|
|
|
|
|
bool "Enable SMART loop device"
|
|
|
|
|
select FILEMTD
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Supports a smart loop device that can be used to export a
|
|
|
|
|
file (or character device) as a SMART block device.
|
|
|
|
|
|
2013-05-01 03:10:54 +02:00
|
|
|
|
config MTD_SMART_SECTOR_SIZE
|
|
|
|
|
int "SMART Device sector size"
|
|
|
|
|
default 1024
|
|
|
|
|
---help---
|
2014-07-12 00:19:17 +02:00
|
|
|
|
Sets the size of a single allocation on the SMART device. Larger sector sizes
|
2013-05-01 03:10:54 +02:00
|
|
|
|
reduce overhead per sector, but cause more wasted space with a lot of smaller
|
|
|
|
|
files.
|
|
|
|
|
|
2014-07-12 00:19:17 +02:00
|
|
|
|
config MTD_SMART_WRITEBUFFER
|
2014-07-12 00:25:35 +02:00
|
|
|
|
bool "Enable SMART write buffering"
|
2014-07-12 00:19:17 +02:00
|
|
|
|
default n
|
|
|
|
|
depends on DRVR_WRITEBUFFER
|
|
|
|
|
|
|
|
|
|
config MTD_SMART_READAHEAD
|
|
|
|
|
bool "Enable SMART read-ahead buffering"
|
|
|
|
|
default n
|
|
|
|
|
depends on DRVR_READAHEAD
|
|
|
|
|
|
2014-12-09 21:11:15 +01:00
|
|
|
|
config MTD_SMART_WEAR_LEVEL
|
|
|
|
|
bool "Support FLASH wear leveling"
|
|
|
|
|
depends on MTD_SMART
|
|
|
|
|
default y
|
|
|
|
|
---help---
|
|
|
|
|
Adds extra logic and RAM to guarantee equal wear leveling of the FLASH
|
|
|
|
|
device by recording and monitoring erase block operations and selecting
|
|
|
|
|
sector allocations to ensure all erase blocks are worn evenly. This will
|
|
|
|
|
evenly wear both dynamic and static data on the device.
|
|
|
|
|
|
|
|
|
|
if MTD_SMART_WEAR_LEVEL && !SMART_CRC_16
|
|
|
|
|
|
|
|
|
|
config MTD_SMART_CONVERT_WEAR_FORMAT
|
|
|
|
|
bool "Convert existing non wear leveling FLASH to wear leveling"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Adds a little extra code which detects an existing SMART format on a device
|
|
|
|
|
that was created prior to the wear leveling implementation. This conversion
|
|
|
|
|
only works if either no CRC is being used or if CRC-8 is being used as other
|
|
|
|
|
CRC versions use a different header format and require a mksmartfs on the
|
|
|
|
|
device even if an existing format is there.
|
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_SMART_WEAR_LEVEL && !SMART_CRC_16
|
2014-12-09 21:11:15 +01:00
|
|
|
|
|
|
|
|
|
config MTD_SMART_ENABLE_CRC
|
|
|
|
|
bool "Enable Sector CRC error detection"
|
|
|
|
|
depends on MTD_SMART
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Enables logic to compute and validate a CRC for logical sectors. The
|
|
|
|
|
CRC is calculated for all bytes in the logical sector. The CRC size is
|
|
|
|
|
selectable (8-bit, 16-bit, 32-bit). For added protection, larger CRCs should
|
|
|
|
|
be used with larger (2K - 4K) sector sizes. Enabling CRC protection will
|
|
|
|
|
cause increased sector relocation and increased erase block erasures since
|
|
|
|
|
directory and wear-level status updates can no longer be performed in-place
|
|
|
|
|
and mandate re-writing the information to a new sector.
|
|
|
|
|
|
|
|
|
|
An 8-bit CRC protection scheme can be added to an existing non-CRC formatted
|
|
|
|
|
SMART volume without needing to reformat the drive. As sectors are re-written
|
|
|
|
|
or relocated, they will be converted to CRC protected sectors.
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "CRC level selection"
|
|
|
|
|
depends on MTD_SMART_ENABLE_CRC
|
|
|
|
|
default SMART_CRC_8
|
|
|
|
|
---help---
|
|
|
|
|
Select the level of CRC protection implemented in the SMART MTD layer.
|
|
|
|
|
Smaller CRC selection uses less overhead per logical sectors, but also has
|
|
|
|
|
a higher probability of not detecting multiple bit errors. Devices with
|
|
|
|
|
larger logical sector sizes should use a larger CRC.
|
|
|
|
|
|
|
|
|
|
config SMART_CRC_8
|
|
|
|
|
bool "CRC-8"
|
|
|
|
|
|
|
|
|
|
config SMART_CRC_16
|
|
|
|
|
bool "CRC-16"
|
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endchoice # CRC level selection
|
2014-12-09 21:11:15 +01:00
|
|
|
|
|
smartfs improvements #66
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle on all .c and .h and fix all issues
Author: Alin Jerpelea <alin.jerpelea@sony.com>
drivers: mtd: smart: Add smartfs fsck feature
Support fsck to check and repair the smartfs file system. If the power
loss occurs during writing into the flash, the dead space are created
in flash after the next power cycle. To avoid this problem, introduce
fsck and keep the consistency of file system in initializing smartfs.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
commit 60927c5fb6a353994341601f55071c618e97682b
Author: Alin Jerpelea <alin.jerpelea@sony.com>
Date: Thu Dec 28 18:27:21 2017 +0900
drivers: mtd: smart: Fix duplicate sector selection in SmartFS
Add care for 16-bit sequence without CRC.
drivers: mtd: smart: Check CRC of duplicate sectors
In the illegal case by power-loss, when the multiple logical sectors are
duplicated, we compare the sequence number of each sector and select the newer
sector. Just in case, add CRC check for the newer sector. If the newer sector
has CRC error, then we use the older sector.
drivers: mtd: smart: SPI-Flash recovery from the initial error state
The FLASH may be not erased in the initial delivery state.
Just in case for the recovery of this fatal situation,
after once erasing the sector, return the sector as a free sector.
drivers: mtd: smart: Fix error handling in smartfs mtd driver
Add error handling in relocate sector.
drivers: mtd: smart: Fix initialize sector sequence value in smartfs
Fix initialization of sequence value into sector header and also avoid
unaligned memory access when CONFIG_MTD_SMART_ENABLE_CRC=n.
drivers: mtd: smart: Fix handling of duplicate sector in smartfs
In smartfs scan, if duplicate logical sector is found on the device,
then smartfs selects the winner sector by comparing sequence number,
and the loser sector is soon released. Fix a bug this loser sector
is registered into logical-to-physical sector mapping table.
2020-01-09 14:14:39 +01:00
|
|
|
|
config MTD_SMART_FSCK
|
|
|
|
|
bool "Enable SMART file system check"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Enables fsck to check and repair the SMART file system.
|
|
|
|
|
|
|
|
|
|
config MTD_SMART_FSCK_ENABLE_CRC
|
|
|
|
|
bool "Enable SMART file system CRC check during fsck"
|
|
|
|
|
default n
|
|
|
|
|
depends on MTD_SMART_FSCK && MTD_SMART_ENABLE_CRC
|
|
|
|
|
---help---
|
|
|
|
|
Enables CRC check during fsck. It's possible to check the file
|
|
|
|
|
system strictly, but it takes long time to do fsck.
|
|
|
|
|
|
2014-12-09 21:11:15 +01:00
|
|
|
|
config MTD_SMART_MINIMIZE_RAM
|
|
|
|
|
bool "Minimize SMART RAM usage using logical sector cache"
|
|
|
|
|
depends on MTD_SMART
|
|
|
|
|
default 0
|
|
|
|
|
---help---
|
|
|
|
|
Reduces RAM usage in the SMART MTD layer by replacing the 1-for-1 logical to
|
|
|
|
|
physical sector map with a smaller cache-based structure. This can save a
|
|
|
|
|
considerable amount of RAM on devices with a large sector count, but at the
|
|
|
|
|
expense of increased read/write times when a cache miss occurs. If the
|
|
|
|
|
requested logical sector has not been cached, then the device will need to be
|
|
|
|
|
scanned to located it on the physical medium.
|
|
|
|
|
|
|
|
|
|
config MTD_SMART_SECTOR_CACHE_SIZE
|
|
|
|
|
int "Number of entries in the SMART logical sector cache"
|
|
|
|
|
depends on MTD_SMART_MINIMIZE_RAM
|
|
|
|
|
default 512
|
|
|
|
|
---help---
|
|
|
|
|
Sets the size of the cache used for logical to physical sector mapping. A
|
|
|
|
|
larger number allows larger files to be "seek"ed randomly without encountering
|
2020-02-22 19:31:14 +01:00
|
|
|
|
cache misses. Any files larger than CACH_SIZE * SECTOR_SIZE that are sought
|
2014-12-09 21:11:15 +01:00
|
|
|
|
start to end will cause the cache to flush forcing manual scanning of the
|
|
|
|
|
MTD device to find the logical to physical mappings.
|
|
|
|
|
|
|
|
|
|
config MTD_SMART_SECTOR_PACK_COUNTS
|
|
|
|
|
bool "Pack free and release counts when possible"
|
|
|
|
|
depends on MTD_SMART_MINIMIZE_RAM
|
|
|
|
|
default y
|
|
|
|
|
---help---
|
|
|
|
|
For volumes with 16 sectors per erase block or less, this option causes the
|
|
|
|
|
free sector and released sector counts used for allocation and garbage
|
|
|
|
|
collection to be packed such that two values are stored per byte. For
|
|
|
|
|
volumes with 16 sectors per erase block, the 4 LSBs are packed and all of
|
|
|
|
|
the high-order bits are packed separately (8 per byte). This squeezes even
|
|
|
|
|
more RAM out.
|
|
|
|
|
|
|
|
|
|
config MTD_SMART_SECTOR_ERASE_DEBUG
|
|
|
|
|
bool "Track Erase Block erasure counts"
|
|
|
|
|
depends on MTD_SMART
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Allocates an Erase Block erase count array and keeps track of the number
|
|
|
|
|
of erases per erase block. This data is then presented on the procfs
|
|
|
|
|
interface.
|
|
|
|
|
|
|
|
|
|
config MTD_SMART_ALLOC_DEBUG
|
|
|
|
|
bool "RAM Allocation Debug"
|
|
|
|
|
depends on MTD_SMART
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Records all SMART MTD layer allocations for debug purposes and makes them
|
|
|
|
|
accessible from the ProcFS interface if it is enabled.
|
|
|
|
|
|
2014-07-12 00:19:17 +02:00
|
|
|
|
endif # MTD_SMART
|
|
|
|
|
|
2012-04-07 16:50:57 +02:00
|
|
|
|
config MTD_RAMTRON
|
|
|
|
|
bool "SPI-based RAMTRON NVRAM Devices FM25V10"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
---help---
|
|
|
|
|
SPI-based RAMTRON NVRAM Devices FM25V10
|
|
|
|
|
|
2014-12-26 14:59:09 +01:00
|
|
|
|
if MTD_RAMTRON
|
|
|
|
|
|
|
|
|
|
config RAMTRON_SETSPEED
|
|
|
|
|
bool "Adjustable bus speed"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Select an option to provide an ioctl, MTDIOC_SETSPEED call that
|
|
|
|
|
supports dynamic selection of the RAMTRON bus speed.
|
|
|
|
|
|
2017-08-04 16:49:07 +02:00
|
|
|
|
config RAMTRON_CHUNKING
|
|
|
|
|
bool "Support chunked writes"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
2017-08-04 17:00:58 +02:00
|
|
|
|
Some Re-RAMs like MB85AS4MT have write buffer size limitation and
|
|
|
|
|
require smaller, "chunked" writes.
|
2017-08-04 16:49:07 +02:00
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_RAMTRON
|
2014-12-26 14:59:09 +01:00
|
|
|
|
|
2012-09-17 20:35:37 +02:00
|
|
|
|
config MTD_SST25
|
|
|
|
|
bool "SPI-based SST25 FLASH"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
|
2013-02-11 22:44:00 +01:00
|
|
|
|
if MTD_SST25
|
|
|
|
|
|
2012-09-17 20:35:37 +02:00
|
|
|
|
config SST25_SPIMODE
|
|
|
|
|
int "SST25 SPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config SST25_SPIFREQUENCY
|
|
|
|
|
int "SST25 SPI Frequency"
|
|
|
|
|
default 20000000
|
|
|
|
|
|
|
|
|
|
config SST25_READONLY
|
|
|
|
|
bool "SST25 Read-Only FLASH"
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config SST25_SECTOR512
|
|
|
|
|
bool "Simulate 512 byte Erase Blocks"
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config SST25_SLOWWRITE
|
|
|
|
|
bool
|
2013-11-02 15:27:13 +01:00
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
There used to be a bug in the current code when using the higher speed AAI
|
|
|
|
|
write sequence. The nature of the bug is that the WRDI instruction is not
|
|
|
|
|
working. At the end of the AAI sequence, the status register continues to
|
|
|
|
|
report that the SST25 is write enabled (WEL bit) and in AAI mode (AAI
|
|
|
|
|
bit). This has been fixed by David Sidrane!
|
2012-09-17 20:35:37 +02:00
|
|
|
|
|
|
|
|
|
config SST25_SLOWREAD
|
|
|
|
|
bool
|
|
|
|
|
default n
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_SST25
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
2013-11-28 15:04:46 +01:00
|
|
|
|
config MTD_SST25XX
|
|
|
|
|
bool "SPI-based SST25XX FLASH (64-MBit and larger)"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
---help---
|
|
|
|
|
With the 64 MBit and larger parts, SST changed the write mechanism to
|
|
|
|
|
support page write instead of byte/word write like the smaller parts.
|
|
|
|
|
As a result, the SST25 driver is not compatible with the larger density
|
|
|
|
|
parts, and the SST25XX driver must be used instead.
|
|
|
|
|
|
|
|
|
|
if MTD_SST25XX
|
|
|
|
|
|
|
|
|
|
config SST25XX_SPIMODE
|
|
|
|
|
int "SST25 SPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config SST25XX_SPIFREQUENCY
|
|
|
|
|
int "SST25 SPI Frequency"
|
|
|
|
|
default 20000000
|
|
|
|
|
|
|
|
|
|
config SST25XX_MANUFACTURER
|
|
|
|
|
hex "Manufacturers ID"
|
|
|
|
|
default 0xBF
|
|
|
|
|
---help---
|
|
|
|
|
Various manufacturers may have produced the parts. 0xBF is the manufacturer ID
|
|
|
|
|
for the parts manufactured by SST.
|
|
|
|
|
|
|
|
|
|
config SST25XX_MEMORY_TYPE
|
|
|
|
|
hex "Memory type ID"
|
|
|
|
|
default 0x25
|
|
|
|
|
---help---
|
|
|
|
|
The memory type for SST25VF065 series is 0x25, but this can be modified if needed
|
|
|
|
|
to support compatible devices from different manufacturers.
|
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_SST25XX
|
2013-11-28 15:04:46 +01:00
|
|
|
|
|
2016-05-10 19:09:15 +02:00
|
|
|
|
config MTD_SST26
|
|
|
|
|
bool "SPI/QSPI-based SST26XX FLASHes (16,32,64-MBit)"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
---help---
|
|
|
|
|
These part are also different from SST25 and SST25XX, they support both SPI and QSPI.
|
|
|
|
|
|
|
|
|
|
if MTD_SST26
|
|
|
|
|
|
|
|
|
|
config SST26_SPIMODE
|
|
|
|
|
int "SST26 (Q)SPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config SST26_SPIFREQUENCY
|
|
|
|
|
int "SST26 (Q)SPI Frequency"
|
|
|
|
|
default 64000000
|
|
|
|
|
|
|
|
|
|
config SST26_MANUFACTURER
|
|
|
|
|
hex "Manufacturers ID"
|
|
|
|
|
default 0xBF
|
|
|
|
|
---help---
|
|
|
|
|
Various manufacturers may have produced the parts. 0xBF is the manufacturer ID
|
|
|
|
|
for the parts manufactured by SST.
|
|
|
|
|
|
|
|
|
|
config SST26_MEMORY_TYPE
|
|
|
|
|
hex "Memory type ID"
|
|
|
|
|
default 0x26
|
|
|
|
|
---help---
|
|
|
|
|
The memory type for SST26VF0xx series is 0x26, but this can be modified if needed
|
|
|
|
|
to support compatible devices from different manufacturers.
|
|
|
|
|
|
2016-05-25 21:43:44 +02:00
|
|
|
|
config SST26_DEBUG
|
|
|
|
|
bool "Debug output from the SST26 driver"
|
|
|
|
|
depends on DEBUG_FS
|
|
|
|
|
default n
|
|
|
|
|
|
2016-05-10 19:09:15 +02:00
|
|
|
|
endif # MTD_SST26
|
|
|
|
|
|
2013-02-11 22:44:00 +01:00
|
|
|
|
config MTD_SST39FV
|
|
|
|
|
bool "SST39FV NOR FLASH"
|
|
|
|
|
default n
|
|
|
|
|
---help---
|
|
|
|
|
Selects 16-bit SST NOR FLASH. This includes support for:
|
|
|
|
|
|
|
|
|
|
SST39FV1601/SST39FV1602: 2Mb
|
|
|
|
|
SST39FV3201/SST39FV3202: 4Mb
|
|
|
|
|
|
|
|
|
|
if MTD_SST39FV
|
|
|
|
|
|
|
|
|
|
config SST39VF_BASE_ADDRESS
|
|
|
|
|
hex "SST39FV bass address"
|
|
|
|
|
default 0x00000000
|
|
|
|
|
---help---
|
|
|
|
|
This is the address where the SST29VF FLASH can be found in memory.
|
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_SST39FV
|
2012-09-17 20:35:37 +02:00
|
|
|
|
|
|
|
|
|
config MTD_W25
|
|
|
|
|
bool "SPI-based W25 FLASH"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
|
2013-02-11 22:44:00 +01:00
|
|
|
|
if MTD_W25
|
|
|
|
|
|
2012-09-17 20:35:37 +02:00
|
|
|
|
config W25_SPIMODE
|
|
|
|
|
int "W25 SPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config W25_SPIFREQUENCY
|
|
|
|
|
int "W25 SPI Frequency"
|
|
|
|
|
default 20000000
|
|
|
|
|
|
|
|
|
|
config W25_READONLY
|
|
|
|
|
bool "W25 Read-Only FLASH"
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config W25_SECTOR512
|
|
|
|
|
bool "Simulate 512 byte Erase Blocks"
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config W25_SLOWREAD
|
|
|
|
|
bool
|
|
|
|
|
default n
|
2013-02-11 22:44:00 +01:00
|
|
|
|
|
2016-04-17 22:13:44 +02:00
|
|
|
|
endif # MTD_W25
|
2018-08-28 14:31:28 +02:00
|
|
|
|
|
|
|
|
|
config MTD_GD25
|
|
|
|
|
bool "SPI-based GD25 FLASH"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
|
|
|
|
|
if MTD_GD25
|
|
|
|
|
|
|
|
|
|
config GD25_SPIMODE
|
|
|
|
|
int "GD25 SPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config GD25_SPIFREQUENCY
|
|
|
|
|
int "GD25 SPI Frequency"
|
|
|
|
|
default 20000000
|
|
|
|
|
|
|
|
|
|
config GD25_READONLY
|
|
|
|
|
bool "GD25 Read-Only FLASH"
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config GD25_SLOWREAD
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
endif # MTD_GD25
|
2019-09-15 16:33:22 +02:00
|
|
|
|
|
|
|
|
|
config MTD_GD5F
|
|
|
|
|
bool "SPI-based GD5F nand FLASH"
|
|
|
|
|
default n
|
|
|
|
|
select SPI
|
|
|
|
|
|
|
|
|
|
if MTD_GD5F
|
|
|
|
|
|
|
|
|
|
config GD5F_SPIMODE
|
|
|
|
|
int "GD5F SPI Mode"
|
|
|
|
|
default 0
|
|
|
|
|
|
|
|
|
|
config GD5F_SPIFREQUENCY
|
|
|
|
|
int "GD5F SPI Frequency"
|
|
|
|
|
default 20000000
|
|
|
|
|
|
|
|
|
|
endif # MTD_GD5F
|
2020-02-08 08:30:09 +01:00
|
|
|
|
|
|
|
|
|
endif # MTD
|