Various fixes for PCI work
Squashed commits:
1. Porting prior PCI work in place of jailhouse code
At this point the PCI enumeration works for x86_64 including over
pci-pci bridges.
Running QEMU with this configuration we see the bridge and the
device on the bridge. It also detected the qemu test device
qemu-system-x86_64 \
-cpu host,+pcid,+x2apic,+tsc-deadline,+xsave,+rdrand \
--enable-kvm -smp 1 -m 2G -cdrom boot.iso --nographic -no-reboot \
-device pci-testdev \
-device pci-bridge,id=bridge0,chassis_nr=2 \
-device e1000,bus=bridge0,addr=0x3
qemu_pci_init: Initializing PCI Bus
pci_probe_device: [00:00.0] Found 8086:1237, class/revision 06000002
pci_probe_device: [00:01.1] Found 8086:7010, class/revision 01018000
pci_probe_device: [00:01.2] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.3] Found 8086:7113, class/revision 06800003
pci_probe_device: [00:01.4] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.5] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.6] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.7] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:02.0] Found 1234:1111, class/revision 03000002
pci_probe_device: [00:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:04.0] Found 1b36:0005, class/revision 00ff0000
pci_probe_device: [00:04.0] Probing
pci_check_pci_bridge: [00:05.0] Found Bridge
pci_probe_device: [01:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:05.0] Found 1b36:0001, class/revision 06040000
2. Remove unused CONFIG_PCI_MAX_BDF option
3. Add a workaround for Jailhouse pci scanning
4. Extend BAR parsing and handle PIO and MMIO for pci-testdev
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
5. PCI: Add initial support for QEMU 'edu' test device
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
6. Bring up PCI later in boot process
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
7. Add ISR and DMA support to QEMU edu test pci device
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
8. Fix bad function prototype definition in qemu_edu
9. intel64: Add a pci test configuration and instructions
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
10. PCI: Fix issue in identification of 64bit bar
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-07 11:59:29 +02:00
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#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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menuconfig PCI
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bool "Support for PCI Bus"
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default n
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---help---
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Enables support for the PCI bus.
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2024-02-04 02:47:12 +01:00
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Backend must be provided by per-arch or per-board implementation.
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if PCI
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2024-03-11 17:15:05 +01:00
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config PCI_LATE_DRIVERS_REGISTER
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bool
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default n
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---help---
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This option disables PCI driver registration in drivers_initialize().
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Care must be taken to call pci_register_drivers() in later code, most likely
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as board specific code.
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2024-03-11 17:14:01 +01:00
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config PCI_MSIX
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bool "PCI MSI-X support"
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default n
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---help---
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Enables support for PCI MSI-X. When enabled, MSI-X takse priority
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over MSI when a device supports it.
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2024-02-04 02:47:12 +01:00
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config PCI_ASSIGN_ALL_BUSES
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bool "Assign resource to all buses"
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default !ARCH_X86 && !ARCH_X86_64
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---help---
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Assign resources to all buses. This is required for some
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platforms that have multiple PCI buses.
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2024-03-05 07:29:32 +01:00
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config PCI_QEMU_TEST
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bool "Driver for QEMU PCI test device"
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default n
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---help---
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Driver for QEMU PCI test device
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2024-02-27 15:00:21 +01:00
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config PCI_QEMU_EDU
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bool "Driver for QEMU EDU test device"
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default n
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---help---
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Driver for QEMU EDU test device
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2023-12-22 09:41:19 +01:00
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config PCI_IVSHMEM
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bool "PCI ivshmem driver"
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default n
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---help---
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Enable Inter-VM share memory device driver.
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2024-02-28 14:14:01 +01:00
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config PCI_UIO_IVSHMEM
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bool "Enable uio ivshmem driver support"
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default n
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2024-03-13 12:42:42 +01:00
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depends on PCI_IVSHMEM
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2024-02-28 14:14:01 +01:00
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---help---
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When this option is enabled, char ivshmem driver will register
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char device with name: "/dev/uioX" to the VFS, then
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application can open this device and use `mmap()` to get the
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share memory provided by ivshmem device.
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2024-03-13 12:42:42 +01:00
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config PCI_UIO_IVSHMEM_IDTABLE
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string "The id table of uio ivshmem device"
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depends on PCI_UIO_IVSHMEM
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---help---
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"id0;id1;id2", e.g.: "0;1;2"
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config PCI_UIO_IVSHMEM_NPOLLWAITERS
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int "PCI uio ivshmem poll waiter number"
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default 2
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depends on PCI_UIO_IVSHMEM
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2024-03-05 07:29:32 +01:00
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endif # PCI
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2024-03-11 03:39:58 +01:00
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menuconfig PCI_ENDPOINT
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bool "PCI Endpoint Support"
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default n
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---help---
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Enable this configuration option to support configurable PCI
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endpoint. This should be enabled if the platform has a PCI
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controller that can operate in endpoint mode.
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