2012-04-06 17:49:35 +02:00
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#
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# For a description of the syntax of this configuration file,
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2012-04-06 18:45:52 +02:00
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# see misc/tools/kconfig-language.txt.
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2012-04-06 17:49:35 +02:00
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#
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2012-04-13 16:27:44 +02:00
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2012-12-09 18:34:53 +01:00
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config DEV_LOWCONSOLE
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2012-04-13 16:27:44 +02:00
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bool "Low-level console support"
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2012-04-14 15:31:14 +02:00
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default n
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2012-04-13 16:27:44 +02:00
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depends on ARCH_LOWPUTC
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2014-04-01 19:24:15 +02:00
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depends on DEV_CONSOLE
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2012-12-09 18:34:53 +01:00
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---help---
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Use the simple, low-level, write-only serial console driver (minimal support)
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2012-04-13 16:27:44 +02:00
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2013-01-31 17:52:20 +01:00
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config SERIAL_REMOVABLE
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bool
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2012-04-13 16:27:44 +02:00
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config 16550_UART
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bool "16550 UART Chip support"
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default n
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if 16550_UART
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config 16550_UART0
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bool "16550 UART0"
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default n
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if 16550_UART0
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config 16550_UART0_BASE
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hex "16550 UART0 base address"
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config 16550_UART0_CLOCK
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int "16550 UART0 clock"
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config 16550_UART0_IRQ
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int "16550 UART0 IRQ number"
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2012-04-13 17:04:05 +02:00
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config 16550_UART0_BAUD
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int "16550 UART0 BAUD"
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default 115200
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2012-04-13 16:27:44 +02:00
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config 16550_UART0_PARITY
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int "16550 UART0 parity"
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default 0
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2014-04-01 19:24:15 +02:00
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range 0 2
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2012-04-13 16:27:44 +02:00
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---help---
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16550 UART0 parity. 0=None, 1=Odd, 2=Even. Default: None
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config 16550_UART0_BITS
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int "16550 UART0 number of bits"
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default 8
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---help---
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16550 UART0 number of bits. Default: 8
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config 16550_UART0_2STOP
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2012-09-04 17:28:56 +02:00
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int "16550 UART0 two stop bits"
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default 0
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2012-04-13 16:27:44 +02:00
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---help---
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2012-09-04 17:28:56 +02:00
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0=1 stop bit, 1=Two stop bits. Default: 1 stop bit
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2012-04-13 16:27:44 +02:00
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config 16550_UART0_RXBUFSIZE
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int "16550 UART0 Rx buffer size"
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default 256
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---help---
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16550 UART0 Rx buffer size. Default: 256
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config 16550_UART0_TXBUFSIZE
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int "16550 UART0 Tx buffer size"
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default 256
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---help---
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16550 UART0 Tx buffer size. Default: 256
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2013-06-06 22:49:14 +02:00
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config 16550_UART0_IFLOWCONTROL
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bool "16550 UART0 RTS flow control"
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default n
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select SERIAL_IFLOWCONTROL
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---help---
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Enable 16550 UART0 RTS flow control
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config 16550_UART0_OFLOWCONTROL
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bool "16550 UART0 CTS flow control"
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default n
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select SERIAL_OFLOWCONTROL
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---help---
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Enable 16550 UART0 CTS flow control
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2012-04-13 16:27:44 +02:00
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endif
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config 16550_UART1
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bool "16550 UART1"
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default n
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if 16550_UART1
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config 16550_UART1_BASE
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hex "16550 UART1 base address"
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config 16550_UART1_CLOCK
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int "16550 UART1 clock"
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config 16550_UART1_IRQ
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int "16550 UART1 IRQ number"
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2012-04-13 17:04:05 +02:00
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config 16550_UART1_BAUD
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int "16550 UART1 BAUD"
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default 115200
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2012-04-13 16:27:44 +02:00
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config 16550_UART1_PARITY
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int "16550 UART1 parity"
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default 0
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2014-04-01 19:24:15 +02:00
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range 0 2
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2012-04-13 16:27:44 +02:00
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---help---
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16550 UART1 parity. 0=None, 1=Odd, 2=Even. Default: None
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config 16550_UART1_BITS
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int "16550 UART1 number of bits"
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default 8
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---help---
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16550 UART1 number of bits. Default: 8
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config 16550_UART1_2STOP
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2012-09-04 17:28:56 +02:00
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int "16550 UART1 two stop bits"
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default 0
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2012-04-13 16:27:44 +02:00
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---help---
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2012-09-04 17:28:56 +02:00
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0=1 stop bit, 1=Two stop bits. Default: 1 stop bit
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2012-04-13 16:27:44 +02:00
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config 16550_UART1_RXBUFSIZE
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int "16550 UART1 Rx buffer size"
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default 256
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---help---
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16550 UART1 Rx buffer size. Default: 256
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config 16550_UART1_TXBUFSIZE
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int "16550 UART1 Tx buffer size"
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default 256
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---help---
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16550 UART1 Tx buffer size. Default: 256
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2013-06-06 22:49:14 +02:00
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config 16550_UART1_IFLOWCONTROL
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bool "16550 UART1 RTS flow control"
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default n
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select SERIAL_IFLOWCONTROL
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---help---
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Enable 16550 UART1 RTS flow control
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config 16550_UART1_OFLOWCONTROL
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bool "16550 UART1 CTS flow control"
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default n
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select SERIAL_OFLOWCONTROL
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---help---
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Enable 16550 UART1 CTS flow control
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2012-04-13 16:27:44 +02:00
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endif
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config 16550_UART2
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bool "16550 UART2"
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default n
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if 16550_UART2
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config 16550_UART2_BASE
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hex "16550 UART2 base address"
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config 16550_UART2_CLOCK
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int "16550 UART2 clock"
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config 16550_UART2_IRQ
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int "16550 UART2 IRQ number"
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2012-04-13 17:04:05 +02:00
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config 16550_UART2_BAUD
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int "16550 UART2 BAUD"
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default 115200
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2012-04-13 16:27:44 +02:00
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config 16550_UART2_PARITY
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int "16550 UART2 parity"
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default 0
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2014-04-01 19:24:15 +02:00
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range 0 2
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2012-04-13 16:27:44 +02:00
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---help---
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16550 UART2 parity. 0=None, 1=Odd, 2=Even. Default: None
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config 16550_UART2_BITS
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int "16550 UART2 number of bits"
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default 8
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---help---
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16550 UART2 number of bits. Default: 8
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config 16550_UART2_2STOP
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2012-09-04 17:28:56 +02:00
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int "16550 UART2 two stop bits"
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default 0
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2012-04-13 16:27:44 +02:00
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---help---
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2012-09-04 17:28:56 +02:00
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0=1 stop bit, 1=Two stop bits. Default: 1 stop bit
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2012-04-13 16:27:44 +02:00
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config 16550_UART2_RXBUFSIZE
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int "16550 UART2 Rx buffer size"
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default 256
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---help---
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16550 UART2 Rx buffer size. Default: 256
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config 16550_UART2_TXBUFSIZE
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int "16550 UART2 Tx buffer size"
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default 256
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---help---
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16550 UART2 Tx buffer size. Default: 256
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2013-06-06 22:49:14 +02:00
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config 16550_UART2_IFLOWCONTROL
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bool "16550 UART2 RTS flow control"
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default n
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select SERIAL_IFLOWCONTROL
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---help---
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Enable 16550 UART2 RTS flow control
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config 16550_UART2_OFLOWCONTROL
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bool "16550 UART2 CTS flow control"
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default n
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select SERIAL_OFLOWCONTROL
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---help---
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Enable 16550 UART2 CTS flow control
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2012-04-13 16:27:44 +02:00
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endif
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config 16550_UART3
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bool "16550 UART3"
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default n
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if 16550_UART3
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config 16550_UART3_BASE
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hex "16550 UART3 base address"
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config 16550_UART3_CLOCK
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int "16550 UART3 clock"
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config 16550_UART3_IRQ
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int "16550 UART3 IRQ number"
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2012-04-13 17:04:05 +02:00
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config 16550_UART3_BAUD
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int "16550 UART3 BAUD"
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default 115200
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2012-04-13 16:27:44 +02:00
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config 16550_UART3_PARITY
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int "16550 UART3 parity"
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default 0
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2014-04-01 19:24:15 +02:00
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range 0 2
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2012-04-13 16:27:44 +02:00
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---help---
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16550 UART3 parity. 0=None, 1=Odd, 2=Even. Default: None
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config 16550_UART3_BITS
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int "16550 UART3 number of bits"
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default 8
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---help---
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16550 UART3 number of bits. Default: 8
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config 16550_UART3_2STOP
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2012-09-04 17:28:56 +02:00
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int "16550 UART3 two stop bits"
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default 0
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2012-04-13 16:27:44 +02:00
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---help---
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2012-09-04 17:28:56 +02:00
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0=1 stop bit, 1=Two stop bits. Default: 1 stop bit
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2012-04-13 16:27:44 +02:00
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config 16550_UART3_RXBUFSIZE
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int "16550 UART3 Rx buffer size"
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default 256
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---help---
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16550 UART3 Rx buffer size. Default: 256
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config 16550_UART3_TXBUFSIZE
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int "16550 UART3 Tx buffer size"
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default 256
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---help---
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16550 UART3 Tx buffer size. Default: 256
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2013-06-06 22:49:14 +02:00
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config 16550_UART3_IFLOWCONTROL
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bool "16550 UART3 RTS flow control"
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default n
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select SERIAL_IFLOWCONTROL
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---help---
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Enable 16550 UART3 RTS flow control
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config 16550_UART3_OFLOWCONTROL
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bool "16550 UART3 CTS flow control"
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default n
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select SERIAL_OFLOWCONTROL
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---help---
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Enable 16550 UART3 CTS flow control
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2012-04-13 16:27:44 +02:00
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endif
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choice
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prompt "16550 Serial Console"
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2012-09-05 19:20:19 +02:00
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default 16550_NO_SERIAL_CONSOLE
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2014-04-01 19:24:15 +02:00
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depends on DEV_CONSOLE
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2012-04-13 16:27:44 +02:00
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2012-09-05 19:20:19 +02:00
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config 16550_UART0_SERIAL_CONSOLE
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2012-04-13 16:27:44 +02:00
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bool "16550 UART0 serial console"
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depends on 16550_UART0
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2012-09-05 19:20:19 +02:00
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config 16550_UART1_SERIAL_CONSOLE
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2012-04-13 16:27:44 +02:00
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bool "16550 UART1 serial console"
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depends on 16550_UART1
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2012-09-05 19:20:19 +02:00
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config 16550_UART2_SERIAL_CONSOLE
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2012-04-13 16:27:44 +02:00
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bool "16550 UART2 serial console"
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depends on 16550_UART2
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2012-09-05 19:20:19 +02:00
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config 16550_UART3_SERIAL_CONSOLE
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2012-04-13 16:27:44 +02:00
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bool "16550 UART3 serial console"
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depends on 16550_UART3
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2012-09-05 19:20:19 +02:00
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config 16550_NO_SERIAL_CONSOLE
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2012-04-13 16:27:44 +02:00
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bool "No 16550 serial console"
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endchoice
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config 16550_SUPRESS_CONFIG
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bool "Suppress 16550 configuration"
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default n
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---help---
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This option is useful, for example, if you are using a bootloader
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2014-04-13 22:32:20 +02:00
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that configures the 16550_UART. In that case, you may want to
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2012-04-13 16:27:44 +02:00
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just leave the existing console configuration in place. Default: n
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config 16550_REGINCR
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int "Address increment between 16550 registers"
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default 1
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---help---
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The address increment between 16550 registers. Options are 1, 2, or 4.
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Default: 1
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config 16550_REGWIDTH
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int "Bit width of 16550 registers"
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default 8
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---help---
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The bit width of registers. Options are 8, 16, or 32. Default: 8
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config 16550_ADDRWIDTH
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int "Address width of 16550 registers"
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default 8
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---help---
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The bit width of registers. Options are 8, 16, or 32. Default: 8
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endif
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2012-09-05 14:45:35 +02:00
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#
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2012-09-05 19:20:19 +02:00
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# MCU serial peripheral driver?
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2012-09-05 14:45:35 +02:00
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#
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2012-09-08 15:56:21 +02:00
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config ARCH_HAVE_UART
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2014-03-06 16:17:11 +01:00
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bool
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default n
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select MCU_SERIAL
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2012-09-08 15:56:21 +02:00
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config ARCH_HAVE_UART0
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2014-03-06 16:17:11 +01:00
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bool
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default n
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2014-03-06 22:33:02 +01:00
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select MCU_SERIAL
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2014-03-06 16:17:11 +01:00
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2012-09-08 15:56:21 +02:00
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config ARCH_HAVE_UART1
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2014-03-06 16:17:11 +01:00
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bool
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default n
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select MCU_SERIAL
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|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_UART2
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
select MCU_SERIAL
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_UART3
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
select MCU_SERIAL
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_UART4
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
select MCU_SERIAL
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_UART5
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
select MCU_SERIAL
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_UART6
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
select MCU_SERIAL
|
|
|
|
|
2013-03-25 18:33:41 +01:00
|
|
|
config ARCH_HAVE_UART7
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
select MCU_SERIAL
|
|
|
|
|
2013-04-01 15:43:31 +02:00
|
|
|
config ARCH_HAVE_UART8
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
select MCU_SERIAL
|
|
|
|
|
|
|
|
config ARCH_HAVE_SCI0
|
|
|
|
bool
|
|
|
|
default n
|
|
|
|
select MCU_SERIAL
|
|
|
|
|
|
|
|
config ARCH_HAVE_SCI1
|
|
|
|
bool
|
|
|
|
default n
|
|
|
|
select MCU_SERIAL
|
2012-09-05 19:20:19 +02:00
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_USART0
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_USART1
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_USART2
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_USART3
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_USART4
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_USART5
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
2012-09-08 15:56:21 +02:00
|
|
|
config ARCH_HAVE_USART6
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
2013-03-25 18:33:41 +01:00
|
|
|
config ARCH_HAVE_USART7
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
|
|
|
|
2013-04-01 15:43:31 +02:00
|
|
|
config ARCH_HAVE_USART8
|
2014-03-06 16:17:11 +01:00
|
|
|
bool
|
|
|
|
default n
|
2012-09-05 14:45:35 +02:00
|
|
|
|
2013-07-24 20:27:12 +02:00
|
|
|
#
|
|
|
|
# USARTn configuration. Is the USART configured to behave like a UART?
|
|
|
|
#
|
|
|
|
|
|
|
|
comment "USART Configuration"
|
|
|
|
|
|
|
|
config USART0_ISUART
|
|
|
|
bool "USART0 is a UART"
|
|
|
|
default y
|
|
|
|
depends on ARCH_HAVE_USART0
|
2014-03-06 16:17:11 +01:00
|
|
|
select MCU_SERIAL
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
config USART1_ISUART
|
|
|
|
bool "USART1 is a UART"
|
|
|
|
default y
|
|
|
|
depends on ARCH_HAVE_USART1
|
2014-03-06 16:17:11 +01:00
|
|
|
select MCU_SERIAL
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
config USART2_ISUART
|
|
|
|
bool "USART2 is a UART"
|
|
|
|
default y
|
|
|
|
depends on ARCH_HAVE_USART2
|
2014-03-06 16:17:11 +01:00
|
|
|
select MCU_SERIAL
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
config USART3_ISUART
|
|
|
|
bool "USART3 is a UART"
|
|
|
|
default y
|
2013-08-10 17:06:53 +02:00
|
|
|
depends on ARCH_HAVE_USART3
|
2014-03-06 16:17:11 +01:00
|
|
|
select MCU_SERIAL
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
config USART4_ISUART
|
|
|
|
bool "USART4 is a UART"
|
|
|
|
default y
|
|
|
|
depends on ARCH_HAVE_USART4
|
2014-03-06 16:17:11 +01:00
|
|
|
select MCU_SERIAL
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
config USART5_ISUART
|
|
|
|
bool "USART5 is a UART"
|
|
|
|
default y
|
|
|
|
depends on ARCH_HAVE_USART5
|
2014-03-06 16:17:11 +01:00
|
|
|
select MCU_SERIAL
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
config USART6_ISUART
|
|
|
|
bool "USART6 is a UART"
|
|
|
|
default y
|
|
|
|
depends on ARCH_HAVE_USART6
|
2014-03-06 16:17:11 +01:00
|
|
|
select MCU_SERIAL
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
config USART7_ISUART
|
|
|
|
bool "USART7 is a UART"
|
|
|
|
default y
|
|
|
|
depends on ARCH_HAVE_USART7
|
2014-03-06 16:17:11 +01:00
|
|
|
select MCU_SERIAL
|
2013-07-24 20:27:12 +02:00
|
|
|
|
|
|
|
config USART8_ISUART
|
|
|
|
bool "USART8 is a UART"
|
|
|
|
default y
|
|
|
|
depends on ARCH_HAVE_USART8
|
2014-03-06 16:17:11 +01:00
|
|
|
select MCU_SERIAL
|
2013-07-24 20:27:12 +02:00
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
config MCU_SERIAL
|
|
|
|
bool
|
2014-03-06 16:17:11 +01:00
|
|
|
default n
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
#
|
|
|
|
# Standard serial driver configuration
|
|
|
|
#
|
|
|
|
|
|
|
|
config STANDARD_SERIAL
|
|
|
|
bool "Enable standard \"upper-half\" serial driver"
|
|
|
|
default y if MCU_SERIAL
|
|
|
|
default n if !MCU_SERIAL
|
2012-12-09 18:34:53 +01:00
|
|
|
depends on !DEV_LOWCONSOLE
|
2012-09-05 19:20:19 +02:00
|
|
|
---help---
|
|
|
|
Enable the standard, upper-half serial driver used by most MCU serial peripherals.
|
|
|
|
|
2013-04-25 23:52:48 +02:00
|
|
|
config SERIAL_NPOLLWAITERS
|
2012-09-05 19:20:19 +02:00
|
|
|
int "Number of poll threads"
|
|
|
|
default 2
|
|
|
|
depends on !DISABLE_POLL && STANDARD_SERIAL
|
|
|
|
---help---
|
|
|
|
Maximum number of threads than can be waiting for POLL events.
|
|
|
|
Default: 2
|
|
|
|
|
2013-04-25 23:52:48 +02:00
|
|
|
config SERIAL_TIOCSERGSTRUCT
|
|
|
|
bool "Support TIOCSERGSTRUCT"
|
|
|
|
default n
|
|
|
|
depends on DEBUG && (MCU_SERIAL || 16550_UART)
|
|
|
|
---help---
|
|
|
|
As a debug option, many serial bottom half drivers support the TIOCSERGSTRUCT
|
2013-04-26 04:09:15 +02:00
|
|
|
that allows you to get the internal driver data structure. By default, this
|
2013-04-25 23:52:48 +02:00
|
|
|
IOCTL is not supported in order to reduce footprint. But if (1) the driver
|
|
|
|
supports the TIOCSERGSTRUCT ioctl, and (2) this option is selected, then
|
|
|
|
support for the TIOCSERGSTRUCT will be enabled.
|
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
#
|
2013-07-24 20:27:12 +02:00
|
|
|
# Serial console selection
|
2012-09-05 19:20:19 +02:00
|
|
|
#
|
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
choice
|
|
|
|
prompt "Serial console"
|
2012-09-05 19:20:19 +02:00
|
|
|
depends on MCU_SERIAL
|
|
|
|
default NO_SERIAL_CONSOLE
|
2014-04-01 19:24:15 +02:00
|
|
|
depends on DEV_CONSOLE
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART_SERIAL_CONSOLE
|
|
|
|
bool "UART"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART0_SERIAL_CONSOLE
|
|
|
|
bool "UART0"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART0
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART0_SERIAL_CONSOLE
|
|
|
|
bool "USART0"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART0_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
config UART1_SERIAL_CONSOLE
|
|
|
|
bool "UART1"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART1
|
2012-09-05 19:20:19 +02:00
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
config USART1_SERIAL_CONSOLE
|
|
|
|
bool "USART1"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART1_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
config UART2_SERIAL_CONSOLE
|
|
|
|
bool "UART2"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART2
|
2012-09-05 19:20:19 +02:00
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
config USART2_SERIAL_CONSOLE
|
|
|
|
bool "USART2"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART2_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
config UART3_SERIAL_CONSOLE
|
|
|
|
bool "UART3"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART3
|
2012-09-05 19:20:19 +02:00
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
config USART3_SERIAL_CONSOLE
|
|
|
|
bool "USART3"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_USART3
|
2012-09-05 14:45:35 +02:00
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
config UART4_SERIAL_CONSOLE
|
|
|
|
bool "UART4"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART4
|
2012-09-05 19:20:19 +02:00
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
config USART4_SERIAL_CONSOLE
|
|
|
|
bool "USART4"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART4_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
config UART5_SERIAL_CONSOLE
|
|
|
|
bool "UART5"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART5
|
2012-09-05 19:20:19 +02:00
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
config USART5_SERIAL_CONSOLE
|
|
|
|
bool "USART5"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART5_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
config UART6_SERIAL_CONSOLE
|
|
|
|
bool "UART6"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART6
|
2012-09-05 19:20:19 +02:00
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
config USART6_SERIAL_CONSOLE
|
|
|
|
bool "USART6"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART6_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
2013-03-25 18:33:41 +01:00
|
|
|
config UART7_SERIAL_CONSOLE
|
|
|
|
bool "UART7"
|
|
|
|
depends on ARCH_HAVE_UART7
|
|
|
|
|
|
|
|
config USART7_SERIAL_CONSOLE
|
|
|
|
bool "USART7"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART7_ISUART
|
2013-03-25 18:33:41 +01:00
|
|
|
|
2013-04-01 15:43:31 +02:00
|
|
|
config UART8_SERIAL_CONSOLE
|
|
|
|
bool "UART8"
|
|
|
|
depends on ARCH_HAVE_UART8
|
|
|
|
|
|
|
|
config USART8_SERIAL_CONSOLE
|
|
|
|
bool "USART8"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART8_ISUART
|
2013-04-01 15:43:31 +02:00
|
|
|
|
2014-03-06 16:17:11 +01:00
|
|
|
config SCI0_SERIAL_CONSOLE
|
|
|
|
bool "SCI0"
|
|
|
|
depends on ARCH_HAVE_SCI0
|
|
|
|
|
|
|
|
config SCI1_SERIAL_CONSOLE
|
|
|
|
bool "SCI1"
|
|
|
|
depends on ARCH_HAVE_SCI1
|
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
config NO_SERIAL_CONSOLE
|
|
|
|
bool "No serial console"
|
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
endchoice
|
|
|
|
|
2013-07-24 20:27:12 +02:00
|
|
|
#
|
|
|
|
# U[S]ARTn_XYZ settings for MCU serial drivers
|
|
|
|
#
|
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
menu "UART Configuration"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the UART.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART_2STOP
|
|
|
|
int "use 2 stop bits"
|
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config UART_IFLOWCONTROL
|
|
|
|
bool "UART RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART RTS flow control
|
|
|
|
|
|
|
|
config UART_OFLOWCONTROL
|
|
|
|
bool "UART CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART CTS flow control
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
menu "UART0 Configuration"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART0
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART0_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART0_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART0_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the UART.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART0_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART0_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART0_2STOP
|
|
|
|
int "use 2 stop bits"
|
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config UART0_IFLOWCONTROL
|
|
|
|
bool "UART0 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART0 RTS flow control
|
|
|
|
|
|
|
|
config UART0_OFLOWCONTROL
|
|
|
|
bool "UART0 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART0 CTS flow control
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
menu "USART0 Configuration"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART0_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART0_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART0_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART0_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the USART.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART0_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART0_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART0_2STOP
|
|
|
|
int "use 2 stop bits"
|
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config USART0_IFLOWCONTROL
|
|
|
|
bool "USART0 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART0 RTS flow control
|
|
|
|
|
|
|
|
config USART0_OFLOWCONTROL
|
|
|
|
bool "USART0 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART0 CTS flow control
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
menu "UART1 Configuration"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART1
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART1_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART1_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART1_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the UART.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART1_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART1_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART1_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config UART1_IFLOWCONTROL
|
|
|
|
bool "UART1 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART1 RTS flow control
|
|
|
|
|
|
|
|
config UART1_OFLOWCONTROL
|
|
|
|
bool "UART1 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART1 CTS flow control
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
menu "USART1 Configuration"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART1_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART1_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART1_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART1_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the USART.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART1_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART1_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART1_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config USART1_IFLOWCONTROL
|
|
|
|
bool "USART1 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART1 RTS flow control
|
|
|
|
|
|
|
|
config USART1_OFLOWCONTROL
|
|
|
|
bool "USART1 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART1 CTS flow control
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
menu "UART2 Configuration"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART2
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART2_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART2_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART2_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the UART.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART2_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART2_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART2_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config UART2_IFLOWCONTROL
|
|
|
|
bool "UART2 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART2 RTS flow control
|
|
|
|
|
|
|
|
config UART2_OFLOWCONTROL
|
|
|
|
bool "UART2 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART2 CTS flow control
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
menu "USART2 Configuration"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART2_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART2_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART2_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART2_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the USART.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART2_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART2_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART2_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config USART2_IFLOWCONTROL
|
|
|
|
bool "USART2 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART2 RTS flow control
|
|
|
|
|
|
|
|
config USART2_OFLOWCONTROL
|
|
|
|
bool "USART2 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART2 CTS flow control
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
menu "UART3 Configuration"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART3
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART3_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART3_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART3_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the UART.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART3_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART3_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART3_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config UART3_IFLOWCONTROL
|
|
|
|
bool "UART3 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART3 RTS flow control
|
|
|
|
|
|
|
|
config UART3_OFLOWCONTROL
|
|
|
|
bool "UART3 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART3 CTS flow control
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
menu "USART3 Configuration"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART3_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART3_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART3_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART3_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the USART.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART3_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART3_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART3_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config USART3_IFLOWCONTROL
|
|
|
|
bool "USART3 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART3 RTS flow control
|
|
|
|
|
|
|
|
config USART3_OFLOWCONTROL
|
|
|
|
bool "USART3 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART3 CTS flow control
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
menu "UART4 Configuration"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART4
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART4_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART4_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART4_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the UART.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART4_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART4_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART4_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config UART4_IFLOWCONTROL
|
|
|
|
bool "UART4 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART4 RTS flow control
|
|
|
|
|
|
|
|
config UART4_OFLOWCONTROL
|
|
|
|
bool "UART4 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART4 CTS flow control
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
menu "USART4 Configuration"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART4_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART4_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART4_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART4_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the USART.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART4_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART4_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART4_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config USART4_IFLOWCONTROL
|
|
|
|
bool "USART4 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART4 RTS flow control
|
|
|
|
|
|
|
|
config USART4_OFLOWCONTROL
|
|
|
|
bool "USART4 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART4 CTS flow control
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 19:20:19 +02:00
|
|
|
menu "UART5 Configuration"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART5
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART5_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART5_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART5_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the UART.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART5_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART5_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART5_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config UART5_IFLOWCONTROL
|
|
|
|
bool "UART5 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART5 RTS flow control
|
|
|
|
|
|
|
|
config UART5_OFLOWCONTROL
|
|
|
|
bool "UART5 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART5 CTS flow control
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
menu "USART5 Configuration"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART5_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART5_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART5_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART5_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the USART.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART5_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART5_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART5_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config USART5_IFLOWCONTROL
|
|
|
|
bool "USART5 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART5 RTS flow control
|
|
|
|
|
|
|
|
config USART5_OFLOWCONTROL
|
|
|
|
bool "USART5 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART5 CTS flow control
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
menu "USART6 Configuration"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART6_ISUART
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART6_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART6_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART6_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the USART.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART6_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART6_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 14:45:35 +02:00
|
|
|
|
|
|
|
config USART6_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 14:45:35 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config USART6_IFLOWCONTROL
|
|
|
|
bool "UART6 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART6 RTS flow control
|
|
|
|
|
|
|
|
config USART6_OFLOWCONTROL
|
|
|
|
bool "USART6 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART6 CTS flow control
|
2012-04-13 16:27:44 +02:00
|
|
|
|
2012-09-05 14:45:35 +02:00
|
|
|
endmenu
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
menu "UART6 Configuration"
|
2012-09-08 15:56:21 +02:00
|
|
|
depends on ARCH_HAVE_UART6
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART6_RXBUFSIZE
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Receive buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART6_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART6_BAUD
|
2013-03-25 18:33:41 +01:00
|
|
|
int "BAUD rate"
|
2012-12-09 00:21:34 +01:00
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the UART.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART6_BITS
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Character size"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART6_PARITY
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Parity setting"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
config UART6_2STOP
|
2013-03-25 18:33:41 +01:00
|
|
|
int "Uses 2 stop bits"
|
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config UART6_IFLOWCONTROL
|
|
|
|
bool "UART6 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART6 RTS flow control
|
|
|
|
|
|
|
|
config UART6_OFLOWCONTROL
|
|
|
|
bool "UART6 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART6 CTS flow control
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
menu "USART7 Configuration"
|
2013-07-24 20:27:12 +02:00
|
|
|
depends on USART7_ISUART
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config USART7_RXBUFSIZE
|
|
|
|
int "Receive buffer size"
|
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config USART7_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2013-03-25 18:33:41 +01:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config USART7_BAUD
|
|
|
|
int "BAUD rate"
|
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the USART.
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config USART7_BITS
|
|
|
|
int "Character size"
|
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config USART7_PARITY
|
|
|
|
int "Parity setting"
|
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config USART7_2STOP
|
|
|
|
int "Uses 2 stop bits"
|
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config USART7_IFLOWCONTROL
|
|
|
|
bool "USART7 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART7 RTS flow control
|
|
|
|
|
|
|
|
config USART7_OFLOWCONTROL
|
|
|
|
bool "USART7 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable USART7 CTS flow control
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
menu "UART7 Configuration"
|
|
|
|
depends on ARCH_HAVE_UART7
|
|
|
|
|
|
|
|
config UART7_RXBUFSIZE
|
|
|
|
int "Receive buffer size"
|
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered as they are received. This specifies
|
|
|
|
the size of the receive buffer.
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config UART7_TXBUFSIZE
|
2013-04-01 15:43:31 +02:00
|
|
|
int "Transmit buffer size"
|
2013-03-25 18:33:41 +01:00
|
|
|
default 256
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
Characters are buffered before being sent. This specifies
|
|
|
|
the size of the transmit buffer.
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config UART7_BAUD
|
|
|
|
int "BAUD rate"
|
|
|
|
default 115200
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The configured BAUD of the UART.
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config UART7_BITS
|
|
|
|
int "Character size"
|
|
|
|
default 8
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
The number of bits. Must be either 7 or 8.
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config UART7_PARITY
|
|
|
|
int "Parity setting"
|
|
|
|
default 0
|
2014-04-01 19:24:15 +02:00
|
|
|
range 0 2
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
0=no parity, 1=odd parity, 2=even parity
|
2013-03-25 18:33:41 +01:00
|
|
|
|
|
|
|
config UART7_2STOP
|
|
|
|
int "Uses 2 stop bits"
|
2012-09-05 19:20:19 +02:00
|
|
|
default 0
|
2013-06-06 22:49:14 +02:00
|
|
|
---help---
|
|
|
|
1=Two stop bits
|
|
|
|
|
|
|
|
config UART7_IFLOWCONTROL
|
|
|
|
bool "UART7 RTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_IFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART7 RTS flow control
|
|
|
|
|
|
|
|
config UART7_OFLOWCONTROL
|
|
|
|
bool "UART7 CTS flow control"
|
|
|
|
default n
|
|
|
|
select SERIAL_OFLOWCONTROL
|
|
|
|
---help---
|
|
|
|
Enable UART7 CTS flow control
|
2012-09-05 19:20:19 +02:00
|
|
|
|
|
|
|
endmenu
|
2013-04-01 15:43:31 +02:00
|
|
|
|
|
|
|
menu "USART8 Configuration"
|
2013-07-24 20:27:12 +02:00
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depends on USART8_ISUART
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2013-04-01 15:43:31 +02:00
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config USART8_RXBUFSIZE
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int "Receive buffer size"
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default 256
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2013-06-06 22:49:14 +02:00
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---help---
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Characters are buffered as they are received. This specifies
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the size of the receive buffer.
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2013-04-01 15:43:31 +02:00
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config USART8_TXBUFSIZE
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int "Transmit buffer size"
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default 256
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2013-06-06 22:49:14 +02:00
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---help---
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Characters are buffered before being sent. This specifies
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the size of the transmit buffer.
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2013-04-01 15:43:31 +02:00
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config USART8_BAUD
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int "BAUD rate"
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default 115200
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2013-06-06 22:49:14 +02:00
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---help---
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The configured BAUD of the USART.
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2013-04-01 15:43:31 +02:00
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config USART8_BITS
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int "Character size"
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default 8
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2013-06-06 22:49:14 +02:00
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---help---
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The number of bits. Must be either 7 or 8.
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2013-04-01 15:43:31 +02:00
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config USART8_PARITY
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int "Parity setting"
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default 0
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2014-04-01 19:24:15 +02:00
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range 0 2
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2013-06-06 22:49:14 +02:00
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---help---
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0=no parity, 1=odd parity, 2=even parity
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2013-04-01 15:43:31 +02:00
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config USART8_2STOP
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int "Uses 2 stop bits"
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default 0
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2013-06-06 22:49:14 +02:00
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---help---
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1=Two stop bits
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config USART8_IFLOWCONTROL
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bool "USART8 RTS flow control"
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default n
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select SERIAL_IFLOWCONTROL
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---help---
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Enable USART8 RTS flow control
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config USART8_OFLOWCONTROL
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bool "USART8 CTS flow control"
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default n
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select SERIAL_OFLOWCONTROL
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---help---
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Enable USART8 CTS flow control
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2013-04-01 15:43:31 +02:00
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endmenu
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menu "UART8 Configuration"
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depends on ARCH_HAVE_UART8
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config UART8_RXBUFSIZE
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int "Receive buffer size"
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default 256
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2013-06-06 22:49:14 +02:00
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---help---
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Characters are buffered as they are received. This specifies
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the size of the receive buffer.
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2013-04-01 15:43:31 +02:00
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config UART8_TXBUFSIZE
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int "Transmit buffer size"
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default 256
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2013-06-06 22:49:14 +02:00
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---help---
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Characters are buffered before being sent. This specifies
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the size of the transmit buffer.
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2013-04-01 15:43:31 +02:00
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config UART8_BAUD
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int "BAUD rate"
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default 115200
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2013-06-06 22:49:14 +02:00
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---help---
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The configured BAUD of the UART.
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2013-04-01 15:43:31 +02:00
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config UART8_BITS
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int "Character size"
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default 8
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2013-06-06 22:49:14 +02:00
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---help---
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The number of bits. Must be either 7 or 8.
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2013-04-01 15:43:31 +02:00
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config UART8_PARITY
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int "Parity setting"
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default 0
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2014-04-01 19:24:15 +02:00
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range 0 2
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2013-06-06 22:49:14 +02:00
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---help---
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0=no parity, 1=odd parity, 2=even parity
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2013-04-01 15:43:31 +02:00
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config UART8_2STOP
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int "Uses 2 stop bits"
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default 0
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2013-06-06 22:49:14 +02:00
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---help---
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1=Two stop bits
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config UART8_IFLOWCONTROL
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bool "UART8 RTS flow control"
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default n
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select SERIAL_IFLOWCONTROL
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---help---
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Enable UART8 RTS flow control
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config UART8_OFLOWCONTROL
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bool "UART8 CTS flow control"
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default n
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select SERIAL_OFLOWCONTROL
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---help---
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Enable UART8 CTS flow control
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2013-04-01 15:43:31 +02:00
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endmenu
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2013-06-06 22:49:14 +02:00
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2014-03-06 16:17:11 +01:00
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menu "SCI0 Configuration"
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depends on ARCH_HAVE_SCI0
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config SCI0_RXBUFSIZE
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int "SCI0 receive buffer size"
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default 256
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---help---
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Characters are buffered as they are received. This specifies
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the size of the receive buffer.
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config SCI0_TXBUFSIZE
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int "SCI0 transmit buffer size"
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default 256
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---help---
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Characters are buffered before being sent. This specifies
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the size of the transmit buffer.
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config SCI0_BAUD
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int "SCI0 BAUD rate"
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default 115200
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---help---
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The configured BAUD of the SCI.
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config SCI0_BITS
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int "SCI0 character size"
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default 8
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---help---
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The number of bits. Must be either 7 or 8.
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config SCI0_PARITY
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int "Parity setting"
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default 0
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2014-04-01 19:24:15 +02:00
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range 0 2
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2014-03-06 16:17:11 +01:00
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---help---
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0=no parity, 1=odd parity, 2=even parity
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config SCI0_2STOP
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int "SCI0 use 2 stop bits"
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default 0
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---help---
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1=Two stop bits
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endmenu # SCI0 Configuration
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menu "SCI1 Configuration"
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depends on ARCH_HAVE_SCI1
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config SCI1_RXBUFSIZE
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int "SCI1 receive buffer size"
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default 256
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---help---
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Characters are buffered as they are received. This specifies
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the size of the receive buffer.
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config SCI1_TXBUFSIZE
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int "SCI1 transmit buffer size"
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default 256
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---help---
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Characters are buffered before being sent. This specifies
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the size of the transmit buffer.
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config SCI1_BAUD
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int "SCI1 BAUD rate"
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default 115200
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---help---
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The configured BAUD of the SCI.
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config SCI1_BITS
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int "SCI1 character size"
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default 8
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---help---
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The number of bits. Must be either 7 or 8.
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config SCI1_PARITY
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int "Parity setting"
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default 0
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2014-04-01 19:24:15 +02:00
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range 0 2
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2014-03-06 16:17:11 +01:00
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---help---
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0=no parity, 1=odd parity, 2=even parity
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config SCI1_2STOP
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int "SCI1 use 2 stop bits"
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default 0
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---help---
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1=Two stop bits
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endmenu # SCI1 Configuration
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2013-06-06 22:49:14 +02:00
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config SERIAL_IFLOWCONTROL
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bool
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default n
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config SERIAL_OFLOWCONTROL
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bool
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default n
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