2012-07-25 20:41:10 +02:00
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|
|
/****************************************************************************
|
2012-07-25 20:58:45 +02:00
|
|
|
|
* drivers/analog/pga11x.c
|
2012-07-25 20:41:10 +02:00
|
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|
*
|
2021-03-04 07:10:42 +01:00
|
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* Licensed to the Apache Software Foundation (ASF) under one or more
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|
* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
|
2012-07-25 20:41:10 +02:00
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*
|
2021-03-04 07:10:42 +01:00
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
|
2021-03-04 08:02:21 +01:00
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|
****************************************************************************/
|
2021-03-04 07:10:42 +01:00
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/****************************************************************************
|
2012-07-25 20:41:10 +02:00
|
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|
* References:
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|
|
* "PGA112, PGA113, PGA116, PGA117: Zer<65>-Drift PROGRAMMABLE GAIN AMPLIFIER
|
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|
|
|
* with MUX", SBOS424B, March 2008, Revised September 2008, Texas
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* Instruments Incorporated"
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*
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****************************************************************************/
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/****************************************************************************
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|
|
* Included Files
|
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|
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|
****************************************************************************/
|
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|
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|
|
|
#include <nuttx/config.h>
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|
|
#include <assert.h>
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|
#include <errno.h>
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#include <debug.h>
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|
2012-07-25 20:58:45 +02:00
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|
#include <nuttx/analog/pga11x.h>
|
2012-07-25 20:41:10 +02:00
|
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|
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|
2012-07-25 20:58:45 +02:00
|
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|
#if defined(CONFIG_ADC) && defined(CONFIG_ADC_PGA11X)
|
2012-07-25 20:41:10 +02:00
|
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|
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|
|
/****************************************************************************
|
|
|
|
|
* Pre-processor Definitions
|
|
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|
|
****************************************************************************/
|
2019-12-05 22:13:55 +01:00
|
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|
|
|
2012-07-25 20:41:10 +02:00
|
|
|
|
/* The PGA112/PGA113 have a three-wire SPI digital interface; the
|
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|
|
* PGA116/PGA117 have a four-wire SPI digital interface. The PGA116/117 also
|
2020-03-10 13:25:22 +01:00
|
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|
|
* have daisy-chain capability (The PGA112/PGA113 can be used as the last
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|
|
* device in a daisy-chain as shown if write-only communication is
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* acceptable).
|
2012-07-25 20:41:10 +02:00
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*/
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/* PGA11x commands (PGA112/PGA113) */
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#define PGA11X_CMD_READ 0x6a00
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#define PGA11X_CMD_WRITE 0x2a00
|
2012-07-25 23:21:45 +02:00
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#define PGA11X_CMD_NOOP 0x0000
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#define PGA11X_CMD_SDN_DIS 0xe100
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#define PGA11X_CMD_SDN_EN 0xe1f1
|
2012-07-25 20:41:10 +02:00
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/* SPI Daisy-Chain Commands (PGA116/PGA117) */
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#define PGA11X_DCCMD_SELECTOR 0x8000
|
2012-07-25 23:21:45 +02:00
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#define PGA11X_DCCMD_NOOP (PGA11X_DCCMD_SELECTOR | PGA11X_CMD_NOOP)
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#define PGA11X_DCCMD_SDN_DIS (PGA11X_DCCMD_SELECTOR | PGA11X_CMD_SDN_DIS)
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#define PGA11X_DCCMD_SDN_EN (PGA11X_DCCMD_SELECTOR | PGA11X_CMD_SDN_EN)
|
2012-07-25 20:41:10 +02:00
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#define PGA11X_DCCMD_READ (PGA11X_DCCMD_SELECTOR | PGA11X_CMD_READ)
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#define PGA11X_DCCMD_WRITE (PGA11X_DCCMD_SELECTOR | PGA11X_CMD_WRITE)
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/* Write command Gain Selection Bits (PGA112/PGA113)
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*
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|
* the PGA112 and PGA116 provide binary gain selections (1, 2, 4, 8, 16, 32,
|
2020-03-10 13:25:22 +01:00
|
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|
* 64, 128); the PGA113 and PGA117 provide scope gain selections (1, 2, 5,
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* 10, 20, 50, 100, 200).
|
2012-07-25 20:41:10 +02:00
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|
|
*/
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|
2020-03-10 13:25:22 +01:00
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#define PGA11X_GAIN_SHIFT (4) /* Bits 4-7: Gain Selection Bits */
|
2012-07-25 20:41:10 +02:00
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#define PGA11X_GAIN_MASK (15 << PGA11X_GAIN_SHIFT)
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/* Write command Mux Channel Selection Bits
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*
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* The PGA112/PGA113 have a two-channel input MUX; the PGA116/PGA117 have a
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* 10-channel input MUX.
|
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|
|
|
*/
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|
2020-03-10 13:25:22 +01:00
|
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#define PGA11X_CHAN_SHIFT (0) /* Bits 0-3: Channel Selection Bits */
|
2012-07-25 20:41:10 +02:00
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|
#define PGA11X_CHAN_MASK (15 << PGA11X_CHAN_SHIFT)
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|
2020-03-10 13:25:22 +01:00
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|
/* Other definitions */
|
2012-07-25 20:41:10 +02:00
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#define SPI_DUMMY 0xff
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/****************************************************************************
|
|
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|
* Private Functions
|
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|
****************************************************************************/
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|
/****************************************************************************
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* Name: pga11x_configure
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*
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|
* Description:
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|
* Configure the SPI bus as needed for the PGA11x device.
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*
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* Returned Value:
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* None
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|
*
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|
****************************************************************************/
|
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|
static void pga11x_configure(FAR struct spi_dev_s *spi)
|
|
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
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|
|
spiinfo("MODE: %d BITS: 8 Frequency: %d\n",
|
2012-07-25 20:41:10 +02:00
|
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|
|
CONFIG_PGA11X_SPIMODE, CONFIG_PGA11X_SPIFREQUENCY);
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|
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|
/* Call the setfrequency, setbits, and setmode methods to make sure that
|
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|
|
* the SPI is properly configured for the device.
|
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|
|
*/
|
|
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|
SPI_SETMODE(spi, CONFIG_PGA11X_SPIMODE);
|
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|
|
|
SPI_SETBITS(spi, 8);
|
2020-01-02 17:49:34 +01:00
|
|
|
|
SPI_HWFEATURES(spi, 0);
|
|
|
|
|
SPI_SETFREQUENCY(spi, CONFIG_PGA11X_SPIFREQUENCY);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_lock
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Lock the SPI bus and configure it as needed for the PGA11x device.
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* None
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
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|
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|
|
static void pga11x_lock(FAR struct spi_dev_s *spi)
|
|
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Locking\n");
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
/* On SPI busses where there are multiple devices, it will be necessary to
|
|
|
|
|
* lock SPI to have exclusive access to the busses for a sequence of
|
2020-03-10 13:25:22 +01:00
|
|
|
|
* transfers. The bus should be locked before the chip is selected.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
2020-03-10 13:25:22 +01:00
|
|
|
|
* This is a blocking call and will not return until we have exclusive
|
|
|
|
|
* access to the SPI bus. We will retain that exclusive access until the
|
|
|
|
|
* bus is unlocked.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
SPI_LOCK(spi, true);
|
|
|
|
|
|
2020-03-10 13:25:22 +01:00
|
|
|
|
/* After locking the SPI bus, the we also need call the setfrequency,
|
|
|
|
|
* setbits, and setmode methods to make sure that the SPI is properly
|
|
|
|
|
* configured for the device. If the SPI buss is being shared, then it may
|
|
|
|
|
* have been left in an incompatible state.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
pga11x_configure(spi);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_unlock
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Lock the SPI bus and configure it as needed for the PGA11x device.
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* None
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static inline void pga11x_unlock(FAR struct spi_dev_s *spi)
|
|
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Unlocking\n");
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
SPI_LOCK(spi, false);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_send16
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Send 16 bits of data, ignoring any returned data
|
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - PGA11X driver instance
|
|
|
|
|
* word - The data to send
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* None
|
|
|
|
|
*
|
|
|
|
|
* Assumptions:
|
|
|
|
|
* The bus is locked and the device is selected
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static void pga11x_send16(FAR struct spi_dev_s *spi, uint16_t word)
|
|
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Send %04x\n", word);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
/* The logical interface is 16-bits wide. However, this driver uses a
|
|
|
|
|
* 8-bit configuration for greaer portability.
|
|
|
|
|
*
|
|
|
|
|
* Send the MS byte first. Then the LS byte.
|
|
|
|
|
*/
|
2012-07-25 23:21:45 +02:00
|
|
|
|
|
2012-07-25 20:41:10 +02:00
|
|
|
|
SPI_SEND(spi, word >> 8);
|
|
|
|
|
SPI_SEND(spi, word & 0xff);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_recv16
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Receive 16 bits of data.
|
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - PGA11X driver instance
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* The received 16-bit value
|
|
|
|
|
*
|
|
|
|
|
* Assumptions:
|
|
|
|
|
* The bus is locked and the device is selected
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static uint16_t pga11x_recv16(FAR struct spi_dev_s *spi)
|
|
|
|
|
{
|
|
|
|
|
uint8_t msb;
|
|
|
|
|
uint8_t lsb;
|
|
|
|
|
|
|
|
|
|
/* The logical interface is 16-bits wide. However, this driver uses a
|
|
|
|
|
* 8-bit configuration for greaer portability.
|
|
|
|
|
*
|
|
|
|
|
* Send a dummy byte and receive MS byte first. Then the LS byte.
|
|
|
|
|
*/
|
2012-07-25 23:21:45 +02:00
|
|
|
|
|
2012-07-25 20:41:10 +02:00
|
|
|
|
msb = SPI_SEND(spi, SPI_DUMMY);
|
|
|
|
|
lsb = SPI_SEND(spi, SPI_DUMMY);
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Received %02x %02x\n", msb, lsb);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
return ((uint16_t)msb << 8) | (uint16_t)lsb;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_write
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Send a 16-bit command.
|
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - PGA11X driver instance
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* cmd - PGA11X command (non-daisy chained)
|
|
|
|
|
* u1cmd - PGA11X U1 command (daisy chained)
|
|
|
|
|
* u2cmd - PGA11X U2 command (daisy chained)
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* The received 16-bit value
|
|
|
|
|
*
|
|
|
|
|
* Assumptions:
|
|
|
|
|
* The device is NOT selected and the NOT bus is locked.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
#ifndef CONFIG_PGA11X_DAISYCHAIN
|
|
|
|
|
static void pga11x_write(FAR struct spi_dev_s *spi, uint16_t cmd)
|
|
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("cmd %04x\n", cmd);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
/* Lock, select, send the 16-bit command, de-select, and un-lock. */
|
|
|
|
|
|
|
|
|
|
pga11x_lock(spi);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), true);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
pga11x_send16(spi, cmd);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), false);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
pga11x_unlock(spi);
|
|
|
|
|
}
|
|
|
|
|
#else
|
2020-03-10 13:25:22 +01:00
|
|
|
|
static void pga11x_write(FAR struct spi_dev_s *spi, uint16_t u1cmd,
|
|
|
|
|
uint16_t u2cmd)
|
2012-07-25 20:41:10 +02:00
|
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("U1 cmd: %04x U2 cmd: %04x\n", u1cmd, u2cmd);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
2020-03-10 13:25:22 +01:00
|
|
|
|
/* Lock, select, send the U2 16-bit command, the U1 16-bit command,
|
|
|
|
|
* de-select, and un-lock.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
pga11x_lock(spi);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), true);
|
2012-07-25 23:21:45 +02:00
|
|
|
|
pga11x_send16(spi, u2cmd);
|
|
|
|
|
pga11x_send16(spi, u1cmd);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), false);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
pga11x_unlock(spi);
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Public Functions
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_initialize
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* Initialize the PGA117 amplifier/multiplexer(s).
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - An SPI "bottom half" device driver instance
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* On success, a non-NULL opaque handle is returned; a NULL is returned
|
|
|
|
|
* on any failure. This handle may be used with the other PGA117 interface
|
|
|
|
|
* functions to control the multiplexer
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
PGA11X_HANDLE pga11x_initialize(FAR struct spi_dev_s *spi)
|
|
|
|
|
{
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Entry\n");
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
2016-01-24 01:54:36 +01:00
|
|
|
|
/* No Special state is required, just return the SPI driver instance as
|
|
|
|
|
* the handle. This gives us a place to extend functionality in the
|
2020-02-22 19:31:14 +01:00
|
|
|
|
* future if necessary.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*/
|
2012-07-25 23:21:45 +02:00
|
|
|
|
|
2012-07-25 20:41:10 +02:00
|
|
|
|
return (PGA11X_HANDLE)spi;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_select
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* Select an input channel and gain for all PGA11xs.
|
|
|
|
|
*
|
|
|
|
|
* If CONFIG_PGA11X_DAISYCHAIN is defined, then pga11x_select() configures
|
|
|
|
|
* both chips in the daisy-chain. pga11x_uselect() is provided to support
|
|
|
|
|
* configuring the parts in the daisychain independently.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* spi - An SPI "bottom half" device driver instance
|
|
|
|
|
* settings - New channel and gain settings
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
2018-09-14 14:55:45 +02:00
|
|
|
|
* Zero on success; a negated errno value on failure.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
int pga11x_select(PGA11X_HANDLE handle,
|
|
|
|
|
FAR const struct pga11x_settings_s *settings)
|
2012-07-25 20:41:10 +02:00
|
|
|
|
{
|
2012-07-25 23:21:45 +02:00
|
|
|
|
#ifndef CONFIG_PGA11X_DAISYCHAIN
|
2012-07-25 20:41:10 +02:00
|
|
|
|
FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
|
|
|
|
|
uint16_t cmd;
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
DEBUGASSERT(handle && settings);
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("channel: %d gain: %d\n", settings->channel, settings->gain);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
/* Format the command */
|
|
|
|
|
|
|
|
|
|
cmd = PGA11X_CMD_WRITE |
|
2012-07-25 23:21:45 +02:00
|
|
|
|
((uint16_t)settings->channel << PGA11X_CHAN_SHIFT) |
|
|
|
|
|
((uint16_t)settings->gain << PGA11X_GAIN_SHIFT);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
/* Send the command */
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
pga11x_write(spi, cmd);
|
|
|
|
|
return OK;
|
2012-07-25 23:21:45 +02:00
|
|
|
|
#else
|
|
|
|
|
FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
|
|
|
|
|
uint16_t u1cmd;
|
|
|
|
|
uint16_t u2cmd;
|
|
|
|
|
|
|
|
|
|
DEBUGASSERT(handle && settings);
|
2020-03-10 13:25:22 +01:00
|
|
|
|
spiinfo("U1 channel: %d gain: %d\n", settings->u1.channel,
|
|
|
|
|
settings->u1.gain);
|
|
|
|
|
spiinfo("U1 channel: %d gain: %d\n", settings->u1.channel,
|
|
|
|
|
settings->u1.gain);
|
2012-07-25 23:21:45 +02:00
|
|
|
|
|
|
|
|
|
/* Format the commands */
|
|
|
|
|
|
|
|
|
|
u1cmd = PGA11X_CMD_WRITE |
|
|
|
|
|
((uint16_t)settings->u1.channel << PGA11X_CHAN_SHIFT) |
|
|
|
|
|
((uint16_t)settings->u1.gain << PGA11X_GAIN_SHIFT);
|
|
|
|
|
|
|
|
|
|
u2cmd = PGA11X_DCCMD_WRITE |
|
|
|
|
|
((uint16_t)settings->u2.channel << PGA11X_CHAN_SHIFT) |
|
|
|
|
|
((uint16_t)settings->u2.gain << PGA11X_GAIN_SHIFT);
|
|
|
|
|
|
|
|
|
|
/* Send the command */
|
|
|
|
|
|
|
|
|
|
pga11x_write(spi, u1cmd, u2cmd);
|
|
|
|
|
return OK;
|
|
|
|
|
#endif
|
2012-07-25 20:41:10 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* Name: pga11x_uselect
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* Select an input channel and gain for one PGA11x.
|
|
|
|
|
*
|
|
|
|
|
* If CONFIG_PGA11X_DAISYCHAIN is defined, then pga11x_uselect() configures
|
|
|
|
|
* one chips in the daisy-chain.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* spi - An SPI "bottom half" device driver instance
|
|
|
|
|
* pos - Position of the chip in the daisy chain (0 or 1)
|
|
|
|
|
* settings - New channel and gain settings
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
2018-09-14 14:55:45 +02:00
|
|
|
|
* Zero on success; a negated errno value on failure.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_PGA11X_DAISYCHAIN
|
2012-07-25 23:21:45 +02:00
|
|
|
|
int pga11x_uselect(PGA11X_HANDLE handle, int pos,
|
|
|
|
|
FAR const struct pga11x_usettings_s *settings)
|
2012-07-25 20:41:10 +02:00
|
|
|
|
{
|
|
|
|
|
FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
|
2012-07-25 23:21:45 +02:00
|
|
|
|
uint16_t u1cmd;
|
|
|
|
|
uint16_t u2cmd;
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("channel: %d gain: %d\n", settings->channel, settings->gain);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
DEBUGASSERT(handle);
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
/* Format the commands */
|
|
|
|
|
|
|
|
|
|
if (pos == 0)
|
|
|
|
|
{
|
|
|
|
|
u1cmd = PGA11X_CMD_WRITE |
|
|
|
|
|
((uint16_t)settings->channel << PGA11X_CHAN_SHIFT) |
|
|
|
|
|
((uint16_t)settings->gain << PGA11X_GAIN_SHIFT);
|
|
|
|
|
u2cmd = PGA11X_DCCMD_NOOP;
|
|
|
|
|
}
|
|
|
|
|
else /* if (pos == 1) */
|
|
|
|
|
{
|
|
|
|
|
u1cmd = PGA11X_CMD_NOOP;
|
|
|
|
|
u2cmd = PGA11X_DCCMD_WRITE |
|
|
|
|
|
((uint16_t)settings->channel << PGA11X_CHAN_SHIFT) |
|
|
|
|
|
((uint16_t)settings->gain << PGA11X_GAIN_SHIFT);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Send the command */
|
|
|
|
|
|
|
|
|
|
pga11x_write(spi, u1cmd, u2cmd);
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_read
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Read from all PGA117 amplifier/multiplexers.
|
|
|
|
|
*
|
|
|
|
|
* If CONFIG_PGA11X_DAISYCHAIN is defined, then pga11x_read() reads from
|
|
|
|
|
* both chips in the daisy-chain. pga11x_uread() is provided to support
|
|
|
|
|
* accessing the parts independently.
|
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - An SPI "bottom half" device driver instance
|
|
|
|
|
* settings - Returned channel and gain settings
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
2018-09-14 14:55:45 +02:00
|
|
|
|
* Zero on success; a negated errno value on failure.
|
2012-07-25 23:21:45 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
int pga11x_read(PGA11X_HANDLE handle, FAR struct pga11x_settings_s *settings)
|
|
|
|
|
{
|
|
|
|
|
#ifdef CONFIG_PGA11X_DAISYCHAIN
|
|
|
|
|
FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
|
|
|
|
|
uint16_t u1value;
|
|
|
|
|
uint16_t u2value;
|
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Entry\n");
|
2012-07-25 23:21:45 +02:00
|
|
|
|
DEBUGASSERT(handle && settings);
|
|
|
|
|
|
2012-07-25 20:41:10 +02:00
|
|
|
|
/* Lock the bus and read the configuration */
|
|
|
|
|
|
|
|
|
|
pga11x_lock(spi);
|
|
|
|
|
|
|
|
|
|
/* Select, send the 16-bit command, the 16-bit daisy-chain command, and
|
|
|
|
|
* then de-select the part. I do not know if de-selection between word
|
|
|
|
|
* transfers is required. However, it is shown in the timing diagrams
|
|
|
|
|
* for the part.
|
|
|
|
|
*/
|
|
|
|
|
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), true);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
pga11x_send16(spi, PGA11X_CMD_READ);
|
|
|
|
|
pga11x_send16(spi, PGA11X_DCCMD_READ);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), false);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
/* Re-select, get the returned values, de-select, and unlock */
|
|
|
|
|
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), true);
|
2012-07-25 23:21:45 +02:00
|
|
|
|
u2value = pga11x_recv16(spi);
|
|
|
|
|
u1value = pga11x_recv16(spi);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), false);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
pga11x_unlock(spi);
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
/* Decode the returned value */
|
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Returning %04x %04x\n", u2value, u1value);
|
2020-03-10 13:25:22 +01:00
|
|
|
|
settings->u1.channel =
|
|
|
|
|
(uint8_t)((u1value & PGA11X_CHAN_MASK) >> PGA11X_CHAN_SHIFT);
|
|
|
|
|
settings->u1.gain =
|
|
|
|
|
(uint8_t)((u1value & PGA11X_GAIN_MASK) >> PGA11X_GAIN_SHIFT);
|
|
|
|
|
settings->u2.channel =
|
|
|
|
|
(uint8_t)((u2value & PGA11X_CHAN_MASK) >> PGA11X_CHAN_SHIFT);
|
|
|
|
|
settings->u2.gain =
|
|
|
|
|
(uint8_t)((u2value & PGA11X_GAIN_MASK) >> PGA11X_GAIN_SHIFT);
|
2012-07-25 23:21:45 +02:00
|
|
|
|
return OK;
|
2012-07-25 20:41:10 +02:00
|
|
|
|
#else
|
|
|
|
|
FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
|
|
|
|
|
uint16_t value;
|
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Entry\n");
|
2012-07-25 20:41:10 +02:00
|
|
|
|
DEBUGASSERT(handle);
|
|
|
|
|
|
|
|
|
|
/* Lock the bus and read the configuration */
|
|
|
|
|
|
|
|
|
|
pga11x_lock(spi);
|
|
|
|
|
|
2020-03-10 13:25:22 +01:00
|
|
|
|
/* Select, send the 16-bit PGA11X_CMD_READ command, and de-select. I do
|
|
|
|
|
* not know if de-selection between word transfers is required. However,
|
2012-07-25 20:41:10 +02:00
|
|
|
|
* it is shown in the timing diagrams for the part.
|
|
|
|
|
*/
|
|
|
|
|
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), true);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
pga11x_send16(spi, PGA11X_CMD_READ);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), false);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
/* Re-select, get the returned value, de-select, and unlock */
|
|
|
|
|
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), true);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
value = pga11x_recv16(spi);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_MUX(0), false);
|
2012-07-25 20:41:10 +02:00
|
|
|
|
pga11x_unlock(spi);
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
/* Decode the returned value */
|
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Returning: %04x\n", value);
|
2020-03-10 13:25:22 +01:00
|
|
|
|
settings->channel =
|
|
|
|
|
(uint8_t)((value & PGA11X_CHAN_MASK) >> PGA11X_CHAN_SHIFT);
|
|
|
|
|
settings->gain =
|
|
|
|
|
(uint8_t)((value & PGA11X_GAIN_MASK) >> PGA11X_GAIN_SHIFT);
|
2012-07-25 23:21:45 +02:00
|
|
|
|
return OK;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_uread
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Read from one PGA117 amplifier/multiplexer.
|
|
|
|
|
*
|
|
|
|
|
* If CONFIG_PGA11X_DAISYCHAIN is defined, then pga11x_read() reads
|
|
|
|
|
* the parts independently.
|
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - An SPI "bottom half" device driver instance
|
|
|
|
|
* pos - Position of the chip in the daisy chain (0 or 1)
|
|
|
|
|
* settings - Returned channel and gain settings
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
2018-09-14 14:55:45 +02:00
|
|
|
|
* Zero on success; a negated errno value on failure.
|
2012-07-25 23:21:45 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_PGA11X_DAISYCHAIN
|
|
|
|
|
int pga11x_uread(PGA11X_HANDLE handle, int pos,
|
|
|
|
|
FAR struct pga11x_usettings_s *settings)
|
|
|
|
|
{
|
|
|
|
|
struct pga11x_settings_s both;
|
|
|
|
|
int ret = pga11x_read(handle, &both);
|
|
|
|
|
if (ret == OK)
|
|
|
|
|
{
|
|
|
|
|
if (pos == 0)
|
|
|
|
|
{
|
|
|
|
|
settings->channel = both.u1.channel;
|
|
|
|
|
settings->gain = both.u1.gain;
|
|
|
|
|
}
|
|
|
|
|
else /* if (pos == 1) */
|
|
|
|
|
{
|
|
|
|
|
settings->channel = both.u2.channel;
|
|
|
|
|
settings->gain = both.u2.gain;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return ret;
|
2012-07-25 20:41:10 +02:00
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* Name: pga11x_shutdown
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* Put all PGA11x's in shutdown down mode.
|
|
|
|
|
*
|
|
|
|
|
* If CONFIG_PGA11X_DAISYCHAIN is defined, then pga11x_shutdown() controls
|
|
|
|
|
* both chips in the daisy-chain. pga11x_ushutdown() is provided to
|
|
|
|
|
* control the parts independently.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - An SPI "bottom half" device driver instance
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
2018-09-14 14:55:45 +02:00
|
|
|
|
* Zero on success; a negated errno value on failure.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
int pga11x_shutdown(PGA11X_HANDLE handle)
|
2012-07-25 20:41:10 +02:00
|
|
|
|
{
|
|
|
|
|
FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
|
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Entry\n");
|
2012-07-25 20:41:10 +02:00
|
|
|
|
DEBUGASSERT(handle);
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
/* Enter shutdown mode by issuing an SDN_EN command */
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
#ifdef CONFIG_PGA11X_DAISYCHAIN
|
|
|
|
|
pga11x_write(spi, PGA11X_CMD_SDN_EN, PGA11X_DCCMD_SDN_EN);
|
|
|
|
|
#else
|
|
|
|
|
pga11x_write(spi, PGA11X_CMD_SDN_EN);
|
|
|
|
|
#endif
|
2012-07-25 20:41:10 +02:00
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* Name: pga11x_ushutdown
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* Put one PGA11x in shutdown down mode.
|
|
|
|
|
*
|
|
|
|
|
* If CONFIG_PGA11X_DAISYCHAIN is defined, then pga11x_ushutdown() is
|
|
|
|
|
* provided to shutdown the parts independently.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - An SPI "bottom half" device driver instance
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* pos - Position of the chip in the daisy chain (0 or 1)
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
2018-09-14 14:55:45 +02:00
|
|
|
|
* Zero on success; a negated errno value on failure.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
#ifdef CONFIG_PGA11X_DAISYCHAIN
|
|
|
|
|
int pga11x_ushutdown(PGA11X_HANDLE handle, int pos)
|
2012-07-25 20:41:10 +02:00
|
|
|
|
{
|
|
|
|
|
FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
|
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Entry\n");
|
2012-07-25 20:41:10 +02:00
|
|
|
|
DEBUGASSERT(handle);
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
/* Enter shutdown mode by issuing an SDN_EN command */
|
|
|
|
|
|
|
|
|
|
if (pos == 0)
|
|
|
|
|
{
|
|
|
|
|
pga11x_write(spi, PGA11X_CMD_SDN_EN, PGA11X_DCCMD_NOOP);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
pga11x_write(spi, PGA11X_CMD_NOOP, PGA11X_DCCMD_SDN_EN);
|
|
|
|
|
}
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
2012-07-25 23:21:45 +02:00
|
|
|
|
#endif
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_enable
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
2012-07-25 23:21:45 +02:00
|
|
|
|
* Take all PGA11x's out of shutdown down mode.
|
|
|
|
|
*
|
|
|
|
|
* If CONFIG_PGA11X_DAISYCHAIN is defined, then pga11x_enable() controls
|
|
|
|
|
* both chips in the daisy-chain. pga11x_uenable() is provided to
|
|
|
|
|
* control the parts independently.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - An SPI "bottom half" device driver instance
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
2018-09-14 14:55:45 +02:00
|
|
|
|
* Zero on success; a negated errno value on failure.
|
2012-07-25 20:41:10 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
int pga11x_enable(PGA11X_HANDLE handle)
|
|
|
|
|
{
|
|
|
|
|
FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
|
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Entry\n");
|
2012-07-25 20:41:10 +02:00
|
|
|
|
DEBUGASSERT(handle);
|
|
|
|
|
|
|
|
|
|
/* Lock the bus and send the shutdown disable command. Shutdown mode is
|
|
|
|
|
* cleared (returned to the last valid write configuration) by the SDN_DIS
|
|
|
|
|
* command or by any valid Write command
|
|
|
|
|
*/
|
|
|
|
|
|
2012-07-25 23:21:45 +02:00
|
|
|
|
#ifdef CONFIG_PGA11X_DAISYCHAIN
|
|
|
|
|
pga11x_write(spi, PGA11X_CMD_SDN_DIS, PGA11X_DCCMD_SDN_DIS);
|
|
|
|
|
#else
|
|
|
|
|
pga11x_write(spi, PGA11X_CMD_SDN_DIS);
|
|
|
|
|
#endif
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: pga11x_uenable
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Take one PGA11x out of shutdown down mode.
|
|
|
|
|
*
|
|
|
|
|
* If CONFIG_PGA11X_DAISYCHAIN is defined, then pga11x_uenable() is
|
|
|
|
|
* provided to enable the parts independently.
|
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
|
|
|
|
* spi - An SPI "bottom half" device driver instance
|
|
|
|
|
* pos - Position of the chip in the daisy chain (0 or 1)
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
2018-09-14 14:55:45 +02:00
|
|
|
|
* Zero on success; a negated errno value on failure.
|
2012-07-25 23:21:45 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_PGA11X_DAISYCHAIN
|
|
|
|
|
int pga11x_uenable(PGA11X_HANDLE handle, int pos)
|
|
|
|
|
{
|
|
|
|
|
FAR struct spi_dev_s *spi = (FAR struct spi_dev_s *)handle;
|
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
|
spiinfo("Entry\n");
|
2012-07-25 23:21:45 +02:00
|
|
|
|
DEBUGASSERT(handle);
|
|
|
|
|
|
|
|
|
|
/* Enter shutdown mode by issuing an SDN_EN command */
|
|
|
|
|
|
|
|
|
|
if (pos == 0)
|
|
|
|
|
{
|
|
|
|
|
pga11x_write(spi, PGA11X_CMD_SDN_DIS, PGA11X_DCCMD_NOOP);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
pga11x_write(spi, PGA11X_CMD_NOOP, PGA11X_DCCMD_SDN_DIS);
|
|
|
|
|
}
|
|
|
|
|
|
2012-07-25 20:41:10 +02:00
|
|
|
|
return OK;
|
|
|
|
|
}
|
2012-07-25 23:21:45 +02:00
|
|
|
|
#endif
|
2012-07-25 20:41:10 +02:00
|
|
|
|
|
2012-07-25 20:58:45 +02:00
|
|
|
|
#endif /* CONFIG_ADC && CONFIG_ADC_PGA11X */
|