2016-10-18 17:43:56 +02:00
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/****************************************************************************
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2016-10-18 19:30:30 +02:00
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* configs/elf32-core/scripts/esp32.template
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2016-10-18 17:43:56 +02:00
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* ESP32 Linker Script Memory Layout
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*
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* This file describes the memory layout (memory blocks) as virtual
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* memory addresses.
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*
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* esp32.common.ld contains output sections to link compiler output
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* into these memory blocks.
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*
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* NOTE: That this is not the actual linker script but rather a "template"
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* for the elf32_out.ld script. This template script is passed through
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* the C preprocessor to include selected configuration options.
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*
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****************************************************************************/
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#include <nuttx/config.h>
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MEMORY
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{
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/* All these values assume the flash cache is on, and have the blocks this
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* uses subtracted from the length of the various regions. The 'data access
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* port' dram/drom regions map to the same iram/irom regions but are
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* connected to the data port of the CPU and eg allow bytewise access.
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*/
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/* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
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iram0_0_seg (RX) : org = 0x40080000, len = 0x20000
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/* Even though the segment name is iram, it is actually mapped to flash */
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iram0_2_seg (RX) : org = 0x400D0018, len = 0x330000
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/* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
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* Enabling Bluetooth & Trace Memory features in menuconfig will decrease
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* the amount of RAM available.
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*/
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dram0_0_seg (RW) : org = 0x3ffb0000 + CONFIG_ESP32_BT_RESERVE_DRAM,
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len = 0x50000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM - CONFIG_ESP32_BT_RESERVE_DRAM
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/* Flash mapped constant data */
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drom0_0_seg (R) : org = 0x3f400010, len = 0x800000
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/* RTC fast memory (executable). Persists over deep sleep. */
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rtc_iram_seg(RWX) : org = 0x400c0000, len = 0x2000
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/* RTC slow memory (data accessible). Persists over deep sleep.
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* Start of RTC slow memory is reserved for ULP co-processor code + data,
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* if enabled.
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*/
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rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM,
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len = 0x1000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
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}
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/* Heap ends at top of dram0_0_seg */
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2016-10-23 22:20:03 +02:00
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_eheap = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM;
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