2021-03-05 07:15:02 +01:00
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/****************************************************************************
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* arch/xtensa/include/esp32/memory_layout.h
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*
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2021-03-05 07:34:03 +01:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2021-03-05 07:15:02 +01:00
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*
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2021-03-05 07:34:03 +01:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2021-03-05 07:15:02 +01:00
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*
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2021-03-05 07:34:03 +01:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2021-03-05 07:15:02 +01:00
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* The heap overview:
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*
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* CONFIG_HEAP2_BASE eg. 3f80 0000
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* :
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2021-03-08 13:22:43 +01:00
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* : g_mmheap (CONFIG_ESP32_SPIRAM)
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2021-03-05 07:15:02 +01:00
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* :
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* CONFIG_HEAP2_BASE + CONFIG_HEAP2_SIZE eg. 3fc0 0000
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*
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2021-03-10 15:34:44 +01:00
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* HEAP_REGION0_START 3ffa e6f0
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* :
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* : g_mmheap region0
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* :
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* HEAP_REGION0_END 3ffa fff0
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* :
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* _sheap eg. 3ffc 8c6c
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* :
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* : g_mmheap region1
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* :
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* HEAP_REGION1_END 3ffd fff0
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* :
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* : ROM data
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* :
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2021-03-08 13:22:43 +01:00
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*---------------------------------------------------------------------
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* if !CONFIG_SMP
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*
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* HEAP_REGION2_START 3ffe 0450
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* :
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2021-03-08 09:58:09 +01:00
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* : g_iheap (CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP)
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* :
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* HEAP_REGION2_START + CONFIG_XTENSA_IMEM_REGION_SIZE
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* :
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* : g_mmheap region2
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* :
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*---------------------------------------------------------------------
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* if CONFIG_SMP
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*
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* HEAP_REGION2_START 3ffe 0450
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* :
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* : g_mmheap region2
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* :
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* HEAP_REGION2_END 3ffe 3f10
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* :
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* : ROM data
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* :
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* HEAP_REGION3_START 3ffe 5240
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* :
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* : g_iheap (CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP)
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* :
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* HEAP_REGION3_START + CONFIG_XTENSA_IMEM_REGION_SIZE
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* :
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* : g_mmheap region3
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* :
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*---------------------------------------------------------------------
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* _eheap 4000 0000
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*/
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2021-03-10 15:34:44 +01:00
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/* This region is supposed to be part of the ROM data. However, the ROM
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* isn't using the last 6KB, so we get it as heap. It's called REGION0
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* because it starts before _sheap.
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* Although this region is adjacent to 0x3ffb0000 (start of static memory)
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* we don't add it to static memory but we add it as heap. The reason is the
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* Bluetooth controller uses a fixed 64KB region at the start of 0x3ffb0000.
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* It's cleaner, from a source code perspective, to start static memory at
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* 0x3ffb0000 and get what's before that as heap.
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*/
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#define HEAP_REGION0_START 0x3ffae6f0
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#define HEAP_REGION0_END 0x3ffafff0
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/* Region 1 of the heap is the area from the end of the .data section to the
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* beginning of the ROM data. The start address is defined from the linker
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* script as "_sheap". The end is defined here, as follows:
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*/
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#define HEAP_REGION1_END 0x3ffdfff0
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/* Region 2 of the heap is the area from the end of the ROM data to the end
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* of DRAM. The linker script has already set "_eheap" as the end of DRAM,
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* the following defines the start of region2.
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* N.B: That ROM data consists of 2 regions, one per CPU. If SMP is not
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* enabled include APP's region with the heap.
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2021-03-08 09:58:09 +01:00
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*
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* When an internal heap is enabled this region starts at an offset equal to
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* the size of the internal heap.
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2021-03-08 13:04:41 +01:00
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*
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* The QEMU bootloader image is slightly different than the chip's one.
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2021-03-16 18:18:27 +01:00
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* The ROM on PRO and APP CPUs uses different regions for static data.
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* In QEMU, however, we load only one ROM binary, taken from the PRO CPU,
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* and it is used by both CPUs. So, in QEMU, if we allocate PRO CPUs region
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* early, it will be clobbered once the APP CPU starts.
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* We can delay the allocation to when everything has started through the
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* board_late_initiliaze hook, as is done for the APP data, however this
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* should be fixed from QEMU side. The following macros, then, just skip
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2021-03-16 18:18:27 +01:00
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* PRO CPU's regions when a QEMU image generation is enabled with SMP.
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*/
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2021-03-08 13:04:41 +01:00
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#if defined(CONFIG_ESP32_QEMU_IMAGE) && defined(CONFIG_SMP)
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# define HEAP_REGION2_START 0x3ffe7e40
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#else
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# define HEAP_REGION2_START 0x3ffe0450
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#endif
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#ifdef CONFIG_SMP
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# define HEAP_REGION2_END 0x3ffe3f10
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# define HEAP_REGION3_START 0x3ffe5240
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#endif
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#ifdef CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP
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# define XTENSA_IMEM_REGION_SIZE CONFIG_XTENSA_IMEM_REGION_SIZE
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#else
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# define XTENSA_IMEM_REGION_SIZE 0
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#endif
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/* Internal heap starts at the end of the ROM data.
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* This is either the start of region2 if SMP is disabled or start of region3
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* if SMP is enabled.
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*/
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#ifndef CONFIG_SMP
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# define ESP32_IMEM_START HEAP_REGION2_START
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#else
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# define ESP32_IMEM_START HEAP_REGION3_START
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#endif
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2021-03-08 09:59:20 +01:00
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/* Region of unused ROM App data */
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#define HEAP_REGION_ROMAPP_START 0x3ffe4360
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#define HEAP_REGION_ROMAPP_END 0x3ffe5230
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