2021-03-21 11:37:01 +01:00
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/****************************************************************************
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2008-10-29 21:01:04 +01:00
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* arch/arm/include/str71x/irq.h
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*
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2021-03-20 21:46:19 +01:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2008-10-29 21:01:04 +01:00
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*
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2021-03-20 21:46:19 +01:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2008-10-29 21:01:04 +01:00
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*
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2021-03-20 21:46:19 +01:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2008-10-29 21:01:04 +01:00
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*
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2021-03-21 11:37:01 +01:00
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****************************************************************************/
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2008-10-29 21:01:04 +01:00
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2020-04-05 23:00:04 +02:00
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/* This file should never be included directly but, rather,
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2008-10-29 21:01:04 +01:00
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_STR71X_IRQ_H
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#define __ARCH_ARM_INCLUDE_STR71X_IRQ_H
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2021-03-21 11:37:01 +01:00
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/****************************************************************************
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2008-10-29 21:01:04 +01:00
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* Included Files
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2021-03-21 11:37:01 +01:00
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****************************************************************************/
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2008-10-29 21:01:04 +01:00
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#include <nuttx/config.h>
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2021-03-21 11:37:01 +01:00
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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2008-10-29 21:01:04 +01:00
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/* IRQ channels */
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2010-05-02 23:58:00 +02:00
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#define STR71X_IRQ_T0TIMI (0) /* IRQ 0: T0.EFTI Timer 0 global interrupt */
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#define STR71X_IRQ_FLASH (1) /* IRQ 1: FLASH FLASH global interrupt */
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#define STR71X_IRQ_RCCU (2) /* IRQ 2: PRCCU PRCCU global interrupt */
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#define STR71X_IRQ_RTC (3) /* IRQ 3: RTC Real Time Clock global interrupt */
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#define STR71X_IRQ_WDG (4) /* IRQ 4: WDG.IRQ Watchdog timer interrupt */
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#define STR71X_IRQ_XTI (5) /* IRQ 5: XTI.IRQ XTI external interrupt */
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#define STR71X_IRQ_USBHP (6) /* IRQ 6: USB.HPIRQ USB high priority event interrupt */
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#define STR71X_IRQ_I2C0ITERR (7) /* IRQ 7: I2C0.ITERR I2C 0 error interrupt */
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#define STR71X_IRQ_I2C1ITERR (8) /* IRQ 8: I2C1.ITERR I2C 1 error interrupt */
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#define STR71X_IRQ_UART0 (9) /* IRQ 9: UART0.IRQ UART 0 global interrupt */
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#define STR71X_IRQ_UART1 (10) /* IRQ 10: UART1.IRQ UART 1 global interrupt */
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#define STR71X_IRQ_UART2 (11) /* IRQ 11: UART2.IRQ UART 2 global interrupt */
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#define STR71X_IRQ_UART3 (12) /* IRQ 12: UART3.IRQ UART 3 global interrupt */
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#define STR71X_IRQ_SPI0 (13) /* IRQ 13: BSPI0.IRQ BSPI 0 global interrupt */
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#define STR71X_IRQ_SPI1 (14) /* IRQ 14: BSPI1.IRQ BSPI 1 global interrupt */
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#define STR71X_IRQ_I2C0 (15) /* IRQ 15: I2C0.IRQ I2C 0 tx/rx interrupt */
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#define STR71X_IRQ_I2C1 (16) /* IRQ 16: I2C1.IRQ I2C 1 tx/rx interrupt */
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#define STR71X_IRQ_CAN (17) /* IRQ 17: CAN.IRQ CAN module global interrupt */
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#define STR71X_IRQ_ADC (18) /* IRQ 18: ADC.IRQ ADC sample ready interrupt */
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#define STR71X_IRQ_T1TIMI (19) /* IRQ 19: T1.GI Timer 1 global interrupt */
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#define STR71X_IRQ_T2TIMI (20) /* IRQ 20: T2.GI Timer 2 global interrupt */
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#define STR71X_IRQ_T3TIMI (21) /* IRQ 21: T3.GI Timer 3 global interrupt */
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/* IRQ 22-24: Reserved */
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#define STR71X_IRQ_HDLC (25) /* IRQ 25: HDLC.IRQ HDLC global interrupt */
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#define STR71X_IRQ_USBLP (26) /* IRQ 26: USB.LPIRQ USB low priority event interrupt */
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/* IRQ 27-28: Reserved */
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#define STR71X_IRQ_T0TOI (29) /* IRQ 29: T0.TOI Timer 0 Overflow interrupt */
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#define STR71X_IRQ_T0OC1 (30) /* IRQ 30: T0.OCMPA Timer 0 Output Compare A interrupt */
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#define STR71X_IRQ_T0OC2 (31) /* IRQ 31: T0.OCMPB Timer 0 Output Compare B interrupt */
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#define STR71X_NBASEIRQS (32)
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#ifdef CONFIG_STR71X_XTI
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# define STR71X_IRQ_FIRSTXTI (32)
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# define STR71X_IRQ_SW (32) /* Line 0: SW interrupt - no HW connection */
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# define STR71X_IRQ_USBWKUP (33) /* Line 1: USB wake-up event: generated while exiting
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* from suspend mode */
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# define STR71X_IRQ_PORT2p8 (34) /* Line 2: Port 2.8 - External Interrupt */
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# define STR71X_IRQ_PORT2p9 (35) /* Line 3: Port 2.9 - External Interrupt */
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# define STR71X_IRQ_PORT2p10 (36) /* Line 4: Port 2.10 - External Interrupt */
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# define STR71X_IRQ_PORT2p11 (37) /* Line 5: Port 2.11 - External Interrupt */
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# define STR71X_IRQ_PORT1p11 (38) /* Line 6: Port 1.11 - CAN module receive pin (CANRX). */
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# define STR71X_IRQ_PORT1p13 (39) /* Line 7: Port 1.13 - HDLC clock (HCLK) or I2C.0 Clock
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* (I0.SCL) */
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# define STR71X_IRQ_PORT1p14 (40) /* Line 8: Port 1.14 - HDLC receive pin (HRXD) or I2C.0
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* Data (SDA) */
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# define STR71X_IRQ_PORT0p1 (41) /* Line 9: Port 0.1 - BSPI0 Slave Input data (S0.MOSI)
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* or UART3 Receive Data Input (U3.Rx) */
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# define STR71X_IRQ_PORT0p2 (42) /* Line 10: Port 0.2 - BSPI0 Slave Input serial clock
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* (S0.SCLK) or I2C.1 Clock (I1.SCL) */
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# define STR71X_IRQ_PORT0p6 (43) /* Line 11: Port 0.6 - BSPI1 Slave Input serial clock
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* (S1.SCLK) */
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# define STR71X_IRQ_PORT0p8 (44) /* Line 12: Port 0.8 - UART0 Receive Data Input (U0.Rx) */
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# define STR71X_IRQ_PORT0p10 (45) /* Line 13: Port 0.10 - UART1 Receive Data Input (U1.Rx) */
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# define STR71X_IRQ_PORT0p13 (46) /* Line 14: Port 0.13 - UART2 Receive Data Input (U2.Rx) */
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# define STR71X_IRQ_PORT0p15 (47) /* Line 15: Port 0.15 - WAKEUP pin or RTC ALARM */
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# define NR_IRQS (48)
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#else
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# define NR_IRQS (32)
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#endif
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2008-10-29 21:01:04 +01:00
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2008-11-01 17:12:09 +01:00
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#define STR71X_IRQ_SYSTIMER STR71X_IRQ_T0TIMI
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2008-10-29 21:01:04 +01:00
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/* FIQ channels */
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#define STR71X_FIQ_T0TIMI (0X00000001)
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#define STR71X_FIQ_WDG (0X00000002)
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#define STR71X_FIQ_WDGT0TIMIS (0X00000003)
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2021-03-21 11:37:01 +01:00
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/****************************************************************************
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2008-10-29 21:01:04 +01:00
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* Public Types
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****************************************************************************/
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2008-10-29 21:01:04 +01:00
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2021-03-21 11:37:01 +01:00
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/****************************************************************************
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2008-10-29 21:01:04 +01:00
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* Public Data
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2021-03-21 11:37:01 +01:00
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****************************************************************************/
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2008-10-29 21:01:04 +01:00
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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2015-06-13 03:26:01 +02:00
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extern "C"
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{
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2008-10-29 21:01:04 +01:00
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#else
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#define EXTERN extern
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#endif
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2021-03-21 11:37:01 +01:00
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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2008-10-29 21:01:04 +01:00
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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2010-05-02 23:58:00 +02:00
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#endif /* __ASSEMBLY__ */
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2008-10-29 21:01:04 +01:00
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2008-11-01 17:12:09 +01:00
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#endif /* __ARCH_ARM_INCLUDE_STR71X_IRQ_H */
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