2021-10-29 10:39:12 +02:00
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/****************************************************************************
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2021-10-29 13:27:53 +02:00
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* arch/arm/src/phy62xx/start.c
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2021-10-29 10:39:12 +02:00
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/init.h>
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2021-10-29 13:27:53 +02:00
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#include <nuttx/arch.h>
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2021-10-29 10:39:12 +02:00
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#include <arch/board/board.h>
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#include "arm_internal.h"
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#include "start.h"
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#include "clock.h"
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#include "log.h"
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2022-01-27 14:55:47 +01:00
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#include "flash.h"
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2021-10-29 10:39:12 +02:00
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#include "jump_function.h"
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2022-01-27 14:55:47 +01:00
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#include "rom_sym_def.h"
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2021-10-29 13:27:53 +02:00
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/* #include "rf_phy_driver.h" */
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2021-10-29 10:39:12 +02:00
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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2021-10-29 13:27:53 +02:00
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2021-10-29 10:39:12 +02:00
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extern const uint32_t _sramscttexts;
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extern const uint32_t _sramscttext;
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extern const uint32_t _eramscttext;
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extern const uint32_t _sjtblss;
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extern const uint32_t _sjtbls;
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extern const uint32_t _ejtbls;
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#define IDLE_STACK ((uint32_t)&_ebss+CONFIG_IDLETHREAD_STACKSIZE)
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const uintptr_t g_idle_topstack = IDLE_STACK;
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: showprogress
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*
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* Description:
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* Print a character on the CONSOLE USART to show boot status.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_FEATURES
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# define showprogress(c) up_putc(c)
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#else
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# define showprogress(c)
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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2022-05-13 14:32:18 +02:00
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* Name: c_start
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*
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* Description:
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* This is the reset entry point.
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*
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****************************************************************************/
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extern uint32_t *jump_table_base[];
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extern volatile sysclk_t g_system_clk;
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extern void *osal_memset(void *s, int c, size_t n);
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extern void *osal_memcpy(void *dest, const void *src, size_t n);
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void c_start(void)
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{
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const uint8_t *src;
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uint8_t *dest;
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uint8_t *edest;
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/* Configure the uart so that we can get debug output as soon as possible */
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/* set stack to main stack point */
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spif_config(SYS_CLK_DLL_64M, 1, 0x801003b, 0, 0);
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HAL_CRITICAL_SECTION_INIT();
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2022-01-27 14:55:47 +01:00
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/* g_system_clk = SYS_CLK_DLL_48M; */
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g_system_clk = SYS_CLK_DBL_32M;
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clk_init(SYS_CLK_DBL_32M);
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/* clk_init(SYS_CLK_XTAL_16M); */
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2021-10-29 10:39:12 +02:00
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#if 1
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/* stm32_clockconfig(); */
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2021-10-29 10:39:12 +02:00
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/* Clear .bss. We'll do this inline (vs. calling memset) just to be
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* certain that there are no issues with the state of global variables.
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*/
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2022-01-27 14:55:47 +01:00
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dest = (uint8_t *)&_sbss;
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edest = (uint8_t *)&_ebss;
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osal_memset(dest, 0, edest - dest);
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/* for (dest = &_sbss; dest < &_ebss; )
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* {
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* *dest++ = 0;
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* }
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*/
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/* showprogress('B'); */
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/* Move the initialized data section from his temporary holding spot in
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* FLASH into the correct place in SRAM. The correct place in SRAM is
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* give by _sdata and _edata. The temporary location is in FLASH at the
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* end of all of the other read-only data (.text, .rodata) at _eronly.
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*/
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src = (const uint8_t *)&_eronly;
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dest = (uint8_t *)&_sdata;
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edest = (uint8_t *)&_edata;
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osal_memcpy(dest, src, edest - dest);
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/* for (src = &_eronly, dest = &_sdata; dest < &_edata; )
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* {
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* *dest++ = *src++;
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* }
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*/
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/* showprogress('C'); */
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/* for (src = &_sramscttexts, dest = &_sramscttext; dest < &_eramscttext; )
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* {
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* *dest++ = *src++;
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* }
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*/
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2022-01-27 14:55:47 +01:00
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src = (const uint8_t *)&_sjtblss;
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dest = (uint8_t *)&_sjtbls;
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edest = (uint8_t *)&_ejtbls;
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osal_memcpy(dest, src, edest - dest);
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/* osal_memcpy(&_sjtbls, &_sjtblss, _ejtbls - _sjtbls);
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* for (src = &_sjtblss, dest = &_sjtbls; dest < &_ejtbls; )
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* {
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* *dest++ = *src++;
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* }
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*/
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/* showprogress('J'); */
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/* Perform early serial initialization */
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2022-01-27 14:55:47 +01:00
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/* hal_cache_init(); */
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{
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xflash_Ctx_t cfg =
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{
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.spif_ref_clk = SYS_CLK_DLL_64M,
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.rd_instr = XFRD_FCMD_READ_DUAL
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};
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hal_spif_cache_init(cfg);
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}
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/* hal_gpio_init(); */
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2021-10-29 10:39:12 +02:00
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LOG_INIT();
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showprogress('A');
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#ifdef USE_EARLYSERIALINIT
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arm_earlyserialinit();
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#endif
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showprogress('D');
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/* For the case of the separate user-/kernel-space build, perform whatever
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* platform specific initialization of the user memory is required.
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* Normally this just means initializing the user space .data and .bss
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* segments.
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*/
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#ifdef CONFIG_BUILD_PROTECTED
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/* stm32_userspace(); */
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2021-10-29 10:39:12 +02:00
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showprogress('E');
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#endif
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/* Initialize onboard resources */
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2021-10-29 13:27:53 +02:00
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/* stm32_boardinitialize(); */
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2021-10-29 10:39:12 +02:00
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showprogress('F');
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/* Then start NuttX */
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showprogress('\r');
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showprogress('\n');
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#endif
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#ifdef CONFIG_PHY6222_BLE
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phy62xx_ble_init();
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#endif
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jump_table_base[0] = 0;
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nx_start();
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/* Shouldn't get here */
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for (; ; );
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}
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