2013-04-16 16:48:42 +02:00
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/****************************************************************************
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* arch/mips/src/kl/kl_serial.c
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*
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* Copyright (C) 2013-2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <semaphore.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/serial/serial.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "up_internal.h"
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#include "os_internal.h"
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#include "kl_config.h"
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#include "kl_lowputc.h"
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#include "chip.h"
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2013-05-02 17:24:36 +02:00
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#include "kl_gpio.h"
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2013-04-16 16:48:42 +02:00
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#include "chip/kl_uart.h"
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2013-04-16 17:53:15 +02:00
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2013-04-16 16:48:42 +02:00
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Some sanity checks *******************************************************/
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/* Is there at least one UART enabled and configured as a RS-232 device? */
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#ifndef HAVE_UART_DEVICE
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# warning "No UARTs enabled"
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#endif
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/* If we are not using the serial driver for the console, then we still must
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* provide some minimal implementation of up_putc.
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*/
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#ifdef USE_SERIALDRIVER
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/* Which UART with be tty0/console and which tty1-4? The console will always
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* be ttyS0. If there is no console then will use the lowest numbered UART.
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*/
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/* First pick the console and ttys0. This could be any of UART0-5 */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart0port /* UART0 is console */
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# define TTYS0_DEV g_uart0port /* UART0 is ttyS0 */
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# define UART0_ASSIGNED 1
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart1port /* UART1 is console */
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# define TTYS0_DEV g_uart1port /* UART1 is ttyS0 */
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# define UART1_ASSIGNED 1
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart2port /* UART2 is console */
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# define TTYS0_DEV g_uart2port /* UART2 is ttyS0 */
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# define UART2_ASSIGNED 1
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#else
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# undef CONSOLE_DEV /* No console */
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# if defined(CONFIG_KL_UART0)
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# define TTYS0_DEV g_uart0port /* UART0 is ttyS0 */
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# define UART0_ASSIGNED 1
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# elif defined(CONFIG_KL_UART1)
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# define TTYS0_DEV g_uart1port /* UART1 is ttyS0 */
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# define UART1_ASSIGNED 1
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# elif defined(CONFIG_KL_UART2)
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# define TTYS0_DEV g_uart2port /* UART2 is ttyS0 */
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# define UART2_ASSIGNED 1
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# endif
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#endif
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/* Pick ttys1. This could be any of UART0-5 excluding the console UART. */
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#if defined(CONFIG_KL_UART0) && !defined(UART0_ASSIGNED)
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# define TTYS1_DEV g_uart0port /* UART0 is ttyS1 */
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# define UART0_ASSIGNED 1
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#elif defined(CONFIG_KL_UART1) && !defined(UART1_ASSIGNED)
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# define TTYS1_DEV g_uart1port /* UART1 is ttyS1 */
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# define UART1_ASSIGNED 1
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#elif defined(CONFIG_KL_UART2) && !defined(UART2_ASSIGNED)
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# define TTYS1_DEV g_uart2port /* UART2 is ttyS1 */
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# define UART2_ASSIGNED 1
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#endif
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/* Pick ttys2. This could be one of UART1-5. It can't be UART0 because that
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* was either assigned as ttyS0 or ttys1. One of UART 1-5 could also be the
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* console.
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*/
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#if defined(CONFIG_KL_UART1) && !defined(UART1_ASSIGNED)
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# define TTYS2_DEV g_uart1port /* UART1 is ttyS2 */
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# define UART1_ASSIGNED 1
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#elif defined(CONFIG_KL_UART2) && !defined(UART2_ASSIGNED)
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# define TTYS2_DEV g_uart2port /* UART2 is ttyS2 */
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# define UART2_ASSIGNED 1
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#endif
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/* Pick ttys3. This could be one of UART2-5. It can't be UART0-1 because
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* those have already been assigned to ttsyS0, 1, or 2. One of
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* UART 2-5 could also be the console.
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*/
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#if defined(CONFIG_KL_UART2) && !defined(UART2_ASSIGNED)
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# define TTYS3_DEV g_uart2port /* UART2 is ttyS3 */
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# define UART2_ASSIGNED 1
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct up_dev_s
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{
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uintptr_t uartbase; /* Base address of UART registers */
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uint32_t baud; /* Configured baud */
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uint32_t clock; /* Clocking frequency of the UART module */
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2013-04-25 18:23:47 +02:00
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uint8_t irq; /* IRQ associated with this UART (for enable) */
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2013-04-16 16:48:42 +02:00
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uint8_t ie; /* Interrupts enabled */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (8 or 9) */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int up_setup(struct uart_dev_s *dev);
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static void up_shutdown(struct uart_dev_s *dev);
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static int up_attach(struct uart_dev_s *dev);
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static void up_detach(struct uart_dev_s *dev);
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static int up_interrupts(int irq, void *context);
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static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
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static int up_receive(struct uart_dev_s *dev, uint32_t *status);
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static void up_rxint(struct uart_dev_s *dev, bool enable);
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static bool up_rxavailable(struct uart_dev_s *dev);
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static void up_send(struct uart_dev_s *dev, int ch);
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static void up_txint(struct uart_dev_s *dev, bool enable);
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static bool up_txready(struct uart_dev_s *dev);
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/****************************************************************************
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* Private Variables
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****************************************************************************/
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static const struct uart_ops_s g_uart_ops =
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{
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.setup = up_setup,
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.shutdown = up_shutdown,
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.attach = up_attach,
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.detach = up_detach,
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.ioctl = up_ioctl,
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.receive = up_receive,
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.rxint = up_rxint,
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.rxavailable = up_rxavailable,
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.send = up_send,
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.txint = up_txint,
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.txready = up_txready,
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.txempty = up_txready,
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};
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/* I/O buffers */
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#ifdef CONFIG_KL_UART0
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static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
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static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
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#endif
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#ifdef CONFIG_KL_UART1
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static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
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static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
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#endif
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#ifdef CONFIG_KL_UART2
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static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
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static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
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#endif
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/* This describes the state of the Kinetis UART0 port. */
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#ifdef CONFIG_KL_UART0
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static struct up_dev_s g_uart0priv =
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{
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.uartbase = KL_UART0_BASE,
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.clock = BOARD_CORECLK_FREQ,
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.baud = CONFIG_UART0_BAUD,
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2013-04-25 18:23:47 +02:00
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.irq = KL_IRQ_UART0,
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2013-04-16 16:48:42 +02:00
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.parity = CONFIG_UART0_PARITY,
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.bits = CONFIG_UART0_BITS,
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};
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static uart_dev_t g_uart0port =
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{
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.recv =
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{
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.size = CONFIG_UART0_RXBUFSIZE,
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.buffer = g_uart0rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART0_TXBUFSIZE,
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.buffer = g_uart0txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart0priv,
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};
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#endif
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/* This describes the state of the Kinetis UART1 port. */
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#ifdef CONFIG_KL_UART1
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static struct up_dev_s g_uart1priv =
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{
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.uartbase = KL_UART1_BASE,
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.clock = BOARD_BUSCLK_FREQ,
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2013-04-16 16:48:42 +02:00
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.baud = CONFIG_UART1_BAUD,
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2013-04-25 18:23:47 +02:00
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.irq = KL_IRQ_UART1,
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2013-04-16 16:48:42 +02:00
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.parity = CONFIG_UART1_PARITY,
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.bits = CONFIG_UART1_BITS,
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};
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static uart_dev_t g_uart1port =
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{
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.recv =
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{
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.size = CONFIG_UART1_RXBUFSIZE,
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.buffer = g_uart1rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART1_TXBUFSIZE,
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.buffer = g_uart1txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart1priv,
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};
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#endif
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/* This describes the state of the Kinetis UART2 port. */
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#ifdef CONFIG_KL_UART2
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static struct up_dev_s g_uart2priv =
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{
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.uartbase = KL_UART2_BASE,
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.clock = BOARD_BUSCLK_FREQ,
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2013-04-16 16:48:42 +02:00
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.baud = CONFIG_UART2_BAUD,
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2013-04-25 18:23:47 +02:00
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.irq = KL_IRQ_UART2,
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2013-04-16 16:48:42 +02:00
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.parity = CONFIG_UART2_PARITY,
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.bits = CONFIG_UART2_BITS,
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};
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static uart_dev_t g_uart2port =
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{
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.recv =
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{
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.size = CONFIG_UART2_RXBUFSIZE,
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.buffer = g_uart2rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART2_TXBUFSIZE,
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.buffer = g_uart2txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart2priv,
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_serialin
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****************************************************************************/
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static inline uint8_t up_serialin(struct up_dev_s *priv, int offset)
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{
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return getreg8(priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_serialout
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****************************************************************************/
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static inline void up_serialout(struct up_dev_s *priv, int offset, uint8_t value)
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{
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putreg8(value, priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_setuartint
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****************************************************************************/
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static void up_setuartint(struct up_dev_s *priv)
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{
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irqstate_t flags;
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uint8_t regval;
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/* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
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flags = irqsave();
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regval = up_serialin(priv, KL_UART_C2_OFFSET);
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regval &= ~UART_C2_ALLINTS;
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regval |= priv->ie;
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up_serialout(priv, KL_UART_C2_OFFSET, regval);
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irqrestore(flags);
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}
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/****************************************************************************
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* Name: up_restoreuartint
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****************************************************************************/
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static void up_restoreuartint(struct up_dev_s *priv, uint8_t ie)
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{
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irqstate_t flags;
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|
|
/* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
|
|
|
|
|
|
|
|
flags = irqsave();
|
|
|
|
priv->ie = ie & UART_C2_ALLINTS;
|
|
|
|
up_setuartint(priv);
|
|
|
|
irqrestore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_disableuartint
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void up_disableuartint(struct up_dev_s *priv, uint8_t *ie)
|
|
|
|
{
|
|
|
|
irqstate_t flags;
|
|
|
|
|
|
|
|
flags = irqsave();
|
|
|
|
if (ie)
|
|
|
|
{
|
|
|
|
*ie = priv->ie;
|
|
|
|
}
|
|
|
|
|
|
|
|
up_restoreuartint(priv, 0);
|
|
|
|
irqrestore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_setup
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Configure the UART baud, bits, parity, etc. This method is called the
|
|
|
|
* first time that the serial port is opened.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int up_setup(struct uart_dev_s *dev)
|
|
|
|
{
|
|
|
|
#ifndef CONFIG_SUPPRESS_UART_CONFIG
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
|
|
|
|
/* Configure the UART as an RS-232 UART */
|
|
|
|
|
|
|
|
kl_uartconfigure(priv->uartbase, priv->baud, priv->clock,
|
|
|
|
priv->parity, priv->bits);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Make sure that all interrupts are disabled */
|
|
|
|
|
|
|
|
up_restoreuartint(priv, 0);
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_shutdown
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Disable the UART. This method is called when the serial
|
|
|
|
* port is closed
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void up_shutdown(struct uart_dev_s *dev)
|
|
|
|
{
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
|
|
|
|
/* Disable interrupts */
|
|
|
|
|
|
|
|
up_restoreuartint(priv, 0);
|
|
|
|
|
|
|
|
/* Reset hardware and disable Rx and Tx */
|
|
|
|
|
|
|
|
kl_uartreset(priv->uartbase);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_attach
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Configure the UART to operation in interrupt driven mode. This method is
|
|
|
|
* called when the serial port is opened. Normally, this is just after the
|
|
|
|
* the setup() method is called, however, the serial console may operate in
|
|
|
|
* a non-interrupt driven mode during the boot phase.
|
|
|
|
*
|
|
|
|
* RX and TX interrupts are not enabled when by the attach method (unless the
|
|
|
|
* hardware supports multiple levels of interrupt enabling). The RX and TX
|
|
|
|
* interrupts are not enabled until the txint() and rxint() methods are called.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int up_attach(struct uart_dev_s *dev)
|
|
|
|
{
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Attach and enable the IRQ(s). The interrupts are (probably) still
|
|
|
|
* disabled in the C2 register.
|
|
|
|
*/
|
|
|
|
|
2013-04-25 18:23:47 +02:00
|
|
|
ret = irq_attach(priv->irq, up_interrupts);
|
2013-04-16 16:48:42 +02:00
|
|
|
if (ret == OK)
|
|
|
|
{
|
2013-04-25 18:23:47 +02:00
|
|
|
up_enable_irq(priv->irq);
|
2013-04-16 16:48:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_detach
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Detach UART interrupts. This method is called when the serial port is
|
|
|
|
* closed normally just before the shutdown method is called. The exception
|
|
|
|
* is the serial console which is never shutdown.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void up_detach(struct uart_dev_s *dev)
|
|
|
|
{
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
2013-04-25 02:29:26 +02:00
|
|
|
|
2013-04-16 16:48:42 +02:00
|
|
|
/* Disable interrupts */
|
|
|
|
|
|
|
|
up_restoreuartint(priv, 0);
|
2013-04-25 18:23:47 +02:00
|
|
|
up_disable_irq(priv->irq);
|
2013-04-16 16:48:42 +02:00
|
|
|
|
|
|
|
/* Detach from the interrupt(s) */
|
|
|
|
|
2013-04-25 18:23:47 +02:00
|
|
|
irq_detach(priv->irq);
|
2013-04-16 16:48:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_interrupts
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This is the UART status interrupt handler. It will be invoked when an
|
|
|
|
* interrupt received on the 'irq' It should call uart_transmitchars or
|
|
|
|
* uart_receivechar to perform the appropriate data transfers. The
|
|
|
|
* interrupt handling logic must be able to map the 'irq' number into the
|
|
|
|
* approprite uart_dev_s structure in order to call these functions.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int up_interrupts(int irq, void *context)
|
|
|
|
{
|
|
|
|
struct uart_dev_s *dev = NULL;
|
|
|
|
struct up_dev_s *priv;
|
|
|
|
int passes;
|
|
|
|
uint8_t s1;
|
|
|
|
bool handled;
|
|
|
|
|
|
|
|
#ifdef CONFIG_KL_UART0
|
2013-04-25 18:23:47 +02:00
|
|
|
if (g_uart0priv.irq == irq)
|
2013-04-16 16:48:42 +02:00
|
|
|
{
|
|
|
|
dev = &g_uart0port;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_KL_UART1
|
2013-04-25 18:23:47 +02:00
|
|
|
if (g_uart1priv.irq == irq)
|
2013-04-16 16:48:42 +02:00
|
|
|
{
|
|
|
|
dev = &g_uart1port;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_KL_UART2
|
2013-04-25 18:23:47 +02:00
|
|
|
if (g_uart2priv.irq == irq)
|
2013-04-16 16:48:42 +02:00
|
|
|
{
|
|
|
|
dev = &g_uart2port;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
{
|
2013-04-25 23:19:59 +02:00
|
|
|
PANIC();
|
2013-04-16 16:48:42 +02:00
|
|
|
}
|
|
|
|
priv = (struct up_dev_s*)dev->priv;
|
|
|
|
DEBUGASSERT(priv);
|
|
|
|
|
|
|
|
/* Loop until there are no characters to be transferred or,
|
|
|
|
* until we have been looping for a long time.
|
|
|
|
*/
|
|
|
|
|
|
|
|
handled = true;
|
|
|
|
for (passes = 0; passes < 256 && handled; passes++)
|
|
|
|
{
|
|
|
|
handled = false;
|
|
|
|
|
|
|
|
/* Read status register 1 */
|
|
|
|
|
|
|
|
s1 = up_serialin(priv, KL_UART_S1_OFFSET);
|
|
|
|
|
|
|
|
/* Check if the receive data register is full (RDRF). NOTE: If
|
|
|
|
* FIFOS are enabled, this does not mean that the the FIFO is full,
|
|
|
|
* rather, it means that the the number of bytes in the RX FIFO has
|
|
|
|
* exceeded the watermark setting. There may actually be RX data
|
|
|
|
* available!
|
|
|
|
*
|
|
|
|
* The RDRF status indication is cleared when the data is read from
|
|
|
|
* the RX data register.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if ((s1 & UART_S1_RDRF) != 0)
|
|
|
|
{
|
|
|
|
/* Process incoming bytes */
|
|
|
|
|
|
|
|
uart_recvchars(dev);
|
|
|
|
handled = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Handle outgoing, transmit bytes */
|
|
|
|
|
|
|
|
/* Check if the transmit data register is "empty." NOTE: If FIFOS
|
|
|
|
* are enabled, this does not mean that the the FIFO is empty, rather,
|
|
|
|
* it means that the the number of bytes in the TX FIFO is below the
|
|
|
|
* watermark setting. There could actually be space for additional TX
|
|
|
|
* data.
|
|
|
|
*
|
|
|
|
* The TDRE status indication is cleared when the data is written to
|
|
|
|
* the TX data register.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if ((s1 & UART_S1_TDRE) != 0)
|
|
|
|
{
|
|
|
|
/* Process outgoing bytes */
|
|
|
|
|
|
|
|
uart_xmitchars(dev);
|
|
|
|
handled = true;
|
|
|
|
}
|
2013-04-25 18:23:47 +02:00
|
|
|
|
|
|
|
/* Handle error interrupts. This interrupt may be caused by:
|
|
|
|
*
|
|
|
|
* FE: Framing error. To clear FE, write a logic one to the FE flag.
|
|
|
|
* NF: Noise flag. To clear NF, write logic one to the NF.
|
|
|
|
* PF: Parity error flag. To clear PF, write a logic one to the PF.
|
|
|
|
* OR: Receiver Overrun Flag. To clear OR, write a logic 1 to the OR flag.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if ((s1 & UART_S1_ERRORS) != 0)
|
|
|
|
{
|
|
|
|
up_serialout(priv, KL_UART_S1_OFFSET, (s1 & UART_S1_ERRORS));
|
|
|
|
}
|
2013-04-16 16:48:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_ioctl
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* All ioctl calls will be routed through this method
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|
|
|
{
|
|
|
|
#if 0 /* Reserved for future growth */
|
|
|
|
struct inode *inode;
|
|
|
|
struct uart_dev_s *dev;
|
|
|
|
struct up_dev_s *priv;
|
|
|
|
int ret = OK;
|
|
|
|
|
|
|
|
DEBUGASSERT(filep, filep->f_inode);
|
|
|
|
inode = filep->f_inode;
|
|
|
|
dev = inode->i_private;
|
|
|
|
|
|
|
|
DEBUGASSERT(dev, dev->priv)
|
|
|
|
priv = (struct up_dev_s*)dev->priv;
|
|
|
|
|
|
|
|
switch (cmd)
|
|
|
|
{
|
|
|
|
case xxx: /* Add commands here */
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
ret = -ENOTTY;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
#else
|
|
|
|
return -ENOTTY;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_receive
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Called (usually) from the interrupt level to receive one
|
|
|
|
* character from the UART. Error bits associated with the
|
|
|
|
* receipt are provided in the return 'status'.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
|
|
|
|
{
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
uint8_t s1;
|
|
|
|
|
|
|
|
/* Get error status information:
|
|
|
|
*
|
|
|
|
* FE: Framing error. To clear FE, read S1 with FE set and then read
|
|
|
|
* read UART data register (D).
|
|
|
|
* NF: Noise flag. To clear NF, read S1 and then read the UART data
|
|
|
|
* register (D).
|
|
|
|
* PF: Parity error flag. To clear PF, read S1 and then read the UART
|
|
|
|
* data register (D).
|
|
|
|
*/
|
|
|
|
|
|
|
|
s1 = up_serialin(priv, KL_UART_S1_OFFSET);
|
|
|
|
|
|
|
|
/* Return status information */
|
|
|
|
|
|
|
|
if (status)
|
|
|
|
{
|
|
|
|
*status = (uint32_t)s1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Then return the actual received byte. Reading S1 then D clears all
|
|
|
|
* RX errors.
|
|
|
|
*/
|
|
|
|
|
|
|
|
return (int)up_serialin(priv, KL_UART_D_OFFSET);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_rxint
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Call to enable or disable RX interrupts
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void up_rxint(struct uart_dev_s *dev, bool enable)
|
|
|
|
{
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
irqstate_t flags;
|
|
|
|
|
|
|
|
flags = irqsave();
|
|
|
|
if (enable)
|
|
|
|
{
|
|
|
|
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
|
|
|
|
* timeout occurs).
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
|
|
priv->ie |= UART_C2_RIE;
|
|
|
|
up_setuartint(priv);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
priv->ie |= UART_C2_RIE;
|
|
|
|
up_setuartint(priv);
|
|
|
|
}
|
|
|
|
|
|
|
|
irqrestore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_rxavailable
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Return true if the receive register is not empty
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static bool up_rxavailable(struct uart_dev_s *dev)
|
|
|
|
{
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
|
|
|
|
/* Return true if the receive data register is full (RDRF). NOTE: If
|
|
|
|
* FIFOS are enabled, this does not mean that the the FIFO is full,
|
|
|
|
* rather, it means that the the number of bytes in the RX FIFO has
|
|
|
|
* exceeded the watermark setting. There may actually be RX data
|
|
|
|
* available!
|
|
|
|
*/
|
|
|
|
|
|
|
|
return (up_serialin(priv, KL_UART_S1_OFFSET) & UART_S1_RDRF) != 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_send
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This method will send one byte on the UART.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void up_send(struct uart_dev_s *dev, int ch)
|
|
|
|
{
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
up_serialout(priv, KL_UART_D_OFFSET, (uint8_t)ch);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_txint
|
|
|
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*
|
|
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|
* Description:
|
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|
* Call to enable or disable TX interrupts
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
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|
static void up_txint(struct uart_dev_s *dev, bool enable)
|
|
|
|
{
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|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
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|
|
irqstate_t flags;
|
|
|
|
|
|
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|
flags = irqsave();
|
|
|
|
if (enable)
|
|
|
|
{
|
|
|
|
/* Enable the TX interrupt */
|
|
|
|
|
|
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
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|
priv->ie |= UART_C2_TIE;
|
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|
|
up_setuartint(priv);
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|
|
|
|
|
|
|
/* Fake a TX interrupt here by just calling uart_xmitchars() with
|
|
|
|
* interrupts disabled (note this may recurse).
|
|
|
|
*/
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|
|
|
|
|
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|
uart_xmitchars(dev);
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|
|
|
#endif
|
|
|
|
}
|
|
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|
else
|
|
|
|
{
|
|
|
|
/* Disable the TX interrupt */
|
|
|
|
|
|
|
|
priv->ie &= ~UART_C2_TIE;
|
|
|
|
up_setuartint(priv);
|
|
|
|
}
|
|
|
|
|
|
|
|
irqrestore(flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_txready
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Return true if the tranmsit data register is empty
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static bool up_txready(struct uart_dev_s *dev)
|
|
|
|
{
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
|
|
|
|
|
|
|
/* Return true if the transmit data register is "empty." NOTE: If
|
|
|
|
* FIFOS are enabled, this does not mean that the the FIFO is empty,
|
|
|
|
* rather, it means that the the number of bytes in the TX FIFO is
|
|
|
|
* below the watermark setting. There may actually be space for
|
|
|
|
* additional TX data.
|
|
|
|
*/
|
|
|
|
|
|
|
|
return (up_serialin(priv, KL_UART_S1_OFFSET) & UART_S1_TDRE) != 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Public Functions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_earlyserialinit
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Performs the low level UART initialization early in debug so that the
|
|
|
|
* serial console will be available during bootup. This must be called
|
|
|
|
* before up_serialinit. NOTE: This function depends on GPIO pin
|
|
|
|
* configuration performed in up_consoleinit() and main clock iniialization
|
|
|
|
* performed in up_clkinitialize().
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void up_earlyserialinit(void)
|
|
|
|
{
|
|
|
|
/* Disable interrupts from all UARTS. The console is enabled in
|
|
|
|
* pic32mx_consoleinit()
|
|
|
|
*/
|
|
|
|
|
|
|
|
up_restoreuartint(TTYS0_DEV.priv, 0);
|
|
|
|
#ifdef TTYS1_DEV
|
|
|
|
up_restoreuartint(TTYS1_DEV.priv, 0);
|
|
|
|
#endif
|
|
|
|
#ifdef TTYS2_DEV
|
|
|
|
up_restoreuartint(TTYS2_DEV.priv, 0);
|
|
|
|
#endif
|
|
|
|
#ifdef TTYS3_DEV
|
|
|
|
up_restoreuartint(TTYS3_DEV.priv, 0);
|
|
|
|
#endif
|
|
|
|
#ifdef TTYS4_DEV
|
|
|
|
up_restoreuartint(TTYS4_DEV.priv, 0);
|
|
|
|
#endif
|
|
|
|
#ifdef TTYS5_DEV
|
|
|
|
up_restoreuartint(TTYS5_DEV.priv, 0);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Configuration whichever one is the console */
|
|
|
|
|
|
|
|
#ifdef HAVE_SERIAL_CONSOLE
|
|
|
|
CONSOLE_DEV.isconsole = true;
|
|
|
|
up_setup(&CONSOLE_DEV);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_serialinit
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Register serial console and serial ports. This assumes
|
|
|
|
* that up_earlyserialinit was called previously.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void up_serialinit(void)
|
|
|
|
{
|
|
|
|
/* Register the console */
|
|
|
|
|
|
|
|
#ifdef HAVE_SERIAL_CONSOLE
|
|
|
|
(void)uart_register("/dev/console", &CONSOLE_DEV);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Register all UARTs */
|
|
|
|
|
|
|
|
(void)uart_register("/dev/ttyS0", &TTYS0_DEV);
|
|
|
|
#ifdef TTYS1_DEV
|
|
|
|
(void)uart_register("/dev/ttyS1", &TTYS1_DEV);
|
|
|
|
#endif
|
|
|
|
#ifdef TTYS2_DEV
|
|
|
|
(void)uart_register("/dev/ttyS2", &TTYS2_DEV);
|
|
|
|
#endif
|
|
|
|
#ifdef TTYS3_DEV
|
|
|
|
(void)uart_register("/dev/ttyS3", &TTYS3_DEV);
|
|
|
|
#endif
|
|
|
|
#ifdef TTYS4_DEV
|
|
|
|
(void)uart_register("/dev/ttyS4", &TTYS4_DEV);
|
|
|
|
#endif
|
|
|
|
#ifdef TTYS5_DEV
|
|
|
|
(void)uart_register("/dev/ttyS5", &TTYS5_DEV);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_putc
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Provide priority, low-level access to support OS debug writes
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
int up_putc(int ch)
|
|
|
|
{
|
|
|
|
#ifdef HAVE_SERIAL_CONSOLE
|
|
|
|
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
|
|
|
|
uint8_t ie;
|
|
|
|
|
|
|
|
up_disableuartint(priv, &ie);
|
|
|
|
|
|
|
|
/* Check for LF */
|
|
|
|
|
|
|
|
if (ch == '\n')
|
|
|
|
{
|
|
|
|
/* Add CR */
|
|
|
|
|
|
|
|
kl_lowputc('\r');
|
|
|
|
}
|
|
|
|
|
|
|
|
kl_lowputc(ch);
|
|
|
|
up_restoreuartint(priv, ie);
|
|
|
|
#endif
|
|
|
|
return ch;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else /* USE_SERIALDRIVER */
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: up_putc
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Provide priority, low-level access to support OS debug writes
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
int up_putc(int ch)
|
|
|
|
{
|
|
|
|
#ifdef HAVE_SERIAL_CONSOLE
|
|
|
|
/* Check for LF */
|
|
|
|
|
|
|
|
if (ch == '\n')
|
|
|
|
{
|
|
|
|
/* Add CR */
|
|
|
|
|
|
|
|
kl_lowputc('\r');
|
|
|
|
}
|
|
|
|
|
|
|
|
kl_lowputc(ch);
|
|
|
|
#endif
|
|
|
|
return ch;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* USE_SERIALDRIVER */
|
|
|
|
|