2019-07-12 13:29:22 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* arch/arm/src/cxd56xx/cxd56_uart0.c
|
|
|
|
*
|
|
|
|
* Copyright 2018 Sony Semiconductor Solutions Corporation
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
*
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in
|
|
|
|
* the documentation and/or other materials provided with the
|
|
|
|
* distribution.
|
|
|
|
* 3. Neither the name of Sony Semiconductor Solutions Corporation nor
|
|
|
|
* the names of its contributors may be used to endorse or promote
|
|
|
|
* products derived from this software without specific prior written
|
|
|
|
* permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
|
|
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
|
|
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
|
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
|
|
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
|
|
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
|
|
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Included Files
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#include <nuttx/config.h>
|
|
|
|
|
|
|
|
#include <nuttx/kmalloc.h>
|
|
|
|
#include <nuttx/fs/fs.h>
|
|
|
|
#include <nuttx/irq.h>
|
2020-02-01 08:17:32 +01:00
|
|
|
#include <nuttx/semaphore.h>
|
|
|
|
|
2019-07-12 13:29:22 +02:00
|
|
|
#include <queue.h>
|
|
|
|
#include <stdio.h>
|
|
|
|
#include <stdint.h>
|
|
|
|
#include <string.h>
|
2020-07-27 07:09:21 +02:00
|
|
|
#include <fcntl.h>
|
2019-07-12 13:29:22 +02:00
|
|
|
#include <debug.h>
|
|
|
|
#include <errno.h>
|
|
|
|
|
2020-05-01 03:20:29 +02:00
|
|
|
#include "arm_arch.h"
|
2019-07-12 13:29:22 +02:00
|
|
|
#include "chip.h"
|
|
|
|
#include "cxd56_pinconfig.h"
|
|
|
|
|
|
|
|
#ifdef CONFIG_CXD56_UART0
|
|
|
|
|
|
|
|
#include <arch/chip/uart0.h>
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Pre-processor Definitions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifndef CONFIG_CXD56_UART0_BAUD
|
|
|
|
# define CONFIG_CXD56_UART0_BAUD 921600
|
|
|
|
#endif
|
|
|
|
#ifndef CONFIG_CXD56_UART0_BITS
|
|
|
|
# define CONFIG_CXD56_UART0_BITS 8
|
|
|
|
#endif
|
|
|
|
#ifndef CONFIG_CXD56_UART0_PARITY
|
|
|
|
# define CONFIG_CXD56_UART0_PARITY 0
|
|
|
|
#endif
|
|
|
|
#ifndef CONFIG_CXD56_UART0_2STOP
|
|
|
|
# define CONFIG_CXD56_UART0_2STOP 0
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Private Function Prototypes
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int uart0_open(FAR struct file *filep);
|
|
|
|
static int uart0_close(FAR struct file *filep);
|
|
|
|
static ssize_t uart0_read(FAR struct file *filep,
|
|
|
|
FAR char *buffer, size_t len);
|
|
|
|
static ssize_t uart0_write(FAR struct file *filep,
|
|
|
|
FAR const char *buffer, size_t len);
|
|
|
|
static int uart0_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
|
|
|
|
static int uart0_semtake(sem_t *id);
|
|
|
|
static void uart0_semgive(sem_t *id);
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* FarAPI prototypes
|
|
|
|
****************************************************************************/
|
|
|
|
|
2020-07-27 07:09:21 +02:00
|
|
|
int fw_pd_uartinit(int ch);
|
|
|
|
int fw_pd_uartuninit(int ch);
|
|
|
|
int fw_pd_uartconfiguration(int ch, int baudrate, int databits,
|
2019-07-12 13:29:22 +02:00
|
|
|
int parity, int stopbit, int flowctrl);
|
2020-07-27 07:09:21 +02:00
|
|
|
int fw_pd_uartenable(int ch);
|
|
|
|
int fw_pd_uartdisable(int ch);
|
|
|
|
int fw_pd_uartreceive(int ch, void *buf, int size, int leave);
|
|
|
|
int fw_pd_uartsend(int ch, void *buf, int size, int leave);
|
2019-07-12 13:29:22 +02:00
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Private Data
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static const struct file_operations g_uart0fops =
|
|
|
|
{
|
|
|
|
.open = uart0_open,
|
|
|
|
.close = uart0_close,
|
|
|
|
.read = uart0_read,
|
|
|
|
.write = uart0_write,
|
|
|
|
.seek = 0,
|
|
|
|
.ioctl = uart0_ioctl,
|
|
|
|
};
|
|
|
|
|
|
|
|
static sem_t g_lock;
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Private Functions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: uart0_semtake
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int uart0_semtake(sem_t *id)
|
|
|
|
{
|
2020-01-02 17:49:34 +01:00
|
|
|
return nxsem_wait_uninterruptible(id);
|
2019-07-12 13:29:22 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: uart0_semgive
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static void uart0_semgive(sem_t *id)
|
|
|
|
{
|
2020-01-02 17:49:34 +01:00
|
|
|
nxsem_post(id);
|
2019-07-12 13:29:22 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: uart0_open
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int uart0_open(FAR struct file *filep)
|
|
|
|
{
|
|
|
|
FAR struct inode *inode = filep->f_inode;
|
|
|
|
int flowctl;
|
|
|
|
int bits;
|
|
|
|
int stop;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (inode->i_crefs > 1)
|
|
|
|
{
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2020-07-27 07:09:21 +02:00
|
|
|
ret = fw_pd_uartinit(0);
|
2019-07-12 13:29:22 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
set_errno(EFAULT);
|
|
|
|
return ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* 0 = 5bit, 1 = 6bit, 2 = 7bit, 3 = 8bit */
|
|
|
|
|
|
|
|
bits = CONFIG_CXD56_UART0_BITS - 5;
|
|
|
|
|
|
|
|
/* 1 = 1 stop, 2 = 2 stop bit */
|
|
|
|
|
|
|
|
stop = CONFIG_CXD56_UART0_2STOP + 1;
|
|
|
|
|
|
|
|
/* Enable UART0 pin configuration */
|
|
|
|
|
2020-07-27 07:09:21 +02:00
|
|
|
#ifdef CONFIG_CXD56_UART0_FLOWCONTROL
|
2019-07-12 13:29:22 +02:00
|
|
|
flowctl = 1;
|
|
|
|
CXD56_PIN_CONFIGS(PINCONFS_SPI2_UART0);
|
|
|
|
#else
|
|
|
|
flowctl = 0;
|
|
|
|
CXD56_PIN_CONFIGS(PINCONFS_SPI2A_UART0);
|
|
|
|
#endif
|
|
|
|
|
2020-07-27 07:09:21 +02:00
|
|
|
ret = fw_pd_uartconfiguration(0, CONFIG_CXD56_UART0_BAUD,
|
2019-07-12 13:29:22 +02:00
|
|
|
bits,
|
|
|
|
CONFIG_CXD56_UART0_PARITY,
|
|
|
|
stop, flowctl);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
2020-07-27 07:09:21 +02:00
|
|
|
fw_pd_uartuninit(0);
|
2019-07-12 13:29:22 +02:00
|
|
|
set_errno(EINVAL);
|
|
|
|
return ERROR;
|
|
|
|
}
|
|
|
|
|
2020-07-27 07:09:21 +02:00
|
|
|
ret = fw_pd_uartenable(0);
|
2019-07-12 13:29:22 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2020-07-27 07:09:21 +02:00
|
|
|
fw_pd_uartuninit(0);
|
2019-07-12 13:29:22 +02:00
|
|
|
set_errno(EFAULT);
|
|
|
|
return ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: uart0_close
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int uart0_close(FAR struct file *filep)
|
|
|
|
{
|
|
|
|
FAR struct inode *inode = filep->f_inode;
|
|
|
|
|
|
|
|
if (inode->i_crefs == 1)
|
|
|
|
{
|
2020-07-27 07:09:21 +02:00
|
|
|
fw_pd_uartdisable(0);
|
|
|
|
fw_pd_uartuninit(0);
|
2019-07-12 13:29:22 +02:00
|
|
|
|
|
|
|
/* Disable UART0 pin by changing Hi-Z GPIO */
|
|
|
|
|
2020-07-27 07:09:21 +02:00
|
|
|
#ifdef CONFIG_CXD56_UART0_FLOWCONTROL
|
2019-07-12 13:29:22 +02:00
|
|
|
CXD56_PIN_CONFIGS(PINCONFS_SPI2_GPIO);
|
|
|
|
#else
|
|
|
|
CXD56_PIN_CONFIGS(PINCONFS_SPI2A_GPIO);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: uart0_read
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static ssize_t uart0_read(FAR struct file *filep,
|
|
|
|
FAR char *buffer, size_t len)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
uart0_semtake(&g_lock);
|
|
|
|
|
2020-07-27 07:09:21 +02:00
|
|
|
ret = fw_pd_uartreceive(0, buffer, len,
|
|
|
|
((filep->f_oflags & O_NONBLOCK) != 0));
|
2019-07-12 13:29:22 +02:00
|
|
|
|
|
|
|
uart0_semgive(&g_lock);
|
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
set_errno(-ret);
|
|
|
|
ret = 0; /* Receive no data */
|
|
|
|
}
|
|
|
|
|
|
|
|
return (ssize_t)ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: uart0_write
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static ssize_t uart0_write(FAR struct file *filep,
|
|
|
|
FAR const char *buffer, size_t len)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
uart0_semtake(&g_lock);
|
|
|
|
|
2020-07-27 07:09:21 +02:00
|
|
|
ret = fw_pd_uartsend(0, (FAR void *)buffer, len,
|
|
|
|
((filep->f_oflags & O_NONBLOCK) != 0));
|
2019-07-12 13:29:22 +02:00
|
|
|
|
|
|
|
uart0_semgive(&g_lock);
|
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
set_errno(-ret);
|
|
|
|
ret = 0;
|
|
|
|
}
|
2020-04-07 13:52:12 +02:00
|
|
|
|
2019-07-12 13:29:22 +02:00
|
|
|
return (ssize_t)ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: uart0_ioctl
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int uart0_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
|
|
|
{
|
|
|
|
return -ENOTTY;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: cxd56_uart0initialize
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
int cxd56_uart0initialize(FAR const char *devname)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
nxsem_init(&g_lock, 0, 1);
|
2019-07-12 13:29:22 +02:00
|
|
|
|
|
|
|
ret = register_driver(devname, &g_uart0fops, 0666, NULL);
|
|
|
|
if (ret != 0)
|
|
|
|
{
|
|
|
|
return ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: cxd56_uart0uninitialize
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
void cxd56_uart0uninitialize(FAR const char *devname)
|
|
|
|
{
|
|
|
|
unregister_driver(devname);
|
2020-01-02 17:49:34 +01:00
|
|
|
nxsem_destroy(&g_lock);
|
2019-07-12 13:29:22 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CONFIG_CXD56_UART0 */
|