2012-01-11 14:01:26 +01:00
|
|
|
/************************************************************************************
|
|
|
|
* configs/stm32f4discovery/include/board.h
|
|
|
|
* include/arch/board/board.h
|
|
|
|
*
|
2012-02-25 01:19:13 +01:00
|
|
|
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
|
2012-01-11 14:01:26 +01:00
|
|
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
*
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in
|
|
|
|
* the documentation and/or other materials provided with the
|
|
|
|
* distribution.
|
|
|
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
|
|
|
* used to endorse or promote products derived from this software
|
|
|
|
* without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
|
|
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
|
|
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
|
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
|
|
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
|
|
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
|
|
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
2012-08-29 19:41:43 +02:00
|
|
|
#ifndef __CONFIG_STM32F4DISCOVERY_INCLUDE_BOARD_H
|
|
|
|
#define __CONFIG_STM32F4DISCOVERY_INCLUDE_BOARD_H
|
2012-01-11 14:01:26 +01:00
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Included Files
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#include <nuttx/config.h>
|
2012-08-29 19:41:43 +02:00
|
|
|
|
2012-01-11 14:01:26 +01:00
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
# include <stdint.h>
|
|
|
|
#endif
|
2012-08-29 19:41:43 +02:00
|
|
|
|
2012-01-11 14:01:26 +01:00
|
|
|
#include "stm32_rcc.h"
|
|
|
|
#include "stm32_sdio.h"
|
2013-02-09 16:03:49 +01:00
|
|
|
#include "stm32.h"
|
2012-01-11 14:01:26 +01:00
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Definitions
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
/* Clocking *************************************************************************/
|
|
|
|
/* The STM32F4 Discovery board features a single 8MHz crystal. Space is provided
|
|
|
|
* for a 32kHz RTC backup crystal, but it is not stuffed.
|
|
|
|
*
|
|
|
|
* This is the canonical configuration:
|
|
|
|
* System Clock source : PLL (HSE)
|
|
|
|
* SYSCLK(Hz) : 168000000 Determined by PLL configuration
|
|
|
|
* HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
|
|
|
|
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
|
|
|
|
* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
|
|
|
|
* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
|
2012-11-01 16:31:10 +01:00
|
|
|
* HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL)
|
2012-01-11 14:01:26 +01:00
|
|
|
* PLLM : 8 (STM32_PLLCFG_PLLM)
|
|
|
|
* PLLN : 336 (STM32_PLLCFG_PLLN)
|
|
|
|
* PLLP : 2 (STM32_PLLCFG_PLLP)
|
2012-08-15 19:58:54 +02:00
|
|
|
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
|
2012-01-11 14:01:26 +01:00
|
|
|
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
|
|
|
|
* Flash Latency(WS) : 5
|
|
|
|
* Prefetch Buffer : OFF
|
|
|
|
* Instruction cache : ON
|
|
|
|
* Data cache : ON
|
|
|
|
* Require 48MHz for USB OTG FS, : Enabled
|
|
|
|
* SDIO and RNG clock
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* HSI - 16 MHz RC factory-trimmed
|
|
|
|
* LSI - 32 KHz RC
|
2012-11-01 16:31:10 +01:00
|
|
|
* HSE - On-board crystal frequency is 8MHz
|
2012-01-11 14:01:26 +01:00
|
|
|
* LSE - 32.768 kHz
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define STM32_BOARD_XTAL 8000000ul
|
|
|
|
|
|
|
|
#define STM32_HSI_FREQUENCY 16000000ul
|
|
|
|
#define STM32_LSI_FREQUENCY 32000
|
|
|
|
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
|
|
|
|
#define STM32_LSE_FREQUENCY 32768
|
|
|
|
|
|
|
|
/* Main PLL Configuration.
|
|
|
|
*
|
|
|
|
* PLL source is HSE
|
|
|
|
* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
|
2012-11-01 16:31:10 +01:00
|
|
|
* = (8,000,000 / 8) * 336
|
2012-01-11 14:01:26 +01:00
|
|
|
* = 336,000,000
|
|
|
|
* SYSCLK = PLL_VCO / PLLP
|
|
|
|
* = 336,000,000 / 2 = 168,000,000
|
|
|
|
* USB OTG FS, SDIO and RNG Clock
|
|
|
|
* = PLL_VCO / PLLQ
|
|
|
|
* = 48,000,000
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
|
|
|
|
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
|
|
|
|
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
|
2012-08-15 19:58:54 +02:00
|
|
|
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
|
2012-01-11 14:01:26 +01:00
|
|
|
|
|
|
|
#define STM32_SYSCLK_FREQUENCY 168000000ul
|
|
|
|
|
|
|
|
/* AHB clock (HCLK) is SYSCLK (168MHz) */
|
|
|
|
|
|
|
|
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
|
|
|
|
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
|
|
|
|
#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
|
|
|
|
|
|
|
|
/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */
|
|
|
|
|
|
|
|
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
|
|
|
|
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
|
|
|
|
|
|
|
|
/* Timers driven from APB1 will be twice PCLK1 */
|
|
|
|
|
|
|
|
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
|
|
|
|
/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
|
|
|
|
|
|
|
|
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
|
|
|
|
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
|
|
|
|
|
|
|
|
/* Timers driven from APB2 will be twice PCLK2 */
|
|
|
|
|
|
|
|
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
2012-01-16 18:20:09 +01:00
|
|
|
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
|
|
|
#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
|
|
|
#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
|
|
|
#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
|
2012-01-11 14:01:26 +01:00
|
|
|
|
|
|
|
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
|
2014-04-14 00:22:22 +02:00
|
|
|
* otherwise frequency is 2xAPBx.
|
2012-01-11 14:01:26 +01:00
|
|
|
* Note: TIM1,8 are on APB2, others on APB1
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY
|
2012-11-01 16:31:10 +01:00
|
|
|
#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2)
|
2012-01-11 14:01:26 +01:00
|
|
|
|
|
|
|
/* LED definitions ******************************************************************/
|
|
|
|
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
|
|
|
|
* way. The following definitions are used to access individual LEDs.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* LED index values for use with stm32_setled() */
|
|
|
|
|
|
|
|
#define BOARD_LED1 0
|
|
|
|
#define BOARD_LED2 1
|
|
|
|
#define BOARD_LED3 2
|
|
|
|
#define BOARD_LED4 3
|
|
|
|
#define BOARD_NLEDS 4
|
|
|
|
|
|
|
|
#define BOARD_LED_GREEN BOARD_LED1
|
|
|
|
#define BOARD_LED_ORANGE BOARD_LED2
|
|
|
|
#define BOARD_LED_RED BOARD_LED3
|
|
|
|
#define BOARD_LED_BLUE BOARD_LED4
|
|
|
|
|
|
|
|
/* LED bits for use with stm32_setleds() */
|
|
|
|
|
|
|
|
#define BOARD_LED1_BIT (1 << BOARD_LED1)
|
|
|
|
#define BOARD_LED2_BIT (1 << BOARD_LED2)
|
|
|
|
#define BOARD_LED3_BIT (1 << BOARD_LED3)
|
|
|
|
#define BOARD_LED4_BIT (1 << BOARD_LED4)
|
|
|
|
|
|
|
|
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the
|
|
|
|
* stm32f4discovery. The following definitions describe how NuttX controls the LEDs:
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define LED_STARTED 0 /* LED1 */
|
|
|
|
#define LED_HEAPALLOCATE 1 /* LED2 */
|
|
|
|
#define LED_IRQSENABLED 2 /* LED1 + LED2 */
|
|
|
|
#define LED_STACKCREATED 3 /* LED3 */
|
|
|
|
#define LED_INIRQ 4 /* LED1 + LED3 */
|
|
|
|
#define LED_SIGNAL 5 /* LED2 + LED3 */
|
|
|
|
#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
|
|
|
|
#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */
|
|
|
|
|
|
|
|
/* Button definitions ***************************************************************/
|
|
|
|
/* The STM32F4 Discovery supports one button: */
|
|
|
|
|
|
|
|
#define BUTTON_USER 0
|
|
|
|
|
|
|
|
#define NUM_BUTTONS 1
|
|
|
|
|
|
|
|
#define BUTTON_USER_BIT (1 << BUTTON_USER)
|
|
|
|
|
|
|
|
/* Alternate function pin selections ************************************************/
|
|
|
|
|
|
|
|
/* UART2:
|
|
|
|
*
|
|
|
|
* The STM32F4 Discovery has no on-board serial devices, but the console is
|
|
|
|
* brought out to PA2 (TX) and PA3 (RX) for connection to an external serial device.
|
2012-02-15 18:51:30 +01:00
|
|
|
* (See the README.txt file for other options)
|
2012-01-11 14:01:26 +01:00
|
|
|
*/
|
|
|
|
|
|
|
|
#define GPIO_USART2_RX GPIO_USART2_RX_1
|
|
|
|
#define GPIO_USART2_TX GPIO_USART2_TX_1
|
|
|
|
|
|
|
|
/* PWM
|
|
|
|
*
|
|
|
|
* The STM32F4 Discovery has no real on-board PWM devices, but the board can be
|
|
|
|
* configured to output a pulse train using TIM4 CH2 on PD13.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
|
|
|
|
|
2012-11-08 15:10:24 +01:00
|
|
|
/* SPI - There is a MEMS device on SPI1 using these pins: */
|
2012-01-11 14:01:26 +01:00
|
|
|
|
|
|
|
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
|
|
|
|
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
|
|
|
|
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
|
|
|
|
|
2012-02-15 18:51:30 +01:00
|
|
|
/* Timer Inputs/Outputs (see the README.txt file for options) */
|
|
|
|
|
|
|
|
#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2
|
|
|
|
#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
|
|
|
|
|
2012-02-25 01:19:13 +01:00
|
|
|
#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1
|
|
|
|
#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1
|
|
|
|
|
2012-01-11 14:01:26 +01:00
|
|
|
/************************************************************************************
|
|
|
|
* Public Data
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
|
|
|
|
#undef EXTERN
|
|
|
|
#if defined(__cplusplus)
|
|
|
|
#define EXTERN extern "C"
|
|
|
|
extern "C" {
|
|
|
|
#else
|
|
|
|
#define EXTERN extern
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Public Function Prototypes
|
|
|
|
************************************************************************************/
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: stm32_boardinitialize
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* All STM32 architectures must provide the following entry point. This entry point
|
|
|
|
* is called early in the intitialization -- after all memory has been configured
|
|
|
|
* and mapped but before any devices have been initialized.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
2013-06-03 23:11:56 +02:00
|
|
|
void stm32_boardinitialize(void);
|
2012-01-11 14:01:26 +01:00
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: stm32_ledinit, stm32_setled, and stm32_setleds
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board LEDs. If
|
2013-06-03 23:11:56 +02:00
|
|
|
* CONFIG_ARCH_LEDS is not defined, then the following interfaces are available to
|
2012-01-11 14:01:26 +01:00
|
|
|
* control the LEDs from user applications.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifndef CONFIG_ARCH_LEDS
|
2013-06-03 23:11:56 +02:00
|
|
|
void stm32_ledinit(void);
|
|
|
|
void stm32_setled(int led, bool ledon);
|
|
|
|
void stm32_setleds(uint8_t ledset);
|
2012-01-11 14:01:26 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#undef EXTERN
|
|
|
|
#if defined(__cplusplus)
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* __ASSEMBLY__ */
|
2012-08-29 19:41:43 +02:00
|
|
|
#endif /* __CONFIG_STM32F4DISCOVERY_INCLUDE_BOARD_H */
|