2009-05-13 16:29:22 +02:00
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/****************************************************************************
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2011-08-05 23:57:49 +02:00
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* arch/arm/include/armv7-m/irq.h
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2009-05-13 16:29:22 +02:00
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*
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2014-02-23 15:25:49 +01:00
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* Copyright (C) 2009, 2011-2012, 2014 Gregory Nutt. All rights reserved.
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2011-12-07 19:58:21 +01:00
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* Author: Gregory Nutt <gnutt@nuttx.org>
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2009-05-13 16:29:22 +02:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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2011-08-05 23:57:49 +02:00
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#ifndef __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_H
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#define __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_H
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2009-05-13 16:29:22 +02:00
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/****************************************************************************
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* Included Files
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****************************************************************************/
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2011-12-07 16:36:46 +01:00
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#include <nuttx/config.h>
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2009-05-13 16:29:22 +02:00
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#include <nuttx/irq.h>
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2009-12-16 21:05:51 +01:00
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#ifndef __ASSEMBLY__
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2012-09-17 20:35:37 +02:00
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# include <nuttx/compiler.h>
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2009-12-16 21:05:51 +01:00
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# include <stdint.h>
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#endif
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2012-02-22 19:44:34 +01:00
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/* Included implementation-dependent register save structure layouts */
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2009-05-13 16:29:22 +02:00
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2015-03-06 15:26:43 +01:00
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#if defined(CONFIG_ARMV7M_CMNVECTOR) && !defined(CONFIG_ARMV7M_LAZYFPU)
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2012-02-22 19:44:34 +01:00
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# include <arch/armv7-m/irq_cmnvector.h>
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2011-04-08 03:33:21 +02:00
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#else
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2012-02-22 19:44:34 +01:00
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# include <arch/armv7-m/irq_lazyfpu.h>
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2011-04-08 03:33:21 +02:00
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#endif
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2011-12-07 16:36:46 +01:00
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2013-01-22 02:25:40 +01:00
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#ifdef CONFIG_ARMV7M_USEBASEPRI
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# include <arch/chip/chip.h>
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#endif
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2012-02-22 19:44:34 +01:00
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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2013-03-17 17:13:28 +01:00
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/* Configuration ************************************************************/
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/* If this is a kernel build, how many nested system calls should we support? */
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2009-05-13 16:29:22 +02:00
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|
2013-03-17 17:13:28 +01:00
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#ifndef CONFIG_SYS_NNEST
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# define CONFIG_SYS_NNEST 2
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#endif
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/* Alternate register names *************************************************/
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2011-04-08 03:33:21 +02:00
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2009-05-13 16:29:22 +02:00
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#define REG_A1 REG_R0
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#define REG_A2 REG_R1
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#define REG_A3 REG_R2
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#define REG_A4 REG_R3
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#define REG_V1 REG_R4
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#define REG_V2 REG_R5
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#define REG_V3 REG_R6
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#define REG_V4 REG_R7
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#define REG_V5 REG_R8
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#define REG_V6 REG_R9
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#define REG_V7 REG_R10
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#define REG_SB REG_R9
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#define REG_SL REG_R10
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#define REG_FP REG_R11
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#define REG_IP REG_R12
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#define REG_SP REG_R13
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#define REG_LR REG_R14
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#define REG_PC REG_R15
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|
2009-06-18 01:38:05 +02:00
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/* The PIC register is usually R10. It can be R9 is stack checking is enabled
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* or if the user changes it with -mpic-register on the GCC command line.
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*/
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#define REG_PIC REG_R10
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2009-05-13 16:29:22 +02:00
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/****************************************************************************
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* Public Types
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****************************************************************************/
|
2013-03-17 17:13:28 +01:00
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#ifndef __ASSEMBLY__
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/* This structure represents the return state from a system call */
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|
2014-08-28 22:52:14 +02:00
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#ifdef CONFIG_LIB_SYSCALL
|
2013-03-17 17:13:28 +01:00
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struct xcpt_syscall_s
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{
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uint32_t excreturn; /* The EXC_RETURN value */
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uint32_t sysreturn; /* The return PC */
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};
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#endif
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2009-05-13 16:29:22 +02:00
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/* The following structure is included in the TCB and defines the complete
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* state of the thread.
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*/
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struct xcptcontext
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{
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2013-03-06 20:56:32 +01:00
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#ifndef CONFIG_DISABLE_SIGNALS
|
2009-05-13 16:29:22 +02:00
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/* The following function pointer is non-zero if there
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* are pending signals to be processed.
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*/
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void *sigdeliver; /* Actual type is sig_deliver_t */
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|
2009-05-13 18:19:05 +02:00
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/* These are saved copies of LR, PRIMASK, and xPSR used during
|
2009-05-13 16:29:22 +02:00
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* signal processing.
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*/
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2009-12-16 21:05:51 +01:00
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uint32_t saved_pc;
|
2013-01-22 15:37:17 +01:00
|
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#ifdef CONFIG_ARMV7M_USEBASEPRI
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uint32_t saved_basepri;
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|
#else
|
2009-12-16 21:05:51 +01:00
|
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uint32_t saved_primask;
|
2013-01-22 15:37:17 +01:00
|
|
|
#endif
|
2009-12-16 21:05:51 +01:00
|
|
|
uint32_t saved_xpsr;
|
2014-08-29 22:47:22 +02:00
|
|
|
#ifdef CONFIG_BUILD_PROTECTED
|
2014-02-23 15:25:49 +01:00
|
|
|
uint32_t saved_lr;
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|
|
|
#endif
|
2013-03-17 01:40:49 +01:00
|
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|
|
2014-08-29 22:47:22 +02:00
|
|
|
# ifdef CONFIG_BUILD_PROTECTED
|
2013-03-17 01:40:49 +01:00
|
|
|
/* This is the saved address to use when returning from a user-space
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|
|
* signal handler.
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|
|
*/
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|
uint32_t sigreturn;
|
2013-03-17 17:13:28 +01:00
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|
2013-03-17 01:40:49 +01:00
|
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|
# endif
|
2009-05-13 16:29:22 +02:00
|
|
|
#endif
|
|
|
|
|
2014-08-28 22:52:14 +02:00
|
|
|
#ifdef CONFIG_LIB_SYSCALL
|
2013-03-17 17:13:28 +01:00
|
|
|
/* The following array holds the return address and the exc_return value
|
|
|
|
* needed to return from each nested system call.
|
2013-03-12 22:53:18 +01:00
|
|
|
*/
|
2013-03-06 20:56:32 +01:00
|
|
|
|
2013-03-17 17:13:28 +01:00
|
|
|
uint8_t nsyscalls;
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|
|
|
struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST];
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|
|
|
|
2013-03-06 20:56:32 +01:00
|
|
|
#endif
|
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|
2009-05-13 16:29:22 +02:00
|
|
|
/* Register save area */
|
|
|
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|
2009-12-16 21:05:51 +01:00
|
|
|
uint32_t regs[XCPTCONTEXT_REGS];
|
2009-05-13 16:29:22 +02:00
|
|
|
};
|
|
|
|
#endif
|
|
|
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|
|
|
/****************************************************************************
|
|
|
|
* Inline functions
|
|
|
|
****************************************************************************/
|
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|
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
|
2013-01-22 15:37:17 +01:00
|
|
|
/* Get/set the PRIMASK register */
|
2009-05-18 23:08:43 +02:00
|
|
|
|
2012-09-17 20:35:37 +02:00
|
|
|
static inline uint8_t getprimask(void) inline_function;
|
2009-12-16 21:05:51 +01:00
|
|
|
static inline uint8_t getprimask(void)
|
2009-05-18 23:08:43 +02:00
|
|
|
{
|
2009-12-16 21:05:51 +01:00
|
|
|
uint32_t primask;
|
2009-05-18 23:08:43 +02:00
|
|
|
__asm__ __volatile__
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|
|
|
(
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|
|
|
"\tmrs %0, primask\n"
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|
: "=r" (primask)
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|
|
:
|
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|
|
: "memory");
|
2012-09-17 20:35:37 +02:00
|
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|
2009-12-16 21:05:51 +01:00
|
|
|
return (uint8_t)primask;
|
2009-05-18 23:08:43 +02:00
|
|
|
}
|
|
|
|
|
2012-09-17 20:35:37 +02:00
|
|
|
static inline void setprimask(uint32_t primask) inline_function;
|
2009-12-16 21:05:51 +01:00
|
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|
static inline void setprimask(uint32_t primask)
|
2009-05-18 23:08:43 +02:00
|
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|
{
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|
|
__asm__ __volatile__
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|
|
|
(
|
|
|
|
"\tmsr primask, %0\n"
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|
:
|
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|
|
: "r" (primask)
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|
|
|
: "memory");
|
|
|
|
}
|
|
|
|
|
2013-01-22 15:37:17 +01:00
|
|
|
/* Get/set the BASEPRI register. The BASEPRI register defines the minimum
|
|
|
|
* priority for exception processing. When BASEPRI is set to a nonzero
|
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|
|
* value, it prevents the activation of all exceptions with the same or
|
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|
|
* lower priority level as the BASEPRI value.
|
|
|
|
*/
|
2009-05-18 23:08:43 +02:00
|
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|
|
2012-09-17 20:35:37 +02:00
|
|
|
static inline uint8_t getbasepri(void) inline_function;
|
2009-12-16 21:05:51 +01:00
|
|
|
static inline uint8_t getbasepri(void)
|
2009-05-18 23:08:43 +02:00
|
|
|
{
|
2009-12-16 21:05:51 +01:00
|
|
|
uint32_t basepri;
|
2012-09-17 20:35:37 +02:00
|
|
|
|
2009-05-18 23:08:43 +02:00
|
|
|
__asm__ __volatile__
|
|
|
|
(
|
|
|
|
"\tmrs %0, basepri\n"
|
|
|
|
: "=r" (basepri)
|
|
|
|
:
|
|
|
|
: "memory");
|
2012-09-17 20:35:37 +02:00
|
|
|
|
2009-12-16 21:05:51 +01:00
|
|
|
return (uint8_t)basepri;
|
2009-05-18 23:08:43 +02:00
|
|
|
}
|
2009-05-17 19:18:19 +02:00
|
|
|
|
2012-09-17 20:35:37 +02:00
|
|
|
static inline void setbasepri(uint32_t basepri) inline_function;
|
2009-12-16 21:05:51 +01:00
|
|
|
static inline void setbasepri(uint32_t basepri)
|
2009-05-17 19:18:19 +02:00
|
|
|
{
|
|
|
|
__asm__ __volatile__
|
|
|
|
(
|
2009-05-18 23:08:43 +02:00
|
|
|
"\tmsr basepri, %0\n"
|
2009-05-17 19:18:19 +02:00
|
|
|
:
|
|
|
|
: "r" (basepri)
|
|
|
|
: "memory");
|
2009-05-13 16:29:22 +02:00
|
|
|
}
|
|
|
|
|
2013-01-22 02:25:40 +01:00
|
|
|
/* Disable IRQs */
|
|
|
|
|
|
|
|
static inline void irqdisable(void) inline_function;
|
|
|
|
static inline void irqdisable(void)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
|
|
|
setbasepri(NVIC_SYSH_DISABLE_PRIORITY);
|
|
|
|
#else
|
|
|
|
__asm__ __volatile__ ("\tcpsid i\n");
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Save the current primask state & disable IRQs */
|
|
|
|
|
|
|
|
static inline irqstate_t irqsave(void) inline_function;
|
|
|
|
static inline irqstate_t irqsave(void)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
|
|
|
|
|
|
|
uint8_t basepri = getbasepri();
|
|
|
|
setbasepri(NVIC_SYSH_DISABLE_PRIORITY);
|
2013-01-22 15:37:17 +01:00
|
|
|
return (irqstate_t)basepri;
|
2013-01-22 02:25:40 +01:00
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
unsigned short primask;
|
|
|
|
|
|
|
|
/* Return the current value of primask register and set
|
|
|
|
* bit 0 of the primask register to disable interrupts
|
|
|
|
*/
|
|
|
|
|
|
|
|
__asm__ __volatile__
|
|
|
|
(
|
|
|
|
"\tmrs %0, primask\n"
|
|
|
|
"\tcpsid i\n"
|
|
|
|
: "=r" (primask)
|
|
|
|
:
|
|
|
|
: "memory");
|
|
|
|
|
|
|
|
return primask;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable IRQs */
|
|
|
|
|
|
|
|
static inline void irqenable(void) inline_function;
|
|
|
|
static inline void irqenable(void)
|
|
|
|
{
|
2013-01-22 15:37:17 +01:00
|
|
|
setbasepri(0);
|
2013-01-22 02:25:40 +01:00
|
|
|
__asm__ __volatile__ ("\tcpsie i\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Restore saved primask state */
|
|
|
|
|
|
|
|
static inline void irqrestore(irqstate_t flags) inline_function;
|
|
|
|
static inline void irqrestore(irqstate_t flags)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
2013-01-22 15:37:17 +01:00
|
|
|
setbasepri((uint32_t)flags);
|
2013-01-22 02:25:40 +01:00
|
|
|
#else
|
|
|
|
/* If bit 0 of the primask is 0, then we need to restore
|
2013-04-17 02:00:59 +02:00
|
|
|
* interrupts.
|
2013-01-22 02:25:40 +01:00
|
|
|
*/
|
|
|
|
|
|
|
|
__asm__ __volatile__
|
|
|
|
(
|
|
|
|
"\ttst %0, #1\n"
|
2014-05-22 17:01:25 +02:00
|
|
|
"\tbne.n 1f\n"
|
2013-01-22 02:25:40 +01:00
|
|
|
"\tcpsie i\n"
|
|
|
|
"1:\n"
|
|
|
|
:
|
|
|
|
: "r" (flags)
|
|
|
|
: "memory");
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2010-11-20 01:39:29 +01:00
|
|
|
/* Get/set IPSR */
|
2009-05-18 23:08:43 +02:00
|
|
|
|
2012-09-17 20:35:37 +02:00
|
|
|
static inline uint32_t getipsr(void) inline_function;
|
2009-12-16 21:05:51 +01:00
|
|
|
static inline uint32_t getipsr(void)
|
2009-05-18 23:08:43 +02:00
|
|
|
{
|
2009-12-16 21:05:51 +01:00
|
|
|
uint32_t ipsr;
|
2009-05-18 23:08:43 +02:00
|
|
|
__asm__ __volatile__
|
|
|
|
(
|
|
|
|
"\tmrs %0, ipsr\n"
|
|
|
|
: "=r" (ipsr)
|
|
|
|
:
|
|
|
|
: "memory");
|
2012-09-17 20:35:37 +02:00
|
|
|
|
2009-05-18 23:08:43 +02:00
|
|
|
return ipsr;
|
|
|
|
}
|
|
|
|
|
2012-02-22 19:14:18 +01:00
|
|
|
/* Get/set CONTROL */
|
|
|
|
|
2012-09-17 20:35:37 +02:00
|
|
|
static inline uint32_t getcontrol(void) inline_function;
|
2012-02-22 19:14:18 +01:00
|
|
|
static inline uint32_t getcontrol(void)
|
|
|
|
{
|
|
|
|
uint32_t control;
|
|
|
|
__asm__ __volatile__
|
|
|
|
(
|
|
|
|
"\tmrs %0, control\n"
|
|
|
|
: "=r" (control)
|
|
|
|
:
|
|
|
|
: "memory");
|
2012-09-17 20:35:37 +02:00
|
|
|
|
2012-02-22 19:14:18 +01:00
|
|
|
return control;
|
|
|
|
}
|
|
|
|
|
2012-09-17 20:35:37 +02:00
|
|
|
static inline void setcontrol(uint32_t control) inline_function;
|
2012-02-22 19:14:18 +01:00
|
|
|
static inline void setcontrol(uint32_t control)
|
|
|
|
{
|
|
|
|
__asm__ __volatile__
|
|
|
|
(
|
|
|
|
"\tmsr control, %0\n"
|
|
|
|
:
|
|
|
|
: "r" (control)
|
|
|
|
: "memory");
|
|
|
|
}
|
|
|
|
|
2009-05-13 16:29:22 +02:00
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
|
|
|
|
/****************************************************************************
|
2015-10-03 01:42:29 +02:00
|
|
|
* Public Data
|
2009-05-13 16:29:22 +02:00
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Public Function Prototypes
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
#ifdef __cplusplus
|
|
|
|
#define EXTERN extern "C"
|
2015-06-13 03:26:01 +02:00
|
|
|
extern "C"
|
|
|
|
{
|
2009-05-13 16:29:22 +02:00
|
|
|
#else
|
|
|
|
#define EXTERN extern
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#undef EXTERN
|
|
|
|
#ifdef __cplusplus
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
2011-08-05 23:57:49 +02:00
|
|
|
#endif /* __ARCH_ARM_INCLUDE_ARMV7_M_IRQ_H */
|
2009-05-13 16:29:22 +02:00
|
|
|
|