2016-02-27 01:39:27 +01:00
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/****************************************************************************
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* drivers/wireless/ieee802154/mrf24j40.c
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*
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* Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved.
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2017-05-05 17:15:28 +02:00
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* Copyright (C) 2017 Verge Inc. All rights reserved.
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2016-02-27 01:39:27 +01:00
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* Author: Sebastien Lorquet <sebastien@lorquet.fr>
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2017-04-15 19:20:33 +02:00
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* Author: Anthony Merlino <anthony@vergeaero.com>
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2016-02-27 01:39:27 +01:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <debug.h>
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#include <sys/types.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <errno.h>
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#include <semaphore.h>
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#include <nuttx/arch.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/wqueue.h>
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2016-11-03 18:00:47 +01:00
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#include <nuttx/semaphore.h>
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2016-02-27 01:39:27 +01:00
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#include <nuttx/fs/fs.h>
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#include <nuttx/spi/spi.h>
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2017-04-26 17:30:54 +02:00
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#include <nuttx/drivers/iob.h>
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2016-02-27 01:39:27 +01:00
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#include <nuttx/wireless/ieee802154/mrf24j40.h>
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#include <nuttx/wireless/ieee802154/ieee802154_radio.h>
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2017-03-24 16:10:35 +01:00
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#include <nuttx/wireless/ieee802154/ieee802154_mac.h>
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2016-02-27 01:39:27 +01:00
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#include "mrf24j40.h"
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2016-02-28 14:48:16 +01:00
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/****************************************************************************
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2016-02-27 01:39:27 +01:00
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* Pre-processor Definitions
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2016-02-28 14:48:16 +01:00
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****************************************************************************/
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2016-02-27 01:39:27 +01:00
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#ifndef CONFIG_SCHED_HPWORK
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2017-03-15 21:57:13 +01:00
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# error High priority work queue required in this driver
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2016-02-27 01:39:27 +01:00
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#endif
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#ifndef CONFIG_IEEE802154_MRF24J40_SPIMODE
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# define CONFIG_IEEE802154_MRF24J40_SPIMODE SPIDEV_MODE0
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#endif
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#ifndef CONFIG_IEEE802154_MRF24J40_FREQUENCY
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# define CONFIG_IEEE802154_MRF24J40_FREQUENCY 8000000
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#endif
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2016-02-28 14:48:16 +01:00
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#ifndef CONFIG_SPI_EXCHANGE
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# error CONFIG_SPI_EXCHANGE required for this driver
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#endif
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2016-02-27 01:39:27 +01:00
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/* Definitions for the device structure */
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#define MRF24J40_RXMODE_NORMAL 0
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#define MRF24J40_RXMODE_PROMISC 1
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#define MRF24J40_RXMODE_NOCRC 2
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2017-05-05 17:15:28 +02:00
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#define MRF24J40_MODE_DEVICE 0
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#define MRF24J40_MODE_COORD 1
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#define MRF24J40_MODE_PANCOORD 2
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2016-02-27 01:39:27 +01:00
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/* Definitions for PA control on high power modules */
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2017-04-18 22:25:23 +02:00
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#define MRF24J40_PA_AUTO 1
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#define MRF24J40_PA_ED 2
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#define MRF24J40_PA_SLEEP 3
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2016-02-27 01:39:27 +01:00
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2017-04-18 21:34:13 +02:00
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#define MRF24J40_GTS_SLOTS 2
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2016-02-28 14:48:16 +01:00
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/****************************************************************************
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2016-02-27 01:39:27 +01:00
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* Private Types
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2016-02-28 14:48:16 +01:00
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****************************************************************************/
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2016-02-27 01:39:27 +01:00
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2017-04-18 21:34:13 +02:00
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struct mrf24j40_txdesc_s
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{
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struct ieee802154_txdesc_s pub;
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uint8_t busy : 1; /* Is this txdesc being used */
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};
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2016-02-27 01:39:27 +01:00
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/* A MRF24J40 device instance */
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2016-06-01 12:12:21 +02:00
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struct mrf24j40_radio_s
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2016-02-27 01:39:27 +01:00
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{
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2017-04-18 22:25:23 +02:00
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struct ieee802154_radio_s radio; /* The public device instance */
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2017-05-02 22:42:40 +02:00
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FAR struct ieee802154_radiocb_s *radiocb; /* Registered callbacks */
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2017-04-15 19:20:33 +02:00
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2017-04-18 21:34:13 +02:00
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/* Low-level MCU-specific support */
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2016-02-27 01:39:27 +01:00
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2017-04-18 21:34:13 +02:00
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FAR const struct mrf24j40_lower_s *lower;
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2017-04-18 22:25:23 +02:00
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FAR struct spi_dev_s *spi; /* Saved SPI interface instance */
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2017-04-18 21:34:13 +02:00
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struct work_s irqwork; /* For deferring interrupt work to work queue */
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struct work_s pollwork; /* For deferring poll work to the work queue */
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2017-04-18 22:25:23 +02:00
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sem_t exclsem; /* Exclusive access to this struct */
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2017-04-18 21:34:13 +02:00
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2017-05-05 17:15:28 +02:00
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struct ieee802154_addr_s addr;
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2017-04-18 21:34:13 +02:00
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uint8_t channel; /* 11 to 26 for the 2.4 GHz band */
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uint8_t devmode; /* device mode: device, coord, pancoord */
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uint8_t paenabled; /* enable usage of PA */
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uint8_t rxmode; /* Reception mode: Main, no CRC, promiscuous */
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int32_t txpower; /* TX power in mBm = dBm/100 */
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2017-04-18 22:25:23 +02:00
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struct ieee802154_cca_s cca; /* Clear channel assessement method */
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2017-04-15 19:20:33 +02:00
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/* Buffer Allocations */
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2017-04-17 17:27:14 +02:00
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struct mrf24j40_txdesc_s csma_desc;
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2017-05-02 15:12:56 +02:00
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FAR struct iob_s *csma_frame;
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2017-04-15 19:20:33 +02:00
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2017-05-02 15:12:56 +02:00
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struct mrf24j40_txdesc_s gts_desc[MRF24J40_GTS_SLOTS];
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FAR struct iob_s *gts_frame[MRF24J40_GTS_SLOTS];
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2017-04-17 17:27:14 +02:00
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};
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2016-02-27 01:39:27 +01:00
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* Internal operations */
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2017-04-15 19:20:33 +02:00
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static void mrf24j40_spi_lock(FAR struct spi_dev_s *spi);
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2016-02-27 01:39:27 +01:00
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2017-03-15 21:57:13 +01:00
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static void mrf24j40_setreg(FAR struct spi_dev_s *spi, uint32_t addr,
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uint8_t val);
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static uint8_t mrf24j40_getreg(FAR struct spi_dev_s *spi, uint32_t addr);
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2016-02-27 01:39:27 +01:00
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2017-03-15 21:57:13 +01:00
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static int mrf24j40_resetrfsm(FAR struct mrf24j40_radio_s *dev);
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static int mrf24j40_pacontrol(FAR struct mrf24j40_radio_s *dev, int mode);
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static int mrf24j40_initialize(FAR struct mrf24j40_radio_s *dev);
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2016-02-27 01:39:27 +01:00
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2017-03-15 21:57:13 +01:00
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static int mrf24j40_setrxmode(FAR struct mrf24j40_radio_s *dev, int mode);
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static int mrf24j40_regdump(FAR struct mrf24j40_radio_s *dev);
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2017-04-19 22:34:34 +02:00
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2017-03-15 21:57:13 +01:00
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static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev);
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2017-04-19 22:34:34 +02:00
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static void mrf24j40_irqwork_txnorm(FAR struct mrf24j40_radio_s *dev);
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static void mrf24j40_irqwork_txgts(FAR struct mrf24j40_radio_s *dev,
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2017-04-19 22:52:45 +02:00
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uint8_t gts_num);
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2017-04-19 22:34:34 +02:00
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2017-03-15 21:57:13 +01:00
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static void mrf24j40_irqworker(FAR void *arg);
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2017-03-24 20:49:17 +01:00
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static int mrf24j40_interrupt(int irq, FAR void *context, FAR void *arg);
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2016-02-27 01:39:27 +01:00
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2017-04-18 21:34:13 +02:00
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static void mrf24j40_dopoll_csma(FAR void *arg);
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static void mrf24j40_dopoll_gts(FAR void *arg);
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2017-04-19 22:52:45 +02:00
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static int mrf24j40_csma_setup(FAR struct mrf24j40_radio_s *dev,
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2017-05-02 15:12:56 +02:00
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FAR struct iob_s *frame);
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2017-04-19 22:52:45 +02:00
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static int mrf24j40_gts_setup(FAR struct mrf24j40_radio_s *dev, uint8_t gts,
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2017-05-02 15:12:56 +02:00
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FAR struct iob_s *frame);
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2017-04-19 22:52:45 +02:00
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static int mrf24j40_setup_fifo(FAR struct mrf24j40_radio_s *dev,
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2017-05-02 15:12:56 +02:00
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FAR struct iob_s *frame, uint32_t fifo_addr);
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2017-04-18 21:34:13 +02:00
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2016-02-27 01:39:27 +01:00
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_setchannel(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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uint8_t chan);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_getchannel(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR uint8_t *chan);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_setpanid(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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uint16_t panid);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_getpanid(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR uint16_t *panid);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_setsaddr(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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uint16_t saddr);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_getsaddr(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR uint16_t *saddr);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_seteaddr(FAR struct mrf24j40_radio_s *radio,
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2017-05-05 17:15:28 +02:00
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FAR const uint8_t *eaddr);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_geteaddr(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR uint8_t *eaddr);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_setpromisc(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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bool promisc);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_getpromisc(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR bool *promisc);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_setdevmode(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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uint8_t mode);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_getdevmode(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR uint8_t *mode);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_settxpower(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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int32_t txpwr);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_gettxpower(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR int32_t *txpwr);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_setcca(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR struct ieee802154_cca_s *cca);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_getcca(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR struct ieee802154_cca_s *cca);
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2017-04-18 21:34:13 +02:00
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static int mrf24j40_energydetect(FAR struct mrf24j40_radio_s *radio,
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2017-03-15 21:57:13 +01:00
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FAR uint8_t *energy);
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2017-04-13 19:14:02 +02:00
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/* Driver operations */
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2017-04-15 19:20:33 +02:00
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static int mrf24j40_bind(FAR struct ieee802154_radio_s *radio,
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2017-04-19 19:26:30 +02:00
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FAR struct ieee802154_radiocb_s *radiocb);
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2017-05-02 15:12:56 +02:00
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static int mrf24j40_txnotify_csma(FAR struct ieee802154_radio_s *radio);
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|
|
|
|
static int mrf24j40_txnotify_gts(FAR struct ieee802154_radio_s *radio);
|
2017-05-05 17:15:28 +02:00
|
|
|
|
static int mrf24j40_get_attr(FAR struct ieee802154_radio_s *radio,
|
|
|
|
|
enum ieee802154_pib_attr_e pib_attr,
|
|
|
|
|
FAR union ieee802154_attr_val_u *attr_value);
|
|
|
|
|
static int mrf24j40_set_attr(FAR struct ieee802154_radio_s *radio,
|
|
|
|
|
enum ieee802154_pib_attr_e pib_attr,
|
|
|
|
|
FAR const union ieee802154_attr_val_u *attr_value);
|
2017-03-15 21:57:13 +01:00
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Private Data
|
|
|
|
|
****************************************************************************/
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
/* These are pointers to ALL registered MRF24J40 devices.
|
|
|
|
|
* This table is used during irqs to find the context
|
|
|
|
|
* Only one device is supported for now.
|
|
|
|
|
* More devices can be supported in the future by lookup them up
|
|
|
|
|
* using the IRQ number. See the ENC28J60 or CC3000 drivers for reference.
|
|
|
|
|
*/
|
|
|
|
|
|
2017-03-27 18:48:58 +02:00
|
|
|
|
static const struct ieee802154_radioops_s mrf24j40_devops =
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-04-15 19:20:33 +02:00
|
|
|
|
mrf24j40_bind,
|
2017-04-17 17:27:14 +02:00
|
|
|
|
mrf24j40_txnotify_csma,
|
|
|
|
|
mrf24j40_txnotify_gts,
|
2017-05-05 17:15:28 +02:00
|
|
|
|
mrf24j40_get_attr,
|
|
|
|
|
mrf24j40_set_attr
|
2016-02-27 01:39:27 +01:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
2017-05-05 17:15:28 +02:00
|
|
|
|
* Radio Interface Functions
|
2016-02-27 01:39:27 +01:00
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
static int mrf24j40_bind(FAR struct ieee802154_radio_s *radio,
|
2017-04-19 19:26:30 +02:00
|
|
|
|
FAR struct ieee802154_radiocb_s *radiocb)
|
2017-04-15 19:20:33 +02:00
|
|
|
|
{
|
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)radio;
|
|
|
|
|
|
|
|
|
|
DEBUGASSERT(dev != NULL);
|
2017-04-19 19:26:30 +02:00
|
|
|
|
dev->radiocb = radiocb;
|
2017-04-15 19:20:33 +02:00
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Function: mrf24j40_txnotify_csma
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Driver callback invoked when new TX data is available. This is a
|
|
|
|
|
* stimulus perform an out-of-cycle poll and, thereby, reduce the TX
|
|
|
|
|
* latency.
|
|
|
|
|
*
|
|
|
|
|
* Parameters:
|
|
|
|
|
* radio - Reference to the radio driver state structure
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* None
|
|
|
|
|
*
|
|
|
|
|
* Assumptions:
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static int mrf24j40_txnotify_csma(FAR struct ieee802154_radio_s *radio)
|
|
|
|
|
{
|
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)radio;
|
|
|
|
|
|
|
|
|
|
/* Is our single work structure available? It may not be if there are
|
|
|
|
|
* pending interrupt actions and we will have to ignore the Tx
|
|
|
|
|
* availability action.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
if (work_available(&dev->pollwork))
|
|
|
|
|
{
|
|
|
|
|
/* Schedule to serialize the poll on the worker thread. */
|
|
|
|
|
|
|
|
|
|
work_queue(HPWORK, &dev->pollwork, mrf24j40_dopoll_csma, dev, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
2017-05-05 17:15:28 +02:00
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Function: mrf24j40_txnotify_gts
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Driver callback invoked when new TX data is available. This is a
|
|
|
|
|
* stimulus perform an out-of-cycle poll and, thereby, reduce the TX
|
|
|
|
|
* latency.
|
|
|
|
|
*
|
|
|
|
|
* Parameters:
|
|
|
|
|
* radio - Reference to the radio driver state structure
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* None
|
|
|
|
|
*
|
|
|
|
|
* Assumptions:
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static int mrf24j40_txnotify_gts(FAR struct ieee802154_radio_s *radio)
|
|
|
|
|
{
|
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)radio;
|
|
|
|
|
|
|
|
|
|
/* Is our single work structure available? It may not be if there are
|
|
|
|
|
* pending interrupt actions and we will have to ignore the Tx
|
|
|
|
|
* availability action.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
if (work_available(&dev->pollwork))
|
|
|
|
|
{
|
|
|
|
|
/* Schedule to serialize the poll on the worker thread. */
|
|
|
|
|
|
|
|
|
|
work_queue(HPWORK, &dev->pollwork, mrf24j40_dopoll_gts, dev, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int mrf24j40_get_attr(FAR struct ieee802154_radio_s *radio,
|
|
|
|
|
enum ieee802154_pib_attr_e pib_attr,
|
|
|
|
|
FAR union ieee802154_attr_val_u *attr_value)
|
|
|
|
|
{
|
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)radio;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
switch (pib_attr)
|
|
|
|
|
{
|
|
|
|
|
case IEEE802154_PIB_MAC_EXTENDED_ADDR:
|
|
|
|
|
{
|
|
|
|
|
memcpy(&attr_value->mac.eaddr[0], &dev->addr.eaddr[0], 8);
|
|
|
|
|
ret = IEEE802154_STATUS_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
ret = IEEE802154_STATUS_UNSUPPORTED_ATTRIBUTE;
|
|
|
|
|
}
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int mrf24j40_set_attr(FAR struct ieee802154_radio_s *radio,
|
|
|
|
|
enum ieee802154_pib_attr_e pib_attr,
|
|
|
|
|
FAR const union ieee802154_attr_val_u *attr_value)
|
|
|
|
|
{
|
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)radio;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
switch (pib_attr)
|
|
|
|
|
{
|
|
|
|
|
case IEEE802154_PIB_MAC_EXTENDED_ADDR:
|
|
|
|
|
{
|
|
|
|
|
mrf24j40_seteaddr(dev, &attr_value->mac.eaddr[0]);
|
|
|
|
|
ret = IEEE802154_STATUS_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case IEEE802154_PIB_MAC_PROMISCUOUS_MODE:
|
|
|
|
|
{
|
|
|
|
|
if (attr_value->mac.promisc_mode)
|
|
|
|
|
{
|
|
|
|
|
mrf24j40_setrxmode(dev, MRF24J40_RXMODE_PROMISC);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
mrf24j40_setrxmode(dev, MRF24J40_RXMODE_NORMAL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ret = IEEE802154_STATUS_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
ret = IEEE802154_STATUS_UNSUPPORTED_ATTRIBUTE;
|
|
|
|
|
}
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Internal Functions
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
/****************************************************************************
|
2017-04-17 17:27:14 +02:00
|
|
|
|
* Function: mrf24j40_dopoll_csma
|
2017-04-15 19:20:33 +02:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
2017-04-17 17:27:14 +02:00
|
|
|
|
* This function is called in order to preform an out-of-sequence TX poll.
|
|
|
|
|
* This is done:
|
|
|
|
|
*
|
2017-04-18 21:34:13 +02:00
|
|
|
|
* 1. After completion of a transmission (mrf24j40_txdone_csma),
|
|
|
|
|
* 2. When new TX data is available (mrf24j40_txnotify_csma), and
|
|
|
|
|
* 3. After a TX timeout to restart the sending process
|
|
|
|
|
* (mrf24j40_txtimeout_csma).
|
2017-05-02 22:42:40 +02:00
|
|
|
|
*
|
2017-04-17 17:27:14 +02:00
|
|
|
|
* Parameters:
|
|
|
|
|
* radio - Reference to the radio driver state structure
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* None
|
|
|
|
|
*
|
|
|
|
|
* Assumptions:
|
2017-04-15 19:20:33 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
static void mrf24j40_dopoll_csma(FAR void *arg)
|
2017-04-15 19:20:33 +02:00
|
|
|
|
{
|
2017-04-18 21:34:13 +02:00
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)arg;
|
2017-04-26 17:30:54 +02:00
|
|
|
|
int len = 0;
|
2017-04-15 19:20:33 +02:00
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
/* Get exclusive access to the driver */
|
2017-04-17 17:27:14 +02:00
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
while (sem_wait(&dev->exclsem) != 0) { }
|
2017-05-02 22:42:40 +02:00
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
/* If this a CSMA transaction and we have room in the CSMA fifo */
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
if (!dev->csma_desc.busy)
|
2017-04-15 19:20:33 +02:00
|
|
|
|
{
|
|
|
|
|
/* need to somehow allow for a handle to be passed */
|
|
|
|
|
|
2017-04-26 17:30:54 +02:00
|
|
|
|
len = dev->radiocb->poll_csma(dev->radiocb, &dev->csma_desc.pub,
|
2017-05-02 15:12:56 +02:00
|
|
|
|
&dev->csma_frame);
|
2017-04-26 17:30:54 +02:00
|
|
|
|
if (len > 0)
|
2017-04-17 17:27:14 +02:00
|
|
|
|
{
|
|
|
|
|
/* Now the txdesc is in use */
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
dev->csma_desc.busy = 1;
|
2017-04-17 17:27:14 +02:00
|
|
|
|
|
|
|
|
|
/* Setup the transaction on the device in the CSMA FIFO */
|
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
mrf24j40_csma_setup(dev, dev->csma_frame);
|
2017-04-17 17:27:14 +02:00
|
|
|
|
}
|
2017-04-15 19:20:33 +02:00
|
|
|
|
}
|
2017-04-17 17:27:14 +02:00
|
|
|
|
|
|
|
|
|
sem_post(&dev->exclsem);
|
|
|
|
|
}
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Function: mrf24j40_dopoll_gts
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* This function is called in order to preform an out-of-sequence TX poll.
|
|
|
|
|
* This is done:
|
|
|
|
|
*
|
|
|
|
|
* 1. After completion of a transmission (mrf24j40_txdone_gts),
|
|
|
|
|
* 2. When new TX data is available (mrf24j40_txnotify_gts), and
|
|
|
|
|
* 3. After a TX timeout to restart the sending process
|
|
|
|
|
* (mrf24j40_txtimeout_gts).
|
2017-05-02 22:42:40 +02:00
|
|
|
|
*
|
2017-04-18 21:34:13 +02:00
|
|
|
|
* Parameters:
|
|
|
|
|
* arg - Reference to the radio driver state structure
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* None
|
|
|
|
|
*
|
|
|
|
|
* Assumptions:
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static void mrf24j40_dopoll_gts(FAR void *arg)
|
|
|
|
|
{
|
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)arg;
|
|
|
|
|
int gts = 0;
|
2017-04-26 17:30:54 +02:00
|
|
|
|
int len = 0;
|
2017-04-18 21:34:13 +02:00
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
/* Get exclusive access to the driver */
|
2017-04-17 17:27:14 +02:00
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
while (sem_wait(&dev->exclsem) != 0) { }
|
2017-04-17 17:27:14 +02:00
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
for (gts = 0; gts < MRF24J40_GTS_SLOTS; gts++)
|
2017-04-17 17:53:58 +02:00
|
|
|
|
{
|
2017-04-18 21:34:13 +02:00
|
|
|
|
if (!dev->gts_desc[gts].busy)
|
2017-04-17 17:53:58 +02:00
|
|
|
|
{
|
2017-04-26 17:30:54 +02:00
|
|
|
|
len = dev->radiocb->poll_gts(dev->radiocb, &dev->gts_desc[gts].pub,
|
2017-05-02 15:12:56 +02:00
|
|
|
|
&dev->gts_frame[0]);
|
2017-04-26 17:30:54 +02:00
|
|
|
|
if (len > 0)
|
2017-04-17 17:53:58 +02:00
|
|
|
|
{
|
|
|
|
|
/* Now the txdesc is in use */
|
2017-04-17 17:27:14 +02:00
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
dev->gts_desc[gts].busy = 1;
|
2017-04-15 19:20:33 +02:00
|
|
|
|
|
2017-04-17 17:53:58 +02:00
|
|
|
|
/* Setup the transaction on the device in the open GTS FIFO */
|
2017-04-15 19:20:33 +02:00
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
mrf24j40_gts_setup(dev, gts, dev->gts_frame[0]);
|
2017-04-17 17:53:58 +02:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
2017-05-02 22:42:40 +02:00
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
sem_post(&dev->exclsem);
|
2017-04-15 19:20:33 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_spi_lock
|
2016-02-27 01:39:27 +01:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Acquire exclusive access to the shared SPI bus.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static void mrf24j40_spi_lock(FAR struct spi_dev_s *spi)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-03-15 21:57:13 +01:00
|
|
|
|
SPI_LOCK(spi, 1);
|
|
|
|
|
SPI_SETBITS(spi, 8);
|
|
|
|
|
SPI_SETMODE(spi, CONFIG_IEEE802154_MRF24J40_SPIMODE);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
SPI_SETFREQUENCY(spi, CONFIG_IEEE802154_MRF24J40_FREQUENCY);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
2017-04-15 19:20:33 +02:00
|
|
|
|
* Name: mrf24j40_spi_unlock
|
2016-02-27 01:39:27 +01:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Release exclusive access to the shared SPI bus.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static inline void mrf24j40_spi_unlock(FAR struct spi_dev_s *spi)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
SPI_LOCK(spi,0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_setreg
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the value of an MRF24J40 device register
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-03-15 21:57:13 +01:00
|
|
|
|
static void mrf24j40_setreg(FAR struct spi_dev_s *spi, uint32_t addr,
|
|
|
|
|
uint8_t val)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
uint8_t buf[3];
|
|
|
|
|
int len;
|
2016-02-28 14:48:16 +01:00
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
if (!(addr&0x80000000))
|
|
|
|
|
{
|
|
|
|
|
addr &= 0x3F; /* 6-bit address */
|
|
|
|
|
addr <<= 1;
|
|
|
|
|
addr |= 0x01; /* writing */
|
|
|
|
|
buf[0] = addr;
|
|
|
|
|
len = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
addr &= 0x3FF; /* 10-bit address */
|
|
|
|
|
addr <<= 5;
|
|
|
|
|
addr |= 0x8010; /* writing long */
|
|
|
|
|
buf[0] = (addr >> 8);
|
|
|
|
|
buf[1] = (addr & 0xFF);
|
|
|
|
|
len = 2;
|
|
|
|
|
}
|
2016-02-28 14:48:16 +01:00
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
buf[len++] = val;
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
mrf24j40_spi_lock(spi);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_IEEE802154(0), true);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
SPI_SNDBLOCK(spi, buf, len);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT(spi, SPIDEV_IEEE802154(0), false);
|
2017-04-18 21:34:13 +02:00
|
|
|
|
mrf24j40_spi_unlock(spi);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_getreg
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Return the value of an MRF24J40 device register
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static uint8_t mrf24j40_getreg(FAR struct spi_dev_s *spi, uint32_t addr)
|
|
|
|
|
{
|
|
|
|
|
uint8_t buf[3];
|
|
|
|
|
uint8_t rx[3];
|
|
|
|
|
int len;
|
|
|
|
|
|
|
|
|
|
if (!(addr&0x80000000))
|
|
|
|
|
{
|
|
|
|
|
/* 6-bit address */
|
|
|
|
|
|
|
|
|
|
addr &= 0x3F;
|
|
|
|
|
addr <<= 1;
|
|
|
|
|
buf[0] = addr;
|
|
|
|
|
len = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* 10-bit address */
|
|
|
|
|
|
|
|
|
|
addr &= 0x3FF;
|
|
|
|
|
addr <<= 5;
|
|
|
|
|
addr |= 0x8000;
|
|
|
|
|
buf[0] = (addr >> 8);
|
|
|
|
|
buf[1] = (addr & 0xFF);
|
|
|
|
|
len = 2;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
buf[len++] = 0xFF; /* dummy */
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
mrf24j40_spi_lock (spi);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT (spi, SPIDEV_IEEE802154(0), true);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
SPI_EXCHANGE (spi, buf, rx, len);
|
2017-04-29 20:26:52 +02:00
|
|
|
|
SPI_SELECT (spi, SPIDEV_IEEE802154(0), false);
|
2017-04-18 21:34:13 +02:00
|
|
|
|
mrf24j40_spi_unlock(spi);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-03-15 21:57:13 +01:00
|
|
|
|
/* wlinfo("r[%04X]=%02X\n", addr, rx[len - 1]); */
|
|
|
|
|
return rx[len - 1];
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_resetrfsm
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Reset the RF state machine. Required at boot, after channel change,
|
|
|
|
|
* and probably after PA settings.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2016-06-01 12:12:21 +02:00
|
|
|
|
static int mrf24j40_resetrfsm(FAR struct mrf24j40_radio_s *dev)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
uint8_t reg;
|
|
|
|
|
|
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_RFCTL);
|
|
|
|
|
reg |= 0x04;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RFCTL, reg);
|
|
|
|
|
|
|
|
|
|
reg &= ~0x04;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RFCTL, reg);
|
|
|
|
|
up_udelay(200);
|
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_pacontrol
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Control the external LNA/PA on the MRF24J40MB/MC/MD/ME modules
|
|
|
|
|
* GPIO 1: PA enable
|
|
|
|
|
* GPIO 2: LNA enable
|
|
|
|
|
* GPIO 3: PA power enable (not required on MB)
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2016-06-01 12:12:21 +02:00
|
|
|
|
static int mrf24j40_pacontrol(FAR struct mrf24j40_radio_s *dev, int mode)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
if (!dev->paenabled)
|
|
|
|
|
{
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (mode == MRF24J40_PA_AUTO)
|
|
|
|
|
{
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TRISGPIO, 0x08);
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_GPIO , 0x08);
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TESTMODE, 0x0F);
|
|
|
|
|
}
|
|
|
|
|
else if (mode == MRF24J40_PA_ED)
|
|
|
|
|
{
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TESTMODE, 0x08);
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TRISGPIO, 0x0F);
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_GPIO , 0x0C);
|
|
|
|
|
}
|
|
|
|
|
else if (mode == MRF24J40_PA_SLEEP)
|
|
|
|
|
{
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TESTMODE, 0x08);
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TRISGPIO, 0x0F);
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_GPIO , 0x00);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
mrf24j40_resetrfsm(dev);
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_initialize
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Reset the device and put in in order of operation
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2016-06-01 12:12:21 +02:00
|
|
|
|
static int mrf24j40_initialize(FAR struct mrf24j40_radio_s *dev)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
/* Software reset */
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_SOFTRST , 0x07); /* 00000111 Reset */
|
|
|
|
|
while(mrf24j40_getreg(dev->spi, MRF24J40_SOFTRST) & 0x07);
|
|
|
|
|
|
|
|
|
|
/* Apply recommended settings */
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_PACON2 , 0x98); /* 10011000 Enable FIFO (default), TXONTS=6 (recommended), TXONT<8:7>=0 */
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TXSTBL , 0x95); /* 10010101 set the SIFS period. RFSTBL=9, MSIFS=5, aMinSIFSPeriod=14 (min 12) */
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TXPEND , 0x7C); /* 01111100 set the LIFS period, MLIFS=1Fh=31 aMinLIFSPeriod=40 (min 40) */
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TXTIME , 0x30); /* 00110000 set the turnaround time, TURNTIME=3 aTurnAroundTime=12 */
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RFCON1 , 0x02); /* 00000010 VCO optimization, recommended value */
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RFCON2 , 0x80); /* 10000000 Enable PLL */
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RFCON6 , 0x90); /* 10010000 TX filter enable, fast 20M recovery, No bat monitor*/
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RFCON7 , 0x80); /* 10000000 Sleep clock on internal 100 kHz */
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RFCON8 , 0x10); /* 00010000 VCO control bit, as recommended */
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_SLPCON1, 0x01); /* 00000001 no CLKOUT, default divisor */
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_BBREG6 , 0x40); /* 01000000 Append RSSI to rx packets */
|
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_setrxmode
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Set the RX mode (normal, promiscuous, no CRC)
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2016-06-01 12:12:21 +02:00
|
|
|
|
static int mrf24j40_setrxmode(FAR struct mrf24j40_radio_s *dev, int mode)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
uint8_t reg;
|
2017-03-15 21:57:13 +01:00
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
if (mode < MRF24J40_RXMODE_NORMAL || mode > MRF24J40_RXMODE_NOCRC)
|
|
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
2017-03-15 21:57:13 +01:00
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_RXMCR);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
reg &= ~0x03;
|
|
|
|
|
reg |= mode;
|
|
|
|
|
|
|
|
|
|
/* Set mode options */
|
|
|
|
|
|
|
|
|
|
if (mode != MRF24J40_RXMODE_NORMAL)
|
|
|
|
|
{
|
|
|
|
|
/* Promisc and error modes: Disable auto ACK */
|
2017-03-15 21:57:13 +01:00
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
reg |= MRF24J40_RXMCR_NOACKRSP;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Normal mode : enable auto-ACK */
|
2017-03-15 21:57:13 +01:00
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
reg &= ~MRF24J40_RXMCR_NOACKRSP;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RXMCR, reg);
|
|
|
|
|
|
|
|
|
|
dev->rxmode = mode;
|
2017-03-15 21:37:17 +01:00
|
|
|
|
wlinfo("%u\n", (unsigned)mode);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_setchannel
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the current radio channel the device is operating on.
|
|
|
|
|
* In the 2.4 GHz, there are 16 channels, each 2 MHz wide, 5 MHz spacing:
|
|
|
|
|
* Chan MHz Chan MHz Chan MHz Chan MHz
|
|
|
|
|
* 11 2405 15 2425 19 2445 23 2465
|
|
|
|
|
* 12 2410 16 2430 20 2450 24 2470
|
|
|
|
|
* 13 2415 17 2435 21 2455 25 2475
|
|
|
|
|
* 14 2420 18 2440 22 2460 26 2480
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_setchannel(FAR struct mrf24j40_radio_s *dev, uint8_t chan)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-03-15 21:57:13 +01:00
|
|
|
|
if (chan < 11 || chan > 26)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-03-15 21:37:17 +01:00
|
|
|
|
wlerr("ERROR: Invalid chan: %d\n",chan);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* 15. Set channel – See Section 3.4 “Channel Selection”. */
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RFCON0, (chan - 11) << 4 | 0x03);
|
|
|
|
|
|
|
|
|
|
/* 17. RFCTL (0x36) = 0x04 – Reset RF state machine.
|
|
|
|
|
* 18. RFCTL (0x36) = 0x00.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
mrf24j40_resetrfsm(dev);
|
|
|
|
|
|
|
|
|
|
dev->channel = chan;
|
2017-03-15 21:37:17 +01:00
|
|
|
|
//wlinfo("%u\n", (unsigned)chan);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_getchannel
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Get the channel the device is operating on.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_getchannel(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
FAR uint8_t *chan)
|
|
|
|
|
{
|
2017-04-18 21:34:13 +02:00
|
|
|
|
*chan = dev->channel;
|
2017-05-02 22:42:40 +02:00
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_setpanid
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the PAN ID the device is operating on.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_setpanid(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
uint16_t panid)
|
|
|
|
|
{
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_PANIDH, (uint8_t)(panid>>8));
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_PANIDL, (uint8_t)(panid&0xFF));
|
|
|
|
|
|
2017-05-05 17:15:28 +02:00
|
|
|
|
dev->addr.panid = panid;
|
2017-03-15 21:37:17 +01:00
|
|
|
|
wlinfo("%04X\n", (unsigned)panid);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_getpanid
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the current PAN ID the device is operating on.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_getpanid(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
FAR uint16_t *panid)
|
|
|
|
|
{
|
2017-05-05 17:15:28 +02:00
|
|
|
|
*panid = dev->addr.panid;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_setsaddr
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the device short address. The following addresses are special:
|
|
|
|
|
* FFFEh : Broadcast
|
|
|
|
|
* FFFFh : Unspecified
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_setsaddr(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
uint16_t saddr)
|
|
|
|
|
{
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_SADRH, (uint8_t)(saddr>>8));
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_SADRL, (uint8_t)(saddr&0xFF));
|
|
|
|
|
|
2017-05-05 17:15:28 +02:00
|
|
|
|
dev->addr.saddr = saddr;
|
2017-03-15 21:37:17 +01:00
|
|
|
|
wlinfo("%04X\n", (unsigned)saddr);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_getsaddr
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the current short address the device is using.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_getsaddr(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
FAR uint16_t *saddr)
|
|
|
|
|
{
|
2017-05-05 17:15:28 +02:00
|
|
|
|
*saddr = dev->addr.saddr;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_seteaddr
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the device extended address. The following addresses are special:
|
|
|
|
|
* FFFFFFFFFFFFFFFFh : Unspecified
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_seteaddr(FAR struct mrf24j40_radio_s *dev,
|
2017-05-05 17:15:28 +02:00
|
|
|
|
FAR const uint8_t *eaddr)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
2017-03-15 21:57:13 +01:00
|
|
|
|
for (i = 0; i < 8; i++)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_EADR0 + i, eaddr[i]);
|
2017-05-05 17:15:28 +02:00
|
|
|
|
dev->addr.eaddr[i] = eaddr[i];
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_geteaddr
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the current extended address the device is using.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_geteaddr(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
FAR uint8_t *eaddr)
|
|
|
|
|
{
|
2017-05-05 17:15:28 +02:00
|
|
|
|
memcpy(eaddr, dev->addr.eaddr, 8);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_setdevmode
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the device behaviour: normal end device or coordinator
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_setdevmode(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
uint8_t mode)
|
|
|
|
|
{
|
|
|
|
|
int ret = OK;
|
|
|
|
|
uint8_t reg;
|
|
|
|
|
|
|
|
|
|
/* Disable slotted mode until I decide to implement slotted mode */
|
|
|
|
|
|
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_TXMCR);
|
|
|
|
|
reg &= ~MRF24J40_TXMCR_SLOTTED;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TXMCR, reg);
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_ORDER, 0xFF);
|
|
|
|
|
|
|
|
|
|
/* Define dev mode */
|
|
|
|
|
|
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_RXMCR);
|
|
|
|
|
|
2017-05-05 17:15:28 +02:00
|
|
|
|
if (mode == MRF24J40_MODE_PANCOORD)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
reg |= MRF24J40_RXMCR_PANCOORD;
|
|
|
|
|
reg &= ~MRF24J40_RXMCR_COORD;
|
|
|
|
|
}
|
2017-05-05 17:15:28 +02:00
|
|
|
|
else if (mode == MRF24J40_MODE_COORD)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
reg |= MRF24J40_RXMCR_COORD;
|
|
|
|
|
reg &= ~MRF24J40_RXMCR_PANCOORD;
|
|
|
|
|
}
|
2017-05-05 17:15:28 +02:00
|
|
|
|
else if (mode == MRF24J40_MODE_DEVICE)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
reg &= ~MRF24J40_RXMCR_PANCOORD;
|
|
|
|
|
reg &= ~MRF24J40_RXMCR_COORD;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2017-04-18 22:25:23 +02:00
|
|
|
|
return -EINVAL;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RXMCR, reg);
|
|
|
|
|
dev->devmode = mode;
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_setdevmode
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Return the current device mode
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_getdevmode(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
FAR uint8_t *mode)
|
|
|
|
|
{
|
|
|
|
|
*mode = dev->devmode;
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_settxpower
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the transmit power. Value is passed in mBm, it is rounded to
|
|
|
|
|
* the nearest value. Some MRF modules have a power amplifier, this routine
|
|
|
|
|
* does not care about this. We only change the CHIP output power.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_settxpower(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
int32_t txpwr)
|
|
|
|
|
{
|
|
|
|
|
uint8_t reg;
|
|
|
|
|
int save_txpwr = txpwr;
|
|
|
|
|
|
|
|
|
|
if (txpwr <= -3000 && txpwr > -3630)
|
|
|
|
|
{
|
|
|
|
|
reg = 0xC0;
|
|
|
|
|
txpwr += 3000;
|
|
|
|
|
}
|
|
|
|
|
else if (txpwr <= -2000)
|
|
|
|
|
{
|
|
|
|
|
reg = 0x80;
|
|
|
|
|
txpwr += 2000;
|
|
|
|
|
}
|
|
|
|
|
else if (txpwr <= -1000)
|
|
|
|
|
{
|
|
|
|
|
reg = 0x40;
|
|
|
|
|
txpwr += 1000;
|
|
|
|
|
}
|
|
|
|
|
else if (txpwr <= 0)
|
|
|
|
|
{
|
|
|
|
|
reg = 0x00;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
2017-03-15 21:37:17 +01:00
|
|
|
|
wlinfo("remaining attenuation: %d mBm\n",txpwr);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
switch(txpwr/100)
|
|
|
|
|
{
|
|
|
|
|
case -9:
|
|
|
|
|
case -8:
|
|
|
|
|
case -7:
|
2017-03-15 21:57:13 +01:00
|
|
|
|
case -6:
|
|
|
|
|
reg |= 0x07;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case -5:
|
|
|
|
|
reg |= 0x06;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case -4:
|
|
|
|
|
reg |= 0x05;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case -3:
|
|
|
|
|
reg |= 0x04;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case -2:
|
|
|
|
|
reg |= 0x03;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case -1:
|
|
|
|
|
reg |= 0x02;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0:
|
|
|
|
|
reg |= 0x00; /* value 0x01 is 0.5 db, not used */
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
return -EINVAL;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RFCON3, reg);
|
|
|
|
|
dev->txpower = save_txpwr;
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_gettxpower
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Return the actual transmit power, in mBm.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
static int mrf24j40_gettxpower(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
FAR int32_t *txpwr)
|
|
|
|
|
{
|
|
|
|
|
*txpwr = dev->txpower;
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_setcca
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Define the Clear Channel Assessement method.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_setcca(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
FAR struct ieee802154_cca_s *cca)
|
|
|
|
|
{
|
|
|
|
|
uint8_t mode;
|
|
|
|
|
|
|
|
|
|
if (!cca->use_ed && !cca->use_cs)
|
|
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (cca->use_cs && cca->csth > 0x0f)
|
|
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
mode = mrf24j40_getreg(dev->spi, MRF24J40_BBREG2);
|
|
|
|
|
mode &= 0x03;
|
|
|
|
|
|
|
|
|
|
if (cca->use_ed)
|
|
|
|
|
{
|
|
|
|
|
mode |= MRF24J40_BBREG2_CCAMODE_ED;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_CCAEDTH, cca->edth);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (cca->use_cs)
|
|
|
|
|
{
|
|
|
|
|
mode |= MRF24J40_BBREG2_CCAMODE_CS;
|
|
|
|
|
mode |= cca->csth << 2;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_BBREG2, mode);
|
|
|
|
|
|
|
|
|
|
memcpy(&dev->cca, cca, sizeof(struct ieee802154_cca_s));
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_getcca
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Return the Clear Channel Assessement method.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_getcca(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
FAR struct ieee802154_cca_s *cca)
|
|
|
|
|
{
|
|
|
|
|
memcpy(cca, &dev->cca, sizeof(struct ieee802154_cca_s));
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_regdump
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Display the value of all registers.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2016-06-01 12:12:21 +02:00
|
|
|
|
static int mrf24j40_regdump(FAR struct mrf24j40_radio_s *dev)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
uint32_t i;
|
|
|
|
|
char buf[4+16*3+2+1];
|
2017-03-15 21:57:13 +01:00
|
|
|
|
int len = 0;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-03-15 21:37:17 +01:00
|
|
|
|
wlinfo("Short regs:\n");
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
for (i = 0; i < 0x40; i++)
|
|
|
|
|
{
|
|
|
|
|
if ((i & 15) == 0)
|
|
|
|
|
{
|
|
|
|
|
len=sprintf(buf, "%02x: ",i&0xFF);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
len += sprintf(buf+len, "%02x ", mrf24j40_getreg(dev->spi, i));
|
|
|
|
|
if ((i & 15) == 15)
|
|
|
|
|
{
|
|
|
|
|
sprintf(buf+len, "\n");
|
2017-03-15 21:37:17 +01:00
|
|
|
|
wlinfo("%s", buf);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2017-03-15 21:37:17 +01:00
|
|
|
|
wlinfo("Long regs:\n");
|
2017-03-15 21:57:13 +01:00
|
|
|
|
for (i = 0x80000200; i < 0x80000250; i++)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-03-15 21:57:13 +01:00
|
|
|
|
if ((i & 15) == 0)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
len=sprintf(buf, "%02x: ",i&0xFF);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
len += sprintf(buf+len, "%02x ", mrf24j40_getreg(dev->spi, i));
|
|
|
|
|
if ((i & 15) == 15)
|
|
|
|
|
{
|
|
|
|
|
sprintf(buf+len, "\n");
|
2017-03-15 21:37:17 +01:00
|
|
|
|
wlinfo("%s", buf);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_energydetect
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Measure the RSSI level for the current channel.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
static int mrf24j40_energydetect(FAR struct mrf24j40_radio_s *dev,
|
2016-02-27 01:39:27 +01:00
|
|
|
|
FAR uint8_t *energy)
|
|
|
|
|
{
|
|
|
|
|
uint8_t reg;
|
|
|
|
|
|
|
|
|
|
/* Manually enable the LNA*/
|
|
|
|
|
|
|
|
|
|
mrf24j40_pacontrol(dev, MRF24J40_PA_ED);
|
|
|
|
|
|
|
|
|
|
/* Set RSSI average duration to 8 symbols */
|
|
|
|
|
|
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_TXBCON1);
|
|
|
|
|
reg |= 0x30;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TXBCON1, reg);
|
|
|
|
|
|
|
|
|
|
/* 1. Set RSSIMODE1 0x3E<7> – Initiate RSSI calculation. */
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_BBREG6, 0x80);
|
|
|
|
|
|
|
|
|
|
/* 2. Wait until RSSIRDY 0x3E<0> is set to ‘1’ – RSSI calculation is
|
|
|
|
|
* complete.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
while(!(mrf24j40_getreg(dev->spi, MRF24J40_BBREG6) & 0x01));
|
|
|
|
|
|
|
|
|
|
/* 3. Read RSSI 0x210<7:0> – The RSSI register contains the averaged RSSI
|
|
|
|
|
* received power level for 8 symbol periods.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
*energy = mrf24j40_getreg(dev->spi, MRF24J40_RSSI);
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_BBREG6, 0x40);
|
|
|
|
|
|
|
|
|
|
/* Back to automatic control */
|
|
|
|
|
|
|
|
|
|
mrf24j40_pacontrol(dev, MRF24J40_PA_AUTO);
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_csma_setup
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Setup a CSMA transaction in the normal TX FIFO
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static int mrf24j40_csma_setup(FAR struct mrf24j40_radio_s *dev,
|
2017-05-02 15:12:56 +02:00
|
|
|
|
FAR struct iob_s *frame)
|
2017-04-19 22:34:34 +02:00
|
|
|
|
{
|
2017-04-19 22:52:45 +02:00
|
|
|
|
uint8_t reg;
|
|
|
|
|
int ret;
|
2017-04-19 22:34:34 +02:00
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
/* Enable tx int */
|
|
|
|
|
|
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
|
|
|
|
|
reg &= ~MRF24J40_INTCON_TXNIE;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
|
2016-06-12 03:03:57 +02:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
/* Setup the FIFO */
|
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
ret = mrf24j40_setup_fifo(dev, frame, MRF24J40_TXNORM_FIFO);
|
2017-04-19 22:34:34 +02:00
|
|
|
|
|
|
|
|
|
/* If the frame control field contains
|
|
|
|
|
* an acknowledgment request, set the TXNACKREQ bit.
|
|
|
|
|
* See IEEE 802.15.4/2003 7.2.1.1 page 112 for info.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
reg = MRF24J40_TXNCON_TXNTRIG;
|
2017-05-02 15:12:56 +02:00
|
|
|
|
if (frame->io_data[0] & IEEE802154_FRAMECTRL_ACKREQ)
|
2017-04-19 22:34:34 +02:00
|
|
|
|
{
|
|
|
|
|
reg |= MRF24J40_TXNCON_TXNACKREQ;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Trigger packet emission */
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_TXNCON, reg);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_gts_setup
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
2017-05-02 22:42:40 +02:00
|
|
|
|
* Setup a GTS transaction in one of the GTS FIFOs
|
2017-04-19 22:34:34 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static int mrf24j40_gts_setup(FAR struct mrf24j40_radio_s *dev, uint8_t fifo,
|
2017-05-02 15:12:56 +02:00
|
|
|
|
FAR struct iob_s *frame)
|
2017-04-19 22:34:34 +02:00
|
|
|
|
{
|
|
|
|
|
return -ENOTTY;
|
|
|
|
|
}
|
|
|
|
|
|
2017-04-19 22:52:45 +02:00
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_setup_fifo
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
static int mrf24j40_setup_fifo(FAR struct mrf24j40_radio_s *dev,
|
2017-05-02 15:12:56 +02:00
|
|
|
|
FAR struct iob_s *frame, uint32_t fifo_addr)
|
2017-04-19 22:34:34 +02:00
|
|
|
|
{
|
|
|
|
|
int ret;
|
|
|
|
|
int hlen = 3; /* Include frame control and seq number */
|
|
|
|
|
uint16_t frame_ctrl;
|
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
/* Analyze frame control to compute header length */
|
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
frame_ctrl = frame->io_data[0];
|
|
|
|
|
frame_ctrl |= (frame->io_data[1] << 8);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-03-24 16:10:35 +01:00
|
|
|
|
if ((frame_ctrl & IEEE802154_FRAMECTRL_DADDR)== IEEE802154_ADDRMODE_SHORT)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
hlen += 2 + 2; /* Destination PAN + shortaddr */
|
|
|
|
|
}
|
2017-03-24 16:10:35 +01:00
|
|
|
|
else if ((frame_ctrl & IEEE802154_FRAMECTRL_DADDR) == IEEE802154_ADDRMODE_EXTENDED)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
hlen += 2 + 8; /* Destination PAN + extaddr */
|
|
|
|
|
}
|
|
|
|
|
|
2017-03-29 18:39:52 +02:00
|
|
|
|
if (!(frame_ctrl & IEEE802154_FRAMECTRL_PANIDCOMP))
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-03-24 16:10:35 +01:00
|
|
|
|
hlen += 2; /* No PAN compression, source PAN is different from dest PAN */
|
|
|
|
|
}
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-03-24 16:10:35 +01:00
|
|
|
|
if ((frame_ctrl & IEEE802154_FRAMECTRL_SADDR)== IEEE802154_ADDRMODE_SHORT)
|
|
|
|
|
{
|
2016-02-27 01:39:27 +01:00
|
|
|
|
hlen += 2; /* Source saddr */
|
|
|
|
|
}
|
2017-03-24 16:10:35 +01:00
|
|
|
|
else if ((frame_ctrl & IEEE802154_FRAMECTRL_SADDR) == IEEE802154_ADDRMODE_EXTENDED)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
|
|
|
|
hlen += 8; /* Ext saddr */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Header len, 0, TODO for security modes */
|
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
mrf24j40_setreg(dev->spi, fifo_addr++, hlen);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
/* Frame length */
|
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
mrf24j40_setreg(dev->spi, fifo_addr++, frame->io_len);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
/* Frame data */
|
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
for (ret = 0; ret < frame->io_len; ret++) /* this sets the correct val for ret */
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-05-02 15:12:56 +02:00
|
|
|
|
mrf24j40_setreg(dev->spi, fifo_addr++, frame->io_data[ret]);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
2017-05-02 22:42:40 +02:00
|
|
|
|
|
2017-04-15 19:20:33 +02:00
|
|
|
|
return ret;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
2017-04-18 21:34:13 +02:00
|
|
|
|
/****************************************************************************
|
2017-04-19 22:34:34 +02:00
|
|
|
|
* Name: mrf24j40_irqwork_txnorm
|
2017-04-18 21:34:13 +02:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
2017-04-19 22:34:34 +02:00
|
|
|
|
* Manage completion of packet transmission.
|
2017-04-18 21:34:13 +02:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
static void mrf24j40_irqwork_txnorm(FAR struct mrf24j40_radio_s *dev)
|
2017-04-18 21:34:13 +02:00
|
|
|
|
{
|
2017-04-19 22:34:34 +02:00
|
|
|
|
uint8_t txstat;
|
2017-04-18 21:34:13 +02:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
/* Disable tx int */
|
2017-04-18 21:34:13 +02:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
txstat = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
|
|
|
|
|
txstat |= MRF24J40_INTCON_TXNIE;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_INTCON, txstat);
|
|
|
|
|
|
|
|
|
|
/* Get the status from the device and copy the status into the tx desc.
|
|
|
|
|
* The status for the normal FIFO is represented with bit TXNSTAT where
|
2017-04-19 22:52:45 +02:00
|
|
|
|
* 0=success, 1= failure.
|
|
|
|
|
*/
|
2017-04-19 22:34:34 +02:00
|
|
|
|
|
|
|
|
|
txstat = mrf24j40_getreg(dev->spi, MRF24J40_TXSTAT);
|
|
|
|
|
dev->csma_desc.pub.status = txstat & MRF24J40_TXSTAT_TXNSTAT;
|
|
|
|
|
|
|
|
|
|
/* Inform the next layer of the transmission success/failure */
|
|
|
|
|
|
2017-04-21 20:57:15 +02:00
|
|
|
|
dev->radiocb->txdone(dev->radiocb, &dev->csma_desc.pub);
|
2017-04-19 22:34:34 +02:00
|
|
|
|
|
|
|
|
|
/* We are now done with the transaction */
|
|
|
|
|
|
|
|
|
|
dev->csma_desc.busy = 0;
|
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
/* Free the IOB */
|
|
|
|
|
|
|
|
|
|
iob_free(dev->csma_frame);
|
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
mrf24j40_dopoll_csma(dev);
|
2017-04-18 21:34:13 +02:00
|
|
|
|
}
|
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
/****************************************************************************
|
2017-04-19 22:34:34 +02:00
|
|
|
|
* Name: mrf24j40_irqwork_gts
|
2016-02-27 01:39:27 +01:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Manage completion of packet transmission.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
static void mrf24j40_irqwork_txgts(FAR struct mrf24j40_radio_s *dev,
|
|
|
|
|
uint8_t gts)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2016-02-27 14:27:45 +01:00
|
|
|
|
uint8_t txstat;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
/* Disable tx int */
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
txstat = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
|
|
|
|
|
txstat |= MRF24J40_INTCON_TXNIE;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_INTCON, txstat);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
/* Get the status from the device and copy the status into the tx desc.
|
|
|
|
|
* The status for the normal FIFO is represented with bit TXNSTAT where
|
2017-04-19 22:52:45 +02:00
|
|
|
|
* 0=success, 1= failure.
|
|
|
|
|
*/
|
2017-03-15 21:57:13 +01:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
txstat = mrf24j40_getreg(dev->spi, MRF24J40_TXSTAT);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
if (gts == 0)
|
|
|
|
|
{
|
|
|
|
|
dev->csma_desc.pub.status = txstat & MRF24J40_TXSTAT_TXG1STAT;
|
|
|
|
|
}
|
|
|
|
|
else if (gts == 1)
|
|
|
|
|
{
|
|
|
|
|
dev->csma_desc.pub.status = txstat & MRF24J40_TXSTAT_TXG2STAT;
|
|
|
|
|
}
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
/* Inform the next layer of the transmission success/failure */
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-21 20:57:15 +02:00
|
|
|
|
dev->radiocb->txdone(dev->radiocb, &dev->gts_desc[gts].pub);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
/* We are now done with the transaction */
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
dev->gts_desc[gts].busy = 0;
|
2017-04-15 19:20:33 +02:00
|
|
|
|
|
2017-05-02 15:12:56 +02:00
|
|
|
|
/* Free the IOB */
|
|
|
|
|
|
|
|
|
|
iob_free(dev->gts_frame[gts]);
|
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
mrf24j40_dopoll_gts(dev);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
2016-06-01 12:12:21 +02:00
|
|
|
|
* Name: mrf24j40_rxenable
|
2016-02-27 01:39:27 +01:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
2017-05-04 03:49:59 +02:00
|
|
|
|
* Enable/Disable receiver.
|
2016-02-27 01:39:27 +01:00
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-05-04 03:49:59 +02:00
|
|
|
|
static int mrf24j40_rxenable(FAR struct ieee802154_radio_s *radio, bool enable)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-04-15 19:20:33 +02:00
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)radio;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
uint8_t reg;
|
2016-06-12 03:03:57 +02:00
|
|
|
|
|
2017-05-04 03:49:59 +02:00
|
|
|
|
if (enable)
|
|
|
|
|
{
|
|
|
|
|
/* Enable rx int */
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-05-04 03:49:59 +02:00
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
|
|
|
|
|
reg &= ~MRF24J40_INTCON_RXIE;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Disable rx int */
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-05-04 03:49:59 +02:00
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
|
|
|
|
|
reg |= MRF24J40_INTCON_RXIE;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
|
|
|
|
|
}
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_irqwork_rx
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Manage packet reception.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2016-06-01 12:12:21 +02:00
|
|
|
|
static void mrf24j40_irqwork_rx(FAR struct mrf24j40_radio_s *dev)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-05-05 23:12:26 +02:00
|
|
|
|
FAR struct ieee802154_data_ind_s *ind;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
uint32_t addr;
|
|
|
|
|
uint32_t index;
|
|
|
|
|
uint8_t reg;
|
|
|
|
|
|
|
|
|
|
/* Disable rx int */
|
|
|
|
|
|
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
|
|
|
|
|
reg |= MRF24J40_INTCON_RXIE;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
|
|
|
|
|
|
2017-05-04 03:49:59 +02:00
|
|
|
|
/* Disable packet reception. See pg. 109 of datasheet */
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_BBREG1, MRF24J40_BBREG1_RXDECINV);
|
|
|
|
|
|
2017-05-05 23:12:26 +02:00
|
|
|
|
/* Allocate a data_ind to put the frame in */
|
2017-04-21 19:06:18 +02:00
|
|
|
|
|
2017-05-05 23:12:26 +02:00
|
|
|
|
ind = ieee802154_ind_allocate();
|
|
|
|
|
if (ind == NULL)
|
|
|
|
|
{
|
|
|
|
|
wlerr("ERROR: Unable to allocate data_ind. Discarding frame");
|
|
|
|
|
goto done;
|
|
|
|
|
}
|
2017-04-21 19:06:18 +02:00
|
|
|
|
|
2016-02-27 01:39:27 +01:00
|
|
|
|
/* Read packet */
|
|
|
|
|
|
2016-06-01 12:12:21 +02:00
|
|
|
|
addr = MRF24J40_RXBUF_BASE;
|
2017-04-21 19:06:18 +02:00
|
|
|
|
|
2017-05-05 23:12:26 +02:00
|
|
|
|
ind->frame->io_len= mrf24j40_getreg(dev->spi, addr++);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-21 19:06:18 +02:00
|
|
|
|
/* TODO: This needs to be changed. It is inefficient to do the SPI read byte
|
|
|
|
|
* by byte */
|
|
|
|
|
|
2017-05-05 23:12:26 +02:00
|
|
|
|
for (index = 0; index < ind->frame->io_len; index++)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-05-05 23:12:26 +02:00
|
|
|
|
ind->frame->io_data[index] = mrf24j40_getreg(dev->spi, addr++);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
2017-05-05 23:12:26 +02:00
|
|
|
|
ind->lqi = mrf24j40_getreg(dev->spi, addr++);
|
|
|
|
|
ind->rssi = mrf24j40_getreg(dev->spi, addr++);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-04-18 22:25:23 +02:00
|
|
|
|
/* Reduce len by 2, we only receive frames with correct crc, no check
|
|
|
|
|
* required.
|
|
|
|
|
*/
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-05-05 23:12:26 +02:00
|
|
|
|
ind->frame->io_len -= 2;
|
2017-04-21 19:06:18 +02:00
|
|
|
|
|
|
|
|
|
/* Callback the receiver in the next highest layer */
|
|
|
|
|
|
2017-05-05 23:12:26 +02:00
|
|
|
|
dev->radiocb->rxframe(dev->radiocb, ind);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-05-05 23:12:26 +02:00
|
|
|
|
done:
|
2016-02-27 01:39:27 +01:00
|
|
|
|
/* Enable reception of next packet by flushing the fifo.
|
|
|
|
|
* This is an MRF24J40 errata (no. 1).
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_RXFLUSH, 1);
|
|
|
|
|
|
|
|
|
|
/* Enable packet reception */
|
|
|
|
|
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_BBREG1, 0);
|
|
|
|
|
|
2017-05-04 03:49:59 +02:00
|
|
|
|
/* Enable rx int */
|
|
|
|
|
|
|
|
|
|
reg = mrf24j40_getreg(dev->spi, MRF24J40_INTCON);
|
|
|
|
|
reg &= ~MRF24J40_INTCON_RXIE;
|
|
|
|
|
mrf24j40_setreg(dev->spi, MRF24J40_INTCON, reg);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_irqworker
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Perform interrupt handling logic outside of the interrupt handler (on
|
|
|
|
|
* the work queue thread).
|
|
|
|
|
*
|
|
|
|
|
* Parameters:
|
|
|
|
|
* arg - The reference to the driver structure (cast to void*)
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* None
|
|
|
|
|
*
|
|
|
|
|
* Assumptions:
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
static void mrf24j40_irqworker(FAR void *arg)
|
|
|
|
|
{
|
2016-06-01 12:12:21 +02:00
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)arg;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
uint8_t intstat;
|
|
|
|
|
|
|
|
|
|
DEBUGASSERT(dev);
|
|
|
|
|
DEBUGASSERT(dev->spi);
|
|
|
|
|
|
|
|
|
|
/* Read and store INTSTAT - this clears the register. */
|
|
|
|
|
|
|
|
|
|
intstat = mrf24j40_getreg(dev->spi, MRF24J40_INTSTAT);
|
2017-03-15 21:57:13 +01:00
|
|
|
|
//wlinfo("INT%02X\n", intstat);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
/* Do work according to the pending interrupts */
|
|
|
|
|
|
|
|
|
|
if ((intstat & MRF24J40_INTSTAT_RXIF))
|
|
|
|
|
{
|
|
|
|
|
/* A packet was received, retrieve it */
|
|
|
|
|
|
|
|
|
|
mrf24j40_irqwork_rx(dev);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((intstat & MRF24J40_INTSTAT_TXNIF))
|
|
|
|
|
{
|
|
|
|
|
/* A packet was transmitted or failed*/
|
|
|
|
|
|
2017-04-19 22:34:34 +02:00
|
|
|
|
mrf24j40_irqwork_txnorm(dev);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((intstat & MRF24J40_INTSTAT_TXG1IF))
|
|
|
|
|
{
|
|
|
|
|
/* A packet was transmitted or failed*/
|
|
|
|
|
|
|
|
|
|
mrf24j40_irqwork_txgts(dev, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((intstat & MRF24J40_INTSTAT_TXG1IF))
|
|
|
|
|
{
|
|
|
|
|
/* A packet was transmitted or failed*/
|
|
|
|
|
|
|
|
|
|
mrf24j40_irqwork_txgts(dev, 1);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
2017-03-27 18:48:58 +02:00
|
|
|
|
/* Re-enable GPIO interrupts */
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-03-27 18:48:58 +02:00
|
|
|
|
dev->lower->enable(dev->lower, true);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Name: mrf24j40_interrupt
|
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Hardware interrupt handler
|
|
|
|
|
*
|
|
|
|
|
* Parameters:
|
|
|
|
|
* irq - Number of the IRQ that generated the interrupt
|
|
|
|
|
* context - Interrupt register state save info (architecture-specific)
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* OK on success
|
|
|
|
|
*
|
|
|
|
|
* Assumptions:
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2017-03-24 20:49:17 +01:00
|
|
|
|
static int mrf24j40_interrupt(int irq, FAR void *context, FAR void *arg)
|
2016-02-27 01:39:27 +01:00
|
|
|
|
{
|
2017-03-27 18:48:58 +02:00
|
|
|
|
FAR struct mrf24j40_radio_s *dev = (FAR struct mrf24j40_radio_s *)arg;
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
2017-03-27 18:48:58 +02:00
|
|
|
|
DEBUGASSERT(dev != NULL);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
|
|
|
|
|
/* In complex environments, we cannot do SPI transfers from the interrupt
|
|
|
|
|
* handler because semaphores are probably used to lock the SPI bus. In
|
|
|
|
|
* this case, we will defer processing to the worker thread. This is also
|
|
|
|
|
* much kinder in the use of system resources and is, therefore, probably
|
|
|
|
|
* a good thing to do in any event.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
DEBUGASSERT(work_available(&dev->irqwork));
|
|
|
|
|
|
|
|
|
|
/* Notice that further GPIO interrupts are disabled until the work is
|
|
|
|
|
* actually performed. This is to prevent overrun of the worker thread.
|
|
|
|
|
* Interrupts are re-enabled in enc_irqworker() when the work is completed.
|
|
|
|
|
*/
|
|
|
|
|
|
2017-03-27 18:48:58 +02:00
|
|
|
|
dev->lower->enable(dev->lower, false);
|
2016-02-27 01:39:27 +01:00
|
|
|
|
return work_queue(HPWORK, &dev->irqwork, mrf24j40_irqworker, (FAR void *)dev, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
|
* Public Functions
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
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* Name: mrf24j40_init
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*
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* Description:
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* Return an mrf24j40 device for use by other drivers.
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*
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****************************************************************************/
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2016-06-01 12:12:21 +02:00
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FAR struct ieee802154_radio_s *mrf24j40_init(FAR struct spi_dev_s *spi,
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2017-04-15 19:20:33 +02:00
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FAR const struct mrf24j40_lower_s *lower)
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2016-02-27 01:39:27 +01:00
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{
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2016-06-01 12:12:21 +02:00
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FAR struct mrf24j40_radio_s *dev;
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2016-02-27 01:39:27 +01:00
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struct ieee802154_cca_s cca;
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2016-06-01 12:12:21 +02:00
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dev = kmm_zalloc(sizeof(struct mrf24j40_radio_s));
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2017-03-15 21:57:13 +01:00
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if (dev == NULL)
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2016-02-27 01:39:27 +01:00
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{
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return NULL;
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}
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2017-05-02 22:42:40 +02:00
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2017-03-27 18:48:58 +02:00
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/* Attach irq */
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2016-02-27 01:39:27 +01:00
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2017-03-27 18:48:58 +02:00
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if (lower->attach(lower, mrf24j40_interrupt, dev) != OK)
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2016-02-27 01:39:27 +01:00
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{
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#if 0
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free(dev);
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#endif
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return NULL;
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}
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2017-05-01 15:27:40 +02:00
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/* Allow exclusive access to the privmac struct */
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sem_init(&dev->exclsem, 0, 1);
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2017-04-15 19:20:33 +02:00
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dev->radio.ops = &mrf24j40_devops;
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2016-11-03 18:00:47 +01:00
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2016-02-27 01:39:27 +01:00
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dev->lower = lower;
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dev->spi = spi;
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2016-06-12 03:03:57 +02:00
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2016-02-27 01:39:27 +01:00
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mrf24j40_initialize(dev);
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2017-04-17 17:27:14 +02:00
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mrf24j40_setchannel(dev, 11);
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mrf24j40_setpanid (dev, 0xFFFF);
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mrf24j40_setsaddr (dev, 0xFFFF);
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mrf24j40_seteaddr (dev, (uint8_t*)"\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF");
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2016-02-27 01:39:27 +01:00
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/* Default device params */
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cca.use_ed = 1;
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cca.use_cs = 0;
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cca.edth = 0x60; /* CCA mode ED, no carrier sense, recommenced ED threshold -69 dBm */
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2017-04-17 17:27:14 +02:00
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mrf24j40_setcca(dev, &cca);
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2016-02-27 01:39:27 +01:00
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mrf24j40_setrxmode(dev, MRF24J40_RXMODE_NORMAL);
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2017-04-17 17:27:14 +02:00
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mrf24j40_settxpower(dev, 0); /*16. Set transmitter power .*/
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2016-02-27 01:39:27 +01:00
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mrf24j40_pacontrol(dev, MRF24J40_PA_AUTO);
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2017-04-17 17:27:14 +02:00
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dev->lower->enable(dev->lower, true);
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2017-04-15 19:20:33 +02:00
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return &dev->radio;
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2016-02-27 01:39:27 +01:00
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}
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