2016-05-18 21:33:17 +02:00
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README
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======
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This README discusses issues unique to NuttX configurations for the
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STM32F103C8T6 Minimum System Development Board for ARM Microcontroller.
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2017-02-23 17:57:21 +01:00
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Contents
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========
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- STM32F103C8T6 Minimum System Development Boards:
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- LEDs
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- UARTs
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- Timer Inputs/Outputs
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- Using 128KiB of Flash instead of 64KiB
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2017-11-29 14:06:26 +01:00
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- Nintendo Wii Nunchuck
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2017-02-23 17:57:21 +01:00
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- Quadrature Encoder
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2017-03-02 16:36:05 +01:00
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- SDCard support
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2017-08-06 18:38:55 +02:00
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- SPI NOR Flash
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2017-05-26 15:48:11 +02:00
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- Nokia 5110 LCD Display support
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2017-03-02 16:36:05 +01:00
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- USB Console support
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2017-02-23 17:57:21 +01:00
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- STM32F103 Minimum - specific Configuration Options
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- Configurations
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STM32F103C8T6 Minimum System Development Boards:
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================================================
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2016-05-18 21:33:17 +02:00
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2017-02-23 17:57:21 +01:00
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This STM32F103C8T6 minimum system development board is available from
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several vendors on the net, and may be sold under different names or
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no name at all. It is based on a STM32F103C8T6 and has a DIP-40 form-
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factor.
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2016-05-19 15:25:52 +02:00
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2018-08-07 14:28:46 +02:00
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There are four versions of very similar boards: Red, Blue, RoboDyn Black and
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Black.
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See: https://wiki.stm32duino.com/index.php?title=Blue_Pill
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https://wiki.stm32duino.com/index.php?title=Red_Pill
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https://wiki.stm32duino.com/index.php?title=RobotDyn_Black_Pill
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https://wiki.stm32duino.com/index.php?title=Black_Pill
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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The Red Board:
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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Good things about the red board:
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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- 1.5k pull up resistor on the PA12 pin (USB D+) which you can
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programatically drag down for automated USB reset.
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- large power capacitors and LDO power.
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2018-08-07 14:28:46 +02:00
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- User LED on PC13
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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Problems with the red board:
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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- Silk screen is barely readable, the text is chopped off on some of
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the pins
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- USB connector only has two anchor points and it is directly soldered
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on the surface
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- Small reset button with hardly any resistance
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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The Blue Board:
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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Good things about the blue board:
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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- Four soldered anchor point on the USB connector. What you can't tell
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2018-03-17 19:49:10 +01:00
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from this picture is that there is a notch in the PCB board and the USB
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2017-02-23 17:57:21 +01:00
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connector sits down inside it some. This provides some lateral stability
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that takes some of the stress off the solder points.
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- It has nice clear readable silkscreen printing.
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- It also a larger reset button.
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2018-08-07 14:28:46 +02:00
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- User LED on PC13
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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Problems with the blue board:
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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- Probably won't work as a USB device if it has a 10k pull-up on PA12. You
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have to check the pull up on PA12 (USB D+). If it has a 10k pull-up
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resistor, you will need to replace it with a 1.5k one to use the native
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USB.
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- Puny voltage regulator probably 100mA.
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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A schematic for the blue board is available here:
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http://www.stm32duino.com/download/file.php?id=276
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2016-05-19 15:25:52 +02:00
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2018-08-07 14:28:46 +02:00
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The Black Board:
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- User LED is on PB12.
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- Mounting holes.
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2017-02-23 17:57:21 +01:00
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Both Boards:
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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Nice features common to both:
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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- SWD pins broken out and easily connected (VCC, GND, SWDIO, SWCLK)
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- USB 5V is broken out with easy access.
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- Power LED
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- You can probably use more flash (128k) than officially documented for
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the chip (stm32f103c8t6 64k), I was able to load 115k of flash on mine
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and it seemed to work.
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2016-05-19 15:25:52 +02:00
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2017-02-23 17:57:21 +01:00
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Problems with both boards:
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2016-05-19 15:25:52 +02:00
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2018-08-07 14:28:46 +02:00
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- No preloaded bootloader (this isn't really a problem as the
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entire 64k of flash is available for use)
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2017-02-23 17:57:21 +01:00
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- No user button
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This is the board pinout based on its form-factor for the Blue board:
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2016-05-19 15:25:52 +02:00
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USB
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___
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-----/ _ \-----
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|B12 GND|
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|B13 GND|
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|B14 3.3V|
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|B15 RST|
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|A8 B11|
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|A9 B10|
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|A10 B1|
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|A11 B0|
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|A12 A7|
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|A15 A6|
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|B3 A5|
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|B4 A4|
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|B5 A3|
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|B6 A2|
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|B7 A1|
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|B8 A0|
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|B9 C15|
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|5V C14|
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|GND C13|
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|3.3V VB|
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|_____________|
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2016-05-18 21:33:17 +02:00
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LEDs
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====
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2017-02-23 17:57:21 +01:00
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The STM32F103 Minimum board has only one software controllable LED.
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This LED can be used by the board port when CONFIG_ARCH_LEDS option is
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enabled.
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2016-05-18 21:33:17 +02:00
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2017-02-23 17:57:21 +01:00
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If enabled the LED is simply turned on when the board boots
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2018-03-17 19:49:10 +01:00
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successfully, and is blinking on panic / assertion failed.
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2016-05-18 21:33:17 +02:00
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UARTs
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=====
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2016-05-19 15:25:52 +02:00
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UART/USART PINS
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---------------
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USART1
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RX PA10
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TX PA9
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USART2
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CK PA4
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CTS PA0
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RTS PA1
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RX PA3
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TX PA2
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USART3
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CK PB12
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CTS PB13
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RTS PB14
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RX PB11
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TX PB10
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2016-05-18 21:33:17 +02:00
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Default USART/UART Configuration
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--------------------------------
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2017-02-23 17:57:21 +01:00
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USART1 (RX & TX only) is available through pins PA9 (TX) and PA10 (RX).
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2016-05-18 21:33:17 +02:00
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Timer Inputs/Outputs
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====================
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2016-05-19 15:25:52 +02:00
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TIM1
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CH1 PA8
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CH2 PA9*
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CH3 PA10*
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CH4 PA11*
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TIM2
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CH1 PA0*, PA15, PA5
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CH2 PA1, PB3
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CH3 PA2, PB10*
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CH4 PA3, PB11
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TIM3
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CH1 PA6, PB4
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CH2 PA7, PB5*
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CH3 PB0
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CH4 PB1*
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TIM4
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CH1 PB6*
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CH2 PB7
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CH3 PB8
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CH4 PB9*
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2016-05-18 21:33:17 +02:00
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* Indicates pins that have other on-board functions and should be used only
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with care (See board datasheet).
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2016-05-21 01:14:19 +02:00
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Using 128KiB of Flash instead of 64KiB
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======================================
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2017-02-23 17:57:21 +01:00
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Some people figured out that the STM32F103C8T6 has 128KiB of internal memory
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instead of 64KiB as documented in the datasheet and reported by its internal
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register.
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In order to enable 128KiB you need modify the linker script to reflect this
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2019-08-05 15:13:48 +02:00
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new size. Open the boards/stm32f103-minimum/scripts/ld.script and replace:
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2017-02-23 17:57:21 +01:00
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flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
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with
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flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
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Enable many NuttX features (ie. many filesystems and applications) to get a
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large binary image with more than 64K.
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We will use OpenOCD to write the firmware in the STM32F103C8T6 Flash. Use a
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up to dated OpenOCD version (ie. openocd-0.9).
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You will need to create a copy of original openocd/scripts/target/stm32f1x.cfg
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to openocd/scripts/target/stm32f103c8t6.cfg and edit the later file replacing:
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flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
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with
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flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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We will use OpenOCD with STLink-V2 programmer, but it will work with other
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programmers (JLink, Versaloon, or some based on FTDI FT232, etc).
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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Open a terminal and execute:
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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$ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f103c8t6.cfg
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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Now in other terminal execute:
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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$ telnet localhost 4444
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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Trying 127.0.0.1...
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Connected to localhost.
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Escape character is '^]'.
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Open On-Chip Debugger
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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> reset halt
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stm32f1x.cpu: target state: halted
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target halted due to debug-request, current mode: Thread
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xPSR: 0x01000000 pc: 0x080003ac msp: 0x20000d78
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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> flash write_image erase nuttx.bin 0x08000000
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auto erase enabled
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device id = 0x20036410
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ignoring flash probed value, using configured bank size
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flash size = 128kbytes
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stm32f1x.cpu: target state: halted
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target halted due to breakpoint, current mode: Thread
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xPSR: 0x61000000 pc: 0x2000003a msp: 0x20000d78
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wrote 92160 bytes from file nuttx.bin in 4.942194s (18.211 KiB/s)
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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> reset run
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> exit
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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Now NuttX should start normally.
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2016-05-21 01:14:19 +02:00
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2017-11-29 14:06:26 +01:00
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Nintendo Wii Nunchuck:
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======================
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There is a driver on NuttX to support Nintendo Wii Nunchuck Joystick. If you
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want to use it please select these options:
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- Enable the I2C1 at System Type -> STM32 Peripheral Support, it will enable:
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CONFIG_STM32_I2C1=y
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- Enable to Custom board/driver initialization at RTOS Features -> RTOS hooks
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2019-02-18 22:32:00 +01:00
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CONFIG_BOARD_LATE_INITIALIZE=y
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2017-11-29 14:06:26 +01:00
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- Enable the I2C Driver Support at Device Drivers, it will enable this symbol:
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CONFIG_I2C=y
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- Nintendo Wii Nunchuck Joystick at Device Drivers -> [*] Input Device Support
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CONFIG_INPUT=y
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CONFIG_INPUT_NUNCHUCK=y
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- Enable the Nunchuck joystick example at Application Configuration -> Examples
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CONFIG_EXAMPLES_NUNCHUCK=y
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CONFIG_EXAMPLES_NUNCHUCK_DEVNAME="/dev/nunchuck0"
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You need to connect GND and +3.3V pins from Nunchuck connector to GND and 3.3V
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of stm32f103-minimum respectively (Nunchuck also can work connected to 5V, but
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I don't recommend it). Connect I2C Clock from Nunchuck to SCK (PB6) and the
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I2C Data to SDA (PB7).
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2017-02-23 17:57:21 +01:00
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Quadrature Encoder:
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===================
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2016-05-21 01:14:19 +02:00
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2018-03-17 19:49:10 +01:00
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The nsh configuration has been used to test the Quadrature Encoder
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2017-02-23 17:57:21 +01:00
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(QEncoder, QE) with the following modifications to the configuration
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file:
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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- These setting enable support for the common QEncode upper half driver:
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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CONFIG_SENSORS=y
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2017-08-24 18:26:53 +02:00
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CONFIG_SENSORS_QENCODER=y
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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- This is a board setting that selected timer 4 for use with the
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quadrature encode:
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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CONFIG_STM32F103MINIMUM_QETIMER=4
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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- These settings enable the STM32 Quadrature encoder on timer 4:
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2016-05-21 01:14:19 +02:00
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2017-02-23 17:57:21 +01:00
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CONFIG_STM32_TIM4_CAP=y
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CONFIG_STM32_TIM4_QE=y
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|
CONFIG_STM32_TIM4_QECLKOUT=2800000
|
|
|
|
CONFIG_STM32_QENCODER_FILTER=y
|
|
|
|
CONFIG_STM32_QENCODER_SAMPLE_EVENT_6=y
|
|
|
|
CONFIG_STM32_QENCODER_SAMPLE_FDTS_4=y
|
2016-05-21 01:14:19 +02:00
|
|
|
|
2017-02-23 17:57:21 +01:00
|
|
|
- These settings enable the test case at apps/examples/qencoder:
|
2016-05-21 01:14:19 +02:00
|
|
|
|
2017-02-23 17:57:21 +01:00
|
|
|
CONFIG_EXAMPLES_QENCODER=y
|
|
|
|
CONFIG_EXAMPLES_QENCODER_DELAY=100
|
|
|
|
CONFIG_EXAMPLES_QENCODER_DEVPATH="/dev/qe0"
|
2016-05-21 01:14:19 +02:00
|
|
|
|
2017-02-23 18:02:06 +01:00
|
|
|
In this configuration, the QEncoder inputs will be on the TIM4 inputs of
|
|
|
|
PB6 and PB7.
|
|
|
|
|
2017-08-06 18:38:55 +02:00
|
|
|
SPI NOR Flash support:
|
|
|
|
======================
|
|
|
|
|
|
|
|
We can use an extern SPI NOR Flash with STM32F103-Minimum board. In this case
|
|
|
|
we tested the Winboard W25Q32FV (32Mbit = 4MiB).
|
|
|
|
|
|
|
|
You can connect the W25Q32FV module in the STM32F103 Minimum board this way:
|
|
|
|
connect PA5 (SPI1 CLK) to CLK; PA7 (SPI1 MOSI) to DI; PA6 (SPI MISO) to DO;
|
|
|
|
PA4 to /CS; Also connect 3.3V to VCC and GND to GND.
|
|
|
|
|
|
|
|
You can start with default "stm32f103-minimum/nsh" configuration option and
|
2017-08-06 20:14:29 +02:00
|
|
|
enable/disable these options using "make menuconfig" :
|
2017-08-06 18:38:55 +02:00
|
|
|
|
|
|
|
System Type --->
|
|
|
|
STM32 Peripheral Support --->
|
|
|
|
[*] SPI1
|
|
|
|
|
|
|
|
Board Selection --->
|
|
|
|
[*] MTD driver for external 4Mbyte W25Q32FV FLASH on SPI1
|
|
|
|
(0) Minor number for the FLASH /dev/smart entry
|
|
|
|
[*] Enable partition support on FLASH
|
|
|
|
(1024,1024,1024,1024) Flash partition size list
|
|
|
|
|
2017-08-06 20:14:29 +02:00
|
|
|
RTOS Features --->
|
|
|
|
Stack and heap information --->
|
|
|
|
(512) Idle thread stack size
|
|
|
|
(1024) Main thread stack size
|
|
|
|
(256) Minimum pthread stack size
|
|
|
|
(1024) Default pthread stack size
|
|
|
|
|
2017-08-06 18:38:55 +02:00
|
|
|
Device Drivers --->
|
|
|
|
-*- Memory Technology Device (MTD) Support --->
|
|
|
|
[*] Support MTD partitions
|
|
|
|
-*- SPI-based W25 FLASH
|
|
|
|
(0) W25 SPI Mode
|
|
|
|
(20000000) W25 SPI Frequency
|
|
|
|
|
|
|
|
File Systems --->
|
2017-08-06 20:14:29 +02:00
|
|
|
[ ] Disable pseudo-filesystem operations
|
2017-08-06 18:38:55 +02:00
|
|
|
-*- SMART file system
|
|
|
|
(0xff) FLASH erased state
|
|
|
|
(16) Maximum file name length
|
|
|
|
|
2017-08-06 20:14:29 +02:00
|
|
|
Memory Management --->
|
|
|
|
[*] Small memory model
|
|
|
|
|
2019-08-05 15:13:48 +02:00
|
|
|
Also change the boards/stm32f103-minimum/scripts/ld.script file to use 128KB
|
2017-08-06 20:14:29 +02:00
|
|
|
of Flash instead 64KB (since this board has a hidden 64KB flash) :
|
|
|
|
|
|
|
|
MEMORY
|
|
|
|
{
|
|
|
|
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
|
|
|
|
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
|
|
|
|
}
|
|
|
|
|
|
|
|
Then after compiling and flashing the file nuttx.bin you can format and mount
|
|
|
|
the flash this way:
|
|
|
|
|
|
|
|
nsh> mksmartfs /dev/smart0p0
|
|
|
|
nsh> mksmartfs /dev/smart0p1
|
|
|
|
nsh> mksmartfs /dev/smart0p2
|
|
|
|
nsh> mksmartfs /dev/smart0p3
|
|
|
|
|
|
|
|
nsh> mount -t smartfs /dev/smart0p0 /mnt
|
|
|
|
nsh> ls /mnt
|
|
|
|
/mnt:
|
|
|
|
|
|
|
|
nsh> echo "Testing" > /mnt/file.txt
|
|
|
|
|
|
|
|
nsh> ls /mnt
|
|
|
|
/mnt:
|
|
|
|
file.txt
|
|
|
|
|
|
|
|
nsh> cat /mnt/file.txt
|
|
|
|
Testing
|
|
|
|
|
|
|
|
nsh>
|
|
|
|
|
2017-02-26 21:53:00 +01:00
|
|
|
SDCard support:
|
|
|
|
===============
|
|
|
|
|
|
|
|
Only STM32F103xx High-density devices has SDIO controller. STM32F103C8T6 is a
|
|
|
|
Medium-density device, but we can use SDCard over SPI.
|
|
|
|
|
|
|
|
You can do that enabling these options:
|
|
|
|
|
|
|
|
CONFIG_FS_FAT=y
|
|
|
|
|
|
|
|
CONFIG_FS_WRITABLE=y
|
|
|
|
|
|
|
|
CONFIG_MMCSD=y
|
|
|
|
CONFIG_MMCSD_NSLOTS=1
|
|
|
|
CONFIG_MMCSD_SPI=y
|
|
|
|
CONFIG_MMCSD_SPICLOCK=20000000
|
|
|
|
CONFIG_MMCSD_SPIMODE=0
|
|
|
|
|
|
|
|
CONFIG_STM32_SPI=y
|
|
|
|
CONFIG_STM32_SPI1=y
|
|
|
|
|
|
|
|
CONFIG_SPI=y
|
|
|
|
CONFIG_SPI_CALLBACK=y
|
|
|
|
CONFIG_SPI_EXCHANGE=y
|
|
|
|
|
|
|
|
And connect a SDCard/SPI board on SPI1. Connect the CS pin to PA4, SCK to
|
|
|
|
PA5, MOSI to PA7 and MISO to PA6. Note: some chinese boards use MOSO instead
|
|
|
|
of MISO.
|
|
|
|
|
2017-05-26 15:48:11 +02:00
|
|
|
Nokia 5110 LCD Display support:
|
|
|
|
===============================
|
|
|
|
|
|
|
|
You can connect a low cost Nokia 5110 LCD display in the STM32F103 Minimum
|
|
|
|
board this way: connect PA5 (SPI1 CLK) to CLK; PA7 (SPI1 MOSI) to DIN; PA4
|
|
|
|
to CE; PA3 to RST; PA2 to DC. Also connect 3.3V to VCC and GND to GND.
|
|
|
|
|
|
|
|
You can start with default "stm32f103-minimum/nsh" configuration option and
|
|
|
|
enable these options using "make menuconfig" :
|
|
|
|
|
|
|
|
System Type --->
|
|
|
|
STM32 Peripheral Support --->
|
|
|
|
[*] SPI1
|
|
|
|
|
|
|
|
Device Drivers --->
|
|
|
|
-*- SPI Driver Support --->
|
|
|
|
[*] SPI exchange
|
|
|
|
[*] SPI CMD/DATA
|
|
|
|
|
|
|
|
Device Drivers --->
|
|
|
|
LCD Driver Support --->
|
|
|
|
[*] Graphic LCD Driver Support --->
|
2018-03-17 19:49:10 +01:00
|
|
|
[*] Nokia 5110 LCD Display (Phillips PCD8544)
|
2017-05-26 15:48:11 +02:00
|
|
|
(1) Number of PCD8544 Devices
|
|
|
|
(84) PCD8544 X Resolution
|
|
|
|
(48) PCD8544 Y Resolution
|
|
|
|
|
|
|
|
Graphics Support --->
|
|
|
|
[*] NX Graphics
|
|
|
|
(1) Number of Color Planes
|
|
|
|
|
|
|
|
(0x0) Initial background color
|
|
|
|
Supported Pixel Depths --->
|
|
|
|
[ ] Disable 1 BPP
|
|
|
|
[*] Packed MS First
|
|
|
|
|
|
|
|
Font Selections --->
|
|
|
|
(7) Bits in Character Set
|
|
|
|
[*] Mono 5x8
|
|
|
|
|
|
|
|
Application Configuration --->
|
|
|
|
Examples --->
|
|
|
|
[*] NX graphics "Hello, World!" example
|
|
|
|
(1) Bits-Per-Pixel
|
|
|
|
|
|
|
|
After compiling and flashing the nuttx.bin inside the board, reset it.
|
|
|
|
You should see it:
|
|
|
|
|
2017-06-28 21:18:41 +02:00
|
|
|
NuttShell (NSH)
|
2017-05-26 15:48:11 +02:00
|
|
|
nsh> ?
|
2017-06-28 21:18:41 +02:00
|
|
|
help usage: help [-v] [<cmd>]
|
2017-05-26 15:48:11 +02:00
|
|
|
|
2017-06-28 21:18:41 +02:00
|
|
|
[ dd free mb sh usleep
|
|
|
|
? echo help mh sleep xd
|
|
|
|
cat exec hexdump mw test
|
|
|
|
cd exit kill pwd true
|
|
|
|
cp false ls set unset
|
2017-05-26 15:48:11 +02:00
|
|
|
|
|
|
|
Builtin Apps:
|
|
|
|
nxhello
|
|
|
|
|
|
|
|
Now just run nxhello and you should see "Hello World" in the display:
|
|
|
|
|
|
|
|
nsh> nxhello
|
|
|
|
|
2017-03-02 16:36:05 +01:00
|
|
|
USB Console support:
|
|
|
|
====================
|
|
|
|
|
|
|
|
The STM32F103C8 has a USB Device controller, then we can use NuttX support
|
|
|
|
to USB Device. We can the console over USB enabling these options:
|
|
|
|
|
|
|
|
System Type --->
|
|
|
|
STM32 Peripheral Support --->
|
|
|
|
[*] USB Device
|
|
|
|
|
|
|
|
It will enable: CONFIG_STM32_USB=y
|
|
|
|
|
|
|
|
Board Selection --->
|
|
|
|
-*- Enable boardctl() interface
|
|
|
|
[*] Enable USB device controls
|
|
|
|
|
|
|
|
It will enable: CONFIG_BOARDCTL_USBDEVCTRL=y
|
|
|
|
|
|
|
|
Device Drivers --->
|
|
|
|
-*- USB Device Driver Support --->
|
|
|
|
[*] USB Modem (CDC/ACM) support --->
|
|
|
|
|
|
|
|
It will enable: CONFIG_CDCACM=y and many default options.
|
|
|
|
|
|
|
|
Device Drivers --->
|
|
|
|
-*- USB Device Driver Support --->
|
|
|
|
[*] USB Modem (CDC/ACM) support --->
|
|
|
|
[*] CDC/ACM console device
|
|
|
|
|
|
|
|
It will enable: CONFIG_CDCACM_CONSOLE=y
|
|
|
|
|
|
|
|
Device Drivers --->
|
|
|
|
[*] Serial Driver Support --->
|
|
|
|
Serial console (No serial console) --->
|
|
|
|
(X) No serial console
|
|
|
|
|
|
|
|
It will enable: CONFIG_NO_SERIAL_CONSOLE=y
|
|
|
|
|
|
|
|
After flashing the firmware in the board, unplug and plug it in the computer
|
|
|
|
and it will create a /dev/ttyACM0 device in the Linux. Use minicom with this
|
|
|
|
device to get access to NuttX NSH console (press Enter three times to start)
|
|
|
|
|
2016-05-18 21:33:17 +02:00
|
|
|
STM32F103 Minimum - specific Configuration Options
|
2016-05-21 01:14:19 +02:00
|
|
|
==================================================
|
2016-05-18 21:33:17 +02:00
|
|
|
|
|
|
|
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
|
|
|
|
be set to:
|
|
|
|
|
|
|
|
CONFIG_ARCH=arm
|
|
|
|
|
|
|
|
CONFIG_ARCH_family - For use in C code:
|
|
|
|
|
|
|
|
CONFIG_ARCH_ARM=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_architecture - For use in C code:
|
|
|
|
|
|
|
|
CONFIG_ARCH_CORTEXM3=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP=stm32
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
|
|
|
|
chip:
|
|
|
|
|
|
|
|
CONFIG_ARCH_CHIP_STM32F103C8=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
|
|
|
|
configuration features.
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
|
|
|
|
|
2019-08-05 15:13:48 +02:00
|
|
|
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
|
2016-05-18 21:33:17 +02:00
|
|
|
hence, the board that supports the particular chip or SoC.
|
|
|
|
|
2018-03-17 19:49:10 +01:00
|
|
|
CONFIG_ARCH_BOARD=stm32f103-minimum
|
2016-05-18 21:33:17 +02:00
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD_name - For use in C code
|
|
|
|
|
|
|
|
CONFIG_ARCH_BOARD_STM32_MINIMUM=y
|
|
|
|
|
|
|
|
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
|
|
|
|
of delay loops
|
|
|
|
|
|
|
|
CONFIG_ENDIAN_BIG - define if big endian (default is little
|
|
|
|
endian)
|
|
|
|
|
|
|
|
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
|
|
|
|
|
|
|
|
CONFIG_RAM_SIZE=20480 (20Kb)
|
|
|
|
|
|
|
|
CONFIG_RAM_START - The start address of installed DRAM
|
|
|
|
|
|
|
|
CONFIG_RAM_START=0x20000000
|
|
|
|
|
|
|
|
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
|
|
|
|
have LEDs
|
|
|
|
|
|
|
|
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
|
|
|
stack. If defined, this symbol is the size of the interrupt
|
|
|
|
stack in bytes. If not defined, the user task stacks will be
|
|
|
|
used during interrupt handling.
|
|
|
|
|
|
|
|
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
|
|
|
|
|
|
|
|
Individual subsystems can be enabled:
|
|
|
|
|
|
|
|
AHB
|
|
|
|
---
|
|
|
|
CONFIG_STM32_CRC
|
|
|
|
CONFIG_STM32_BKPSRAM
|
|
|
|
|
|
|
|
APB1
|
|
|
|
----
|
|
|
|
CONFIG_STM32_TIM2
|
|
|
|
CONFIG_STM32_TIM3
|
|
|
|
CONFIG_STM32_TIM4
|
|
|
|
CONFIG_STM32_WWDG
|
|
|
|
CONFIG_STM32_IWDG
|
|
|
|
CONFIG_STM32_SPI2
|
|
|
|
CONFIG_STM32_USART2
|
|
|
|
CONFIG_STM32_USART3
|
|
|
|
CONFIG_STM32_I2C1
|
|
|
|
CONFIG_STM32_I2C2
|
|
|
|
CONFIG_STM32_CAN1
|
|
|
|
CONFIG_STM32_PWR -- Required for RTC
|
|
|
|
|
|
|
|
APB2
|
|
|
|
----
|
|
|
|
CONFIG_STM32_TIM1
|
|
|
|
CONFIG_STM32_USART1
|
|
|
|
CONFIG_STM32_ADC1
|
|
|
|
CONFIG_STM32_ADC2
|
|
|
|
CONFIG_STM32_SPI1
|
|
|
|
|
|
|
|
Timer devices may be used for different purposes. One special purpose is
|
|
|
|
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
|
|
|
|
is defined (as above) then the following may also be defined to indicate that
|
|
|
|
the timer is intended to be used for pulsed output modulation or ADC conversion.
|
|
|
|
Note that ADC require two definitions: Not only do you have
|
|
|
|
to assign the timer (n) for used by the ADC, but then you also have to
|
|
|
|
configure which ADC (m) it is assigned to.
|
|
|
|
|
|
|
|
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
|
|
|
|
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
|
|
|
|
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
|
|
|
|
|
|
|
|
For each timer that is enabled for PWM usage, we need the following additional
|
|
|
|
configuration settings:
|
|
|
|
|
|
|
|
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
|
|
|
|
|
|
|
|
NOTE: The STM32 timers are each capable of generating different signals on
|
|
|
|
each of the four channels with different duty cycles. That capability is
|
|
|
|
not supported by this driver: Only one output channel per timer.
|
|
|
|
|
|
|
|
JTAG Enable settings (by default only SW-DP is enabled):
|
|
|
|
|
|
|
|
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
|
|
|
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
|
|
|
but without JNTRST.
|
|
|
|
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
|
|
|
|
|
|
|
|
STM32F103 Minimum specific device driver settings
|
|
|
|
|
|
|
|
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3)
|
|
|
|
for the console and ttys0 (default is the USART1).
|
|
|
|
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
|
|
|
|
This specific the size of the receive buffer
|
|
|
|
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
|
|
|
|
being sent. This specific the size of the transmit buffer
|
|
|
|
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
|
|
|
|
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
|
|
|
|
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_U[S]ARTn_2STOP - Two stop bits
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STM32F103 Minimum CAN Configuration
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CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
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CONFIG_STM32_CAN2 must also be defined)
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CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
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Standard 11-bit IDs.
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CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
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Default: 8
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CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
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Default: 4
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CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
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|
mode for testing. The STM32 CAN driver does support loopback mode.
|
2018-06-28 22:47:14 +02:00
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CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
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is defined.
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CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
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is defined.
|
2018-06-28 23:44:42 +02:00
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CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
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Default: 6
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CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
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Default: 7
|
2016-06-15 23:45:27 +02:00
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CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
|
2016-05-18 21:33:17 +02:00
|
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dump of all CAN registers.
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STM32F103 Minimum SPI Configuration
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CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
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support. Non-interrupt-driven, poll-waiting is recommended if the
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|
interrupt rate would be to high in the interrupt driven case.
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CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
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Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
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Configurations
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|
==============
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|
2017-02-23 17:57:21 +01:00
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Instantiating Configurations
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----------------------------
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Each STM32F103 Minimum configuration is maintained in a sub-directory and
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can be selected as follow:
|
2016-05-18 21:33:17 +02:00
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|
2019-08-06 00:53:39 +02:00
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|
tools/configure.sh STM32F103 Minimum:<subdir>
|
2016-05-18 21:33:17 +02:00
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|
2017-02-23 17:57:21 +01:00
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|
Where <subdir> is one of the following:
|
2016-05-18 21:33:17 +02:00
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|
2017-02-23 17:57:21 +01:00
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|
Configuration Directories
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|
-------------------------
|
2016-05-18 21:33:17 +02:00
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nsh:
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|
|
---
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|
|
Configures the NuttShell (nsh) located at apps/examples/nsh. This
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|
configuration enables a console on UART1. Support for
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|
|
builtin applications is enabled, but in the base configuration no
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|
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builtin applications are selected.
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|
2016-08-28 21:22:34 +02:00
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|
|
jlx12864g:
|
|
|
|
---------
|
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|
|
This is a config example to use the JLX12864G-086 LCD module. To use this
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|
|
LCD you need to connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SDA; PA4
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|
|
to CS; PA3 to RST; PA2 to RS.
|
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|
|
2017-01-15 19:46:22 +01:00
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|
|
nrf24:
|
|
|
|
---------
|
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|
|
This is a config example to test the nrf24 terminal example. You will need
|
|
|
|
two stm32f103-minimum board each one with a nRF24L01 module connected this
|
|
|
|
way: connect PB1 to nRF24 CE pin; PA4 to CSN; PA5 (SPI1 CLK) to SCK; PA7
|
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|
|
(SPI1 MOSI) to MOSI; PA6 (SPI1 MISO) to MISO; PA0 to IRQ.
|
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|
|
2016-05-18 21:33:17 +02:00
|
|
|
usbnsh:
|
|
|
|
-------
|
|
|
|
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|
|
|
This is another NSH example. If differs from other 'nsh' configurations
|
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|
|
in that this configurations uses a USB serial device for console I/O.
|
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|
|
NOTES:
|
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|
|
|
|
1. This configuration uses the mconf-based configuration tool. To
|
|
|
|
change this configuration using that tool, you should:
|
|
|
|
|
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
|
|
|
see additional README.txt files in the NuttX tools repository.
|
|
|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
|
|
reconfiguration process.
|
|
|
|
|
|
|
|
2. By default, this configuration uses the CodeSourcery toolchain
|
|
|
|
for Windows and builds under Cygwin (or probably MSYS). That
|
|
|
|
can easily be reconfigured, of course.
|
|
|
|
|
|
|
|
CONFIG_HOST_WINDOWS=y : Builds under Windows
|
|
|
|
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin
|
|
|
|
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
|
|
|
|
|
|
|
|
3. This configuration does have UART2 output enabled and set up as
|
|
|
|
the system logging device:
|
|
|
|
|
|
|
|
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
|
|
|
|
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : UART2 will be /dev/ttyS0
|
|
|
|
|
|
|
|
However, there is nothing to generate SYLOG output in the default
|
|
|
|
configuration so nothing should appear on UART2 unless you enable
|
|
|
|
some debug output or enable the USB monitor.
|
|
|
|
|
|
|
|
4. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
|
|
|
|
device will save encoded trace output in in-memory buffer; if the
|
|
|
|
USB monitor is enabled, that trace buffer will be periodically
|
2018-03-17 19:49:10 +01:00
|
|
|
emptied and dumped to the system logging device (UART2 in this
|
2016-05-18 21:33:17 +02:00
|
|
|
configuraion):
|
|
|
|
|
|
|
|
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
|
|
|
|
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
|
|
|
|
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
|
|
|
|
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
|
2016-06-30 20:24:33 +02:00
|
|
|
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
|
|
|
|
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
|
|
|
|
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
|
|
|
|
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
|
|
|
|
|
|
|
|
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
|
|
|
|
CONFIG_USBMONITOR_TRACECLASS=y
|
|
|
|
CONFIG_USBMONITOR_TRACETRANSFERS=y
|
|
|
|
CONFIG_USBMONITOR_TRACECONTROLLER=y
|
|
|
|
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
|
2016-05-18 21:33:17 +02:00
|
|
|
|
|
|
|
5. By default, this project assumes that you are *NOT* using the DFU
|
|
|
|
bootloader.
|
|
|
|
|
|
|
|
Using the Prolifics PL2303 Emulation
|
|
|
|
------------------------------------
|
|
|
|
You could also use the non-standard PL2303 serial device instead of
|
|
|
|
the standard CDC/ACM serial device by changing:
|
|
|
|
|
|
|
|
CONFIG_CDCACM=y : Disable the CDC/ACM serial device class
|
|
|
|
CONFIG_CDCACM_CONSOLE=y : The CDC/ACM serial device is NOT the console
|
|
|
|
CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled
|
|
|
|
CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console
|
2016-11-13 18:44:28 +01:00
|
|
|
|
|
|
|
veml6070:
|
|
|
|
--------
|
|
|
|
This is a config example to use the Vishay VEML6070 UV-A sensor. To use this
|
|
|
|
sensor you need to connect PB6 (I2C1 CLK) to SCL; PB7 (I2C1 SDA) to SDA of
|
|
|
|
sensor module. I used a GY-VEML6070 module to test this driver.
|