2012-05-06 01:17:25 +02:00
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/****************************************************************************
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2012-05-29 03:43:51 +02:00
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* drivers/input/stmpe811_gpio.c
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2012-05-06 01:17:25 +02:00
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* References:
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* "STMPE811 S-Touch<63> advanced resistive touchscreen controller with 8-bit
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* GPIO expander," Doc ID 14489 Rev 6, CD00186725, STMicroelectronics"
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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2012-05-06 03:37:47 +02:00
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#include <assert.h>
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2012-05-06 01:17:25 +02:00
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#include <errno.h>
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#include <debug.h>
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2012-05-29 03:43:51 +02:00
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#include <nuttx/input/stmpe811.h>
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2012-05-06 01:17:25 +02:00
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2012-05-29 03:43:51 +02:00
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#include "stmpe811.h"
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2012-05-06 01:17:25 +02:00
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2012-05-29 03:43:51 +02:00
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#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_STMPE811) && !defined(CONFIG_STMPE811_GPIO_DISABLE)
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2012-05-06 01:17:25 +02:00
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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2012-05-29 03:43:51 +02:00
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* Name: stmpe811_gpioinit
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2012-05-06 01:17:25 +02:00
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*
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* Description:
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* Initialize the GPIO interrupt subsystem
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*
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* Input Parameters:
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2012-05-29 03:43:51 +02:00
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* handle - The handle previously returned by stmpe811_instantiate
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2012-05-06 01:17:25 +02:00
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*
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* Returned Value:
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* Zero is returned on success. Otherwise, a negated errno value is
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* returned to indicate the nature of the failure.
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*
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****************************************************************************/
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2012-05-29 03:43:51 +02:00
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static void stmpe811_gpioinit(FAR struct stmpe811_dev_s *priv)
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2012-05-06 01:17:25 +02:00
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{
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uint8_t regval;
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2012-05-29 03:43:51 +02:00
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if ((priv->flags & STMPE811_FLAGS_GPIO_INITIALIZED) == 0)
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2012-05-06 01:17:25 +02:00
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{
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2012-05-06 03:37:47 +02:00
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/* Enable Clocking for GPIO */
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2012-05-29 03:43:51 +02:00
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regval = stmpe811_getreg8(priv, STMPE811_SYS_CTRL2);
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2012-05-06 03:37:47 +02:00
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regval &= ~SYS_CTRL2_GPIO_OFF;
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2012-05-29 03:43:51 +02:00
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stmpe811_putreg8(priv, STMPE811_SYS_CTRL2, regval);
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2012-05-06 03:37:47 +02:00
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2012-05-06 01:17:25 +02:00
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/* Disable all GPIO interrupts */
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2012-05-29 03:43:51 +02:00
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stmpe811_putreg8(priv, STMPE811_GPIO_EN, 0);
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2012-05-06 01:17:25 +02:00
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/* Enable global GPIO interrupts */
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2012-05-29 03:43:51 +02:00
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#ifndef CONFIG_STMPE811_GPIOINT_DISABLE
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regval = stmpe811_getreg8(priv, STMPE811_INT_EN);
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2012-05-06 01:17:25 +02:00
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regval |= INT_GPIO;
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2012-05-29 03:43:51 +02:00
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stmpe811_putreg8(priv, STMPE811_INT_EN, regval);
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2012-05-06 03:37:47 +02:00
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#endif
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2012-05-06 01:17:25 +02:00
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2012-05-29 03:43:51 +02:00
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priv->flags |= STMPE811_FLAGS_GPIO_INITIALIZED;
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2012-05-06 01:17:25 +02:00
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}
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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2012-05-29 03:43:51 +02:00
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* Name: stmpe811_gpioconfig
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2012-05-06 01:17:25 +02:00
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*
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* Description:
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2012-05-29 03:43:51 +02:00
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* Configure an STMPE811 GPIO pin
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2012-05-06 01:17:25 +02:00
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*
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* Input Parameters:
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2012-05-29 03:43:51 +02:00
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* handle - The handle previously returned by stmpe811_instantiate
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2012-05-06 01:17:25 +02:00
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* pinconfig - Bit-encoded pin configuration
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*
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* Returned Value:
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* Zero is returned on success. Otherwise, a negated errno value is
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* returned to indicate the nature of the failure.
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*
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****************************************************************************/
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2012-05-29 03:43:51 +02:00
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int stmpe811_gpioconfig(STMPE811_HANDLE handle, uint8_t pinconfig)
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2012-05-06 01:17:25 +02:00
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{
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2012-05-29 03:43:51 +02:00
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FAR struct stmpe811_dev_s *priv = (FAR struct stmpe811_dev_s *)handle;
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int pin = (pinconfig & STMPE811_GPIO_PIN_MASK) >> STMPE811_GPIO_PIN_SHIFT;
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2012-05-06 01:17:25 +02:00
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uint8_t pinmask = (1 << pin);
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uint8_t regval;
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int ret;
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2012-05-29 03:43:51 +02:00
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DEBUGASSERT(handle && (unsigned)pin < STMPE811_GPIO_NPINS);
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2012-05-06 01:17:25 +02:00
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/* Get exclusive access to the device structure */
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2017-10-04 23:22:27 +02:00
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ret = nxsem_wait(&priv->exclsem);
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2012-05-06 01:17:25 +02:00
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if (ret < 0)
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{
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2017-10-04 23:22:27 +02:00
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ierr("ERROR: nxsem_wait failed: %d\n", ret);
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return ret;
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2012-05-06 01:17:25 +02:00
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}
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/* Make sure that the pin is not already in use */
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if ((priv->inuse & pinmask) != 0)
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{
|
2016-06-12 17:26:00 +02:00
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ierr("ERROR: PIN%d is already in-use\n", pin);
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2017-10-03 23:35:24 +02:00
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nxsem_post(&priv->exclsem);
|
2012-05-06 01:17:25 +02:00
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return -EBUSY;
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}
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|
2012-05-06 03:37:47 +02:00
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/* Make sure that the GPIO block has been initialized */
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2012-05-29 03:43:51 +02:00
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stmpe811_gpioinit(priv);
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2012-05-06 03:37:47 +02:00
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/* Set the alternate function bit for the pin, making it a GPIO */
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2012-05-29 03:43:51 +02:00
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regval = stmpe811_getreg8(priv, STMPE811_GPIO_AF);
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2012-05-06 03:37:47 +02:00
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regval |= pinmask;
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2012-05-29 03:43:51 +02:00
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stmpe811_putreg8(priv, STMPE811_GPIO_AF, regval);
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2012-05-06 03:37:47 +02:00
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2012-05-06 01:17:25 +02:00
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/* Is the pin an input or an output? */
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2012-05-29 03:43:51 +02:00
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if ((pinconfig & STMPE811_GPIO_DIR) == STMPE811_GPIO_OUTPUT)
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2012-05-06 01:17:25 +02:00
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{
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/* The pin is an output */
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2012-05-29 03:43:51 +02:00
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regval = stmpe811_getreg8(priv, STMPE811_GPIO_DIR);
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2012-05-06 01:17:25 +02:00
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regval &= ~pinmask;
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2012-05-29 03:43:51 +02:00
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stmpe811_putreg8(priv, STMPE811_GPIO_DIR, regval);
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2012-05-06 01:17:25 +02:00
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/* Set its initial output value */
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2012-05-29 03:43:51 +02:00
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stmpe811_gpiowrite(handle, pinconfig,
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(pinconfig & STMPE811_GPIO_VALUE) != STMPE811_GPIO_ZERO);
|
2012-05-06 01:17:25 +02:00
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}
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else
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{
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/* It is an input */
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2012-05-29 03:43:51 +02:00
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regval = stmpe811_getreg8(priv, STMPE811_GPIO_DIR);
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2012-05-06 01:17:25 +02:00
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regval |= pinmask;
|
2012-05-29 03:43:51 +02:00
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stmpe811_putreg8(priv, STMPE811_GPIO_DIR, regval);
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2012-05-06 01:17:25 +02:00
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/* Set up the falling edge detection */
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2012-05-29 03:43:51 +02:00
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regval = stmpe811_getreg8(priv, STMPE811_GPIO_FE);
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if ((pinconfig & STMPE811_GPIO_FALLING) != 0)
|
2012-05-06 01:17:25 +02:00
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{
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regval |= pinmask;
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}
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else
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{
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regval &= pinmask;
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}
|
2012-05-29 03:43:51 +02:00
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stmpe811_putreg8(priv, STMPE811_GPIO_FE, regval);
|
2012-05-06 01:17:25 +02:00
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/* Set up the rising edge detection */
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2012-05-29 03:43:51 +02:00
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regval = stmpe811_getreg8(priv, STMPE811_GPIO_RE);
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if ((pinconfig & STMPE811_GPIO_FALLING) != 0)
|
2012-05-06 01:17:25 +02:00
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{
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regval |= pinmask;
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}
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else
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{
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regval &= pinmask;
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}
|
2012-05-29 03:43:51 +02:00
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stmpe811_putreg8(priv, STMPE811_GPIO_RE, regval);
|
2014-04-13 22:32:20 +02:00
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|
2012-05-06 01:17:25 +02:00
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/* Disable interrupts for now */
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2012-05-29 03:43:51 +02:00
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regval = stmpe811_getreg8(priv, STMPE811_GPIO_EN);
|
2012-05-06 01:17:25 +02:00
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regval &= ~pinmask;
|
2012-05-29 03:43:51 +02:00
|
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stmpe811_putreg8(priv, STMPE811_GPIO_EN, regval);
|
2012-05-06 01:17:25 +02:00
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|
}
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/* Mark the pin as 'in use' */
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|
priv->inuse |= pinmask;
|
2017-10-03 23:35:24 +02:00
|
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|
nxsem_post(&priv->exclsem);
|
2012-05-06 01:17:25 +02:00
|
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|
return OK;
|
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|
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|
}
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|
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|
|
|
|
|
|
/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
|
* Name: stmpe811_gpiowrite
|
2012-05-06 01:17:25 +02:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Set or clear the GPIO output
|
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
2012-05-29 03:43:51 +02:00
|
|
|
|
* handle - The handle previously returned by stmpe811_instantiate
|
2012-05-06 01:17:25 +02:00
|
|
|
|
* pinconfig - Bit-encoded pin configuration
|
|
|
|
|
* value = true: write logic '1'; false: write logic '0;
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* None
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
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|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
void stmpe811_gpiowrite(STMPE811_HANDLE handle, uint8_t pinconfig, bool value)
|
2012-05-06 01:17:25 +02:00
|
|
|
|
{
|
2012-05-29 03:43:51 +02:00
|
|
|
|
FAR struct stmpe811_dev_s *priv = (FAR struct stmpe811_dev_s *)handle;
|
|
|
|
|
int pin = (pinconfig & STMPE811_GPIO_PIN_MASK) >> STMPE811_GPIO_PIN_SHIFT;
|
2012-05-06 01:17:25 +02:00
|
|
|
|
int ret;
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
DEBUGASSERT(handle && (unsigned)pin < STMPE811_GPIO_NPINS);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
|
|
/* Get exclusive access to the device structure */
|
|
|
|
|
|
2017-10-04 23:22:27 +02:00
|
|
|
|
ret = nxsem_wait(&priv->exclsem);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
if (ret < 0)
|
|
|
|
|
{
|
2017-10-04 23:22:27 +02:00
|
|
|
|
ierr("ERROR: nxsem_wait failed: %d\n", ret);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Are we setting or clearing outputs? */
|
|
|
|
|
|
|
|
|
|
if (value)
|
|
|
|
|
{
|
|
|
|
|
/* Set the output valu(s)e by writing to the SET register */
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_SETPIN, (1 << pin));
|
2012-05-06 01:17:25 +02:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Clear the output value(s) by writing to the CLR register */
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_CLRPIN, (1 << pin));
|
2012-05-06 01:17:25 +02:00
|
|
|
|
}
|
|
|
|
|
|
2017-10-03 23:35:24 +02:00
|
|
|
|
nxsem_post(&priv->exclsem);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
|
* Name: stmpe811_gpioread
|
2012-05-06 01:17:25 +02:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Set or clear the GPIO output
|
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
2012-05-29 03:43:51 +02:00
|
|
|
|
* handle - The handle previously returned by stmpe811_instantiate
|
2012-05-06 01:17:25 +02:00
|
|
|
|
* pinconfig - Bit-encoded pin configuration
|
|
|
|
|
* value - The location to return the state of the GPIO pin
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* Zero is returned on success. Otherwise, a negated errno value is
|
|
|
|
|
* returned to indicate the nature of the failure.
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
int stmpe811_gpioread(STMPE811_HANDLE handle, uint8_t pinconfig, bool *value)
|
2012-05-06 01:17:25 +02:00
|
|
|
|
{
|
2012-05-29 03:43:51 +02:00
|
|
|
|
FAR struct stmpe811_dev_s *priv = (FAR struct stmpe811_dev_s *)handle;
|
|
|
|
|
int pin = (pinconfig & STMPE811_GPIO_PIN_MASK) >> STMPE811_GPIO_PIN_SHIFT;
|
2012-05-06 01:17:25 +02:00
|
|
|
|
uint8_t regval;
|
|
|
|
|
int ret;
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
DEBUGASSERT(handle && (unsigned)pin < STMPE811_GPIO_NPINS);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
|
|
/* Get exclusive access to the device structure */
|
|
|
|
|
|
2017-10-04 23:22:27 +02:00
|
|
|
|
ret = nxsem_wait(&priv->exclsem);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
if (ret < 0)
|
|
|
|
|
{
|
2017-10-04 23:22:27 +02:00
|
|
|
|
ierr("ERROR: nxsem_wait failed: %d\n", ret);
|
|
|
|
|
return ret;
|
2012-05-06 01:17:25 +02:00
|
|
|
|
}
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_MPSTA);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
*value = ((regval & GPIO_PIN(pin)) != 0);
|
2017-10-03 23:35:24 +02:00
|
|
|
|
nxsem_post(&priv->exclsem);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/***********************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
|
* Name: stmpe811_gpioattach
|
2012-05-06 01:17:25 +02:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Attach to a GPIO interrupt input pin and enable interrupts on the pin. Using
|
|
|
|
|
* the value NULL for the handler address will disable interrupts from the pin and
|
|
|
|
|
* detach the handler.
|
|
|
|
|
*
|
|
|
|
|
* NOTE: Callbacks do not occur from an interrupt handler but rather from the
|
|
|
|
|
* context of the worker thread.
|
|
|
|
|
*
|
|
|
|
|
* Input Parameters:
|
2012-05-29 03:43:51 +02:00
|
|
|
|
* handle - The handle previously returned by stmpe811_instantiate
|
2012-05-06 01:17:25 +02:00
|
|
|
|
* pinconfig - Bit-encoded pin configuration
|
|
|
|
|
* handler - The handler that will be called when the interrupt occurs.
|
|
|
|
|
*
|
|
|
|
|
* Returned Value:
|
|
|
|
|
* Zero is returned on success. Otherwise, a negated errno value is returned
|
|
|
|
|
* to indicate the nature of the failure.
|
|
|
|
|
*
|
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
#ifndef CONFIG_STMPE811_GPIOINT_DISABLE
|
|
|
|
|
int stmpe811_gpioattach(STMPE811_HANDLE handle, uint8_t pinconfig,
|
|
|
|
|
stmpe811_handler_t handler)
|
2012-05-06 01:17:25 +02:00
|
|
|
|
{
|
2012-05-29 03:43:51 +02:00
|
|
|
|
FAR struct stmpe811_dev_s *priv = (FAR struct stmpe811_dev_s *)handle;
|
|
|
|
|
int pin = (pinconfig & STMPE811_GPIO_PIN_MASK) >> STMPE811_GPIO_PIN_SHIFT;
|
2012-05-06 01:17:25 +02:00
|
|
|
|
uint8_t regval;
|
|
|
|
|
int ret;
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
DEBUGASSERT(handle && (unsigned)pin < STMPE811_GPIO_NPINS);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
|
|
/* Get exclusive access to the device structure */
|
|
|
|
|
|
2017-10-04 23:22:27 +02:00
|
|
|
|
ret = nxsem_wait(&priv->exclsem);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
if (ret < 0)
|
|
|
|
|
{
|
2017-10-04 23:22:27 +02:00
|
|
|
|
ierr("ERROR: nxsem_wait failed: %d\n", ret);
|
|
|
|
|
return ret;
|
2012-05-06 01:17:25 +02:00
|
|
|
|
}
|
|
|
|
|
|
2012-05-06 03:37:47 +02:00
|
|
|
|
/* Make sure that the GPIO interrupt system has been gpioinitialized */
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
stmpe811_gpioinit(priv);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
|
|
/* Set/clear the handler */
|
|
|
|
|
|
|
|
|
|
priv->handlers[pin] = handler;
|
|
|
|
|
|
|
|
|
|
/* If an handler has provided, then we are enabling interrupts */
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_EN);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
if (handler)
|
|
|
|
|
{
|
|
|
|
|
/* Enable interrupts for this GPIO */
|
|
|
|
|
|
2014-02-11 01:08:49 +01:00
|
|
|
|
regval |= GPIO_PIN(pin);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Disable interrupts for this GPIO */
|
|
|
|
|
|
|
|
|
|
regval &= ~GPIO_PIN(pin);
|
|
|
|
|
}
|
2014-02-11 01:08:49 +01:00
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_EN, regval);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
2017-10-03 23:35:24 +02:00
|
|
|
|
nxsem_post(&priv->exclsem);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
return OK;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-05-29 03:43:51 +02:00
|
|
|
|
* Name: stmpe811_gpioworker
|
2012-05-06 01:17:25 +02:00
|
|
|
|
*
|
|
|
|
|
* Description:
|
|
|
|
|
* Handle GPIO interrupt events (this function actually executes in the
|
|
|
|
|
* context of the worker thread).
|
|
|
|
|
*
|
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
#ifndef CONFIG_STMPE811_GPIOINT_DISABLE
|
|
|
|
|
void stmpe811_gpioworker(FAR struct stmpe811_dev_s *priv)
|
2012-05-06 01:17:25 +02:00
|
|
|
|
{
|
|
|
|
|
uint8_t regval;
|
|
|
|
|
uint8_t pinmask;
|
|
|
|
|
int pin;
|
|
|
|
|
|
|
|
|
|
/* Get the set of pending GPIO interrupts */
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
regval = stmpe811_getreg8(priv, STMPE811_GPIO_INTSTA);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|
|
|
|
|
/* Look at each pin */
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
for (pin = 0; pin < STMPE811_GPIO_NPINS; pin++)
|
2012-05-06 01:17:25 +02:00
|
|
|
|
{
|
|
|
|
|
pinmask = GPIO_INT(pin);
|
|
|
|
|
if ((regval & pinmask) != 0)
|
|
|
|
|
{
|
|
|
|
|
/* Check if we have a handler for this interrupt (there should
|
|
|
|
|
* be one)
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
if (priv->handlers[pin])
|
|
|
|
|
{
|
|
|
|
|
/* Interrupt is pending... dispatch the interrupt to the
|
|
|
|
|
* callback
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
priv->handlers[pin](pin);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2016-06-20 20:44:38 +02:00
|
|
|
|
ierr("ERROR: No handler for PIN%d, GPIO_INTSTA: %02x\n", pin, regval);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Clear the pending GPIO interrupt by writing a '1' to the
|
|
|
|
|
* pin position in the status register.
|
|
|
|
|
*/
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
stmpe811_putreg8(priv, STMPE811_GPIO_INTSTA, pinmask);
|
2012-05-06 01:17:25 +02:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2012-05-29 03:43:51 +02:00
|
|
|
|
#endif /* CONFIG_INPUT && CONFIG_INPUT_STMPE811 && !CONFIG_STMPE811_GPIO_DISABLE */
|
2012-05-06 01:17:25 +02:00
|
|
|
|
|