2022-01-15 07:01:10 +01:00
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/****************************************************************************
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2022-11-17 11:17:40 +01:00
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* arch/sparc/src/common/sparc_internal.h
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2022-01-15 07:01:10 +01:00
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_SPARC_SRC_COMMON_UP_INTERNAL_H
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#define __ARCH_SPARC_SRC_COMMON_UP_INTERNAL_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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2022-02-01 02:21:17 +01:00
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# include <nuttx/arch.h>
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# include <sys/types.h>
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2022-01-15 07:01:10 +01:00
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# include <stdint.h>
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# include <stdbool.h>
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#endif
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2023-05-13 10:33:29 +02:00
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# include "sparc_v8.h"
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2022-01-15 07:01:10 +01:00
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Determine which (if any) console driver to use. If a console is enabled
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* and no other console device is specified, then a serial console is
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* assumed.
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*/
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#ifndef CONFIG_DEV_CONSOLE
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# undef USE_SERIALDRIVER
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# undef USE_EARLYSERIALINIT
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# undef CONFIG_DEV_LOWCONSOLE
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# undef CONFIG_RAMLOG_CONSOLE
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#else
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# if defined(CONFIG_RAMLOG_CONSOLE)
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# undef USE_SERIALDRIVER
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# undef USE_EARLYSERIALINIT
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# undef CONFIG_DEV_LOWCONSOLE
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# elif defined(CONFIG_DEV_LOWCONSOLE)
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# undef USE_SERIALDRIVER
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# undef USE_EARLYSERIALINIT
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# else
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# define USE_SERIALDRIVER 1
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# define USE_EARLYSERIALINIT 1
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# endif
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#endif
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/* If some other device is used as the console, then the serial driver may
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* still be needed. Let's assume that if the upper half serial driver is
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* built, then the lower half will also be needed. There is no need for
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* the early serial initialization in this case.
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*/
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#if !defined(USE_SERIALDRIVER) && defined(CONFIG_STANDARD_SERIAL)
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# define USE_SERIALDRIVER 1
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#endif
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/* Check if an interrupt stack size is configured */
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#ifndef CONFIG_ARCH_INTERRUPTSTACK
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2023-05-20 00:32:34 +02:00
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# define CONFIG_ARCH_INTERRUPTSTACK 0
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2022-01-15 07:01:10 +01:00
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#endif
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2022-10-27 09:42:36 +02:00
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#define INTSTACK_SIZE (CONFIG_ARCH_INTERRUPTSTACK & ~STACK_ALIGN_MASK)
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2022-02-15 17:59:06 +01:00
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/* sparc requires at least a 4-byte stack alignment. For floating point use,
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* however, the stack must be aligned to 8-byte addresses.
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*/
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#define STACK_ALIGNMENT 8
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/* Stack alignment macros */
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#define STACK_ALIGN_MASK (STACK_ALIGNMENT - 1)
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#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
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#define STACK_ALIGN_UP(a) (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
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2022-01-15 07:01:10 +01:00
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/* This is the value used to mark the stack for subsequent stack monitoring
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* logic.
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*/
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#define STACK_COLOR 0xdeadbeef
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#define INTSTACK_COLOR 0xdeadbeef
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#define HEAP_COLOR 'h'
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2022-03-11 17:41:15 +01:00
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#define getreg8(a) (*(volatile uint8_t *)(a))
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#define putreg8(v,a) (*(volatile uint8_t *)(a) = (v))
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#define getreg16(a) (*(volatile uint16_t *)(a))
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#define putreg16(v,a) (*(volatile uint16_t *)(a) = (v))
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#define getreg32(a) (*(volatile uint32_t *)(a))
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#define putreg32(v,a) (*(volatile uint32_t *)(a) = (v))
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2022-01-15 07:01:10 +01:00
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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typedef void (*up_vector_t)(void);
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* This is the beginning of heap as provided from up_head.S. This is the
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* first address in DRAM after the loaded program+bss+idle stack. The end
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* of the heap is CONFIG_RAM_END
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*/
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extern uint32_t g_idle_topstack;
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/* Address of the saved user stack pointer */
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2022-10-27 09:42:36 +02:00
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#if CONFIG_ARCH_INTERRUPTSTACK > 7
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extern uint8_t g_intstackalloc[]; /* Allocated stack base */
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extern uint8_t g_intstacktop[]; /* Initial top of interrupt stack */
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2022-01-15 07:01:10 +01:00
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#endif
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2022-09-19 20:38:54 +02:00
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/* These symbols are setup by the linker script. */
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extern char _text_start[]; /* Start of .text */
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extern char _etext[]; /* End+1 of .text + .rodata */
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extern const char _rodata_start[]; /* Start of .data in FLASH */
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extern char _sdata[]; /* Start of .data */
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extern char _edata[]; /* End+1 of .data */
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extern char _bss_start[]; /* Start of .bss */
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extern char _end[]; /* End+1 of .bss */
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2022-01-15 07:01:10 +01:00
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#ifdef CONFIG_ARCH_RAMFUNCS
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2022-09-19 20:38:54 +02:00
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extern char _sramfunc[]; /* Start of ramfuncs */
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extern char _eramfunc[]; /* End+1 of ramfuncs */
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extern char _ramfunc_loadaddr[]; /* Start of ramfuncs in FLASH */
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extern char _ramfunc_sizeof[]; /* Size of ramfuncs */
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extern char _bmxdkpba_address[]; /* BMX register setting */
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extern char _bmxdudba_address[]; /* BMX register setting */
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extern char _bmxdupba_address[]; /* BMX register setting */
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2022-01-15 07:01:10 +01:00
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#endif /* CONFIG_ARCH_RAMFUNCS */
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Common Functions *********************************************************/
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/* Common functions define in arch/sparc/src/common. These may be replaced
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* with chip-specific functions of the same name if needed. See also
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* functions prototyped in include/nuttx/arch.h.
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*/
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2022-03-11 17:41:15 +01:00
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/* Atomic modification of registers */
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void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits);
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void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits);
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void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits);
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2022-01-15 07:01:10 +01:00
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/* Context switching */
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2022-11-17 11:17:40 +01:00
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void sparc_copystate(uint32_t *dest, uint32_t *src);
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2022-01-15 07:01:10 +01:00
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/* Serial output */
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2022-11-17 11:17:40 +01:00
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void sparc_lowputs(const char *str);
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2022-01-15 07:01:10 +01:00
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/* Software interrupt 0 handler */
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2022-11-17 11:17:40 +01:00
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int sparc_swint0(int irq, void *context, void *arg);
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2022-01-15 07:01:10 +01:00
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/* Software interrupt 1 handler */
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2022-11-17 11:17:40 +01:00
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int sparc_swint1(int irq, void *context, void *arg);
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2022-01-15 07:01:10 +01:00
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/* Signals */
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2022-11-17 11:17:40 +01:00
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void sparc_sigdeliver(void);
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2022-01-15 07:01:10 +01:00
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2022-10-27 09:42:36 +02:00
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/* Interrupt handling *******************************************************/
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#if CONFIG_ARCH_INTERRUPTSTACK > 7
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2022-11-17 11:17:40 +01:00
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uintptr_t sparc_intstack_alloc(void);
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uintptr_t sparc_intstack_top(void);
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2022-10-27 09:42:36 +02:00
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#endif
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2022-01-15 07:01:10 +01:00
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/* Chip-specific functions **************************************************/
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/* Chip specific functions defined in arch/sparc/src/<chip> */
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/* IRQs */
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2022-11-17 11:17:40 +01:00
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bool sparc_pending_irq(int irq);
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void sparc_clrpend_irq(int irq);
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2022-01-15 07:01:10 +01:00
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/* DMA */
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#ifdef CONFIG_ARCH_DMA
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2022-11-17 11:17:40 +01:00
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void weak_function sparc_dma_initialize(void);
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2022-01-15 07:01:10 +01:00
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#endif
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/* Memory management */
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#if CONFIG_MM_REGIONS > 1
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2022-11-17 11:17:40 +01:00
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void sparc_addregion(void);
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2022-01-15 07:01:10 +01:00
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#else
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2023-05-20 00:32:34 +02:00
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# define sparc_addregion()
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2022-01-15 07:01:10 +01:00
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#endif
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/* Serial output */
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2022-11-17 11:17:40 +01:00
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void sparc_lowputc(char ch);
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void sparc_earlyserialinit(void);
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void sparc_serialinit(void);
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2022-01-15 07:01:10 +01:00
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/* Network */
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#if defined(CONFIG_NET) && !defined(CONFIG_NETDEV_LATEINIT)
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2022-11-17 11:17:40 +01:00
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void sparc_netinitialize(void);
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2022-01-15 07:01:10 +01:00
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#else
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2023-05-20 00:32:34 +02:00
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# define sparc_netinitialize()
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2022-01-15 07:01:10 +01:00
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#endif
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/* USB */
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#ifdef CONFIG_USBDEV
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2022-11-17 11:17:40 +01:00
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void sparc_usbinitialize(void);
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void sparc_usbuninitialize(void);
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2022-01-15 07:01:10 +01:00
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#else
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2023-05-20 00:32:34 +02:00
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# define sparc_usbinitialize()
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# define sparc_usbuninitialize()
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2022-01-15 07:01:10 +01:00
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#endif
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2022-02-01 02:21:17 +01:00
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/* Debug ********************************************************************/
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#ifdef CONFIG_STACK_COLORATION
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2022-07-25 10:32:38 +02:00
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size_t sparc_stack_check(void *stackbase, size_t nbytes);
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2022-11-17 11:17:40 +01:00
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void sparc_stack_color(void *stackbase, size_t nbytes);
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2022-02-01 02:21:17 +01:00
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#endif
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2022-01-15 07:01:10 +01:00
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_SPARC_SRC_COMMON_UP_INTERNAL_H */
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