2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2011-04-18 01:48:01 +02:00
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* drivers/lcd/ug-9664hswag01.c
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*
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2021-03-04 07:10:42 +01:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2011-04-18 01:48:01 +02:00
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*
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2021-03-04 07:10:42 +01:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2011-04-18 01:48:01 +02:00
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*
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2021-03-04 07:10:42 +01:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2011-04-18 01:48:01 +02:00
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*
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2011-04-18 01:48:01 +02:00
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2021-03-04 08:02:21 +01:00
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/* Driver for the Univision UG-9664HSWAG01 Display with the Solomon Systech
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* SSD1305 LCD controller.
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2021-03-04 07:10:42 +01:00
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*
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2021-03-04 08:02:21 +01:00
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* Reference:
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* "Product Specification, OEL Display Module, UG-9664HSWAG01", Univision
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* Technology Inc., SAS1-6020-B, January 3, 2008.
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2021-03-04 07:10:42 +01:00
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*/
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2011-04-18 01:48:01 +02:00
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* Included Files
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2011-04-18 01:48:01 +02:00
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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2021-05-18 08:59:14 +02:00
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#include <assert.h>
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2011-04-18 01:48:01 +02:00
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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2013-07-01 16:11:54 +02:00
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#include <nuttx/spi/spi.h>
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2011-04-18 01:48:01 +02:00
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#include <nuttx/lcd/lcd.h>
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2011-04-18 19:16:24 +02:00
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#include <nuttx/lcd/ug-9664hswag01.h>
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2011-04-18 01:48:01 +02:00
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2011-04-18 19:16:24 +02:00
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#include "ssd1305.h"
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2011-04-18 01:48:01 +02:00
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2011-04-18 01:48:01 +02:00
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* Pre-processor Definitions
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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/* Configuration ************************************************************/
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2011-04-18 01:48:01 +02:00
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2011-04-18 19:16:24 +02:00
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/* UG-9664HSWAG01 Configuration Settings:
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*
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* CONFIG_UG9664HSWAG01_SPIMODE - Controls the SPI mode
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* CONFIG_UG9664HSWAG01_FREQUENCY - Define to use a different bus frequency
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* CONFIG_UG9664HSWAG01_NINTERFACES - Specifies the number of physical
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* UG-9664HSWAG01 devices that will be supported. NOTE: At present, this
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* must be undefined or defined to be 1.
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* CONFIG_UG9664HSWAG01_POWER
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* If the hardware supports a controllable OLED a power supply, this
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2020-02-23 09:50:23 +01:00
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* configuration should be defined. (See ug_power() below).
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2013-06-24 20:37:02 +02:00
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*
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2011-04-18 19:16:24 +02:00
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* Required LCD driver settings:
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* CONFIG_LCD_UG9664HSWAG01 - Enable UG-9664HSWAG01 support
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2021-03-04 08:02:21 +01:00
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* CONFIG_LCD_MAXCONTRAST should be 255, but any value >0 and <=255
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* will be accepted.
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2011-04-18 19:16:24 +02:00
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* CONFIG_LCD_MAXPOWER should be 2: 0=off, 1=dim, 2=normal
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*
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* Required SPI driver settings:
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* CONFIG_SPI_CMDDATA - Include support for cmd/data selection.
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*/
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2011-04-18 01:48:01 +02:00
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/* Verify that all configuration requirements have been met */
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2021-03-04 08:02:21 +01:00
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/* The UG-9664HSWAG01 spec says that is supports SPI mode 0,0 only.
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* However, sometimes you need to tinker with these things.
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2011-04-18 19:16:24 +02:00
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*/
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#ifndef CONFIG_UG9664HSWAG01_SPIMODE
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2011-04-19 03:16:40 +02:00
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# define CONFIG_UG9664HSWAG01_SPIMODE SPIDEV_MODE0
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2011-04-18 19:16:24 +02:00
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#endif
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/* SPI frequency */
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2011-04-18 01:48:01 +02:00
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2011-04-18 19:16:24 +02:00
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#ifndef CONFIG_UG9664HSWAG01_FREQUENCY
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2011-04-19 03:16:40 +02:00
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# define CONFIG_UG9664HSWAG01_FREQUENCY 3500000
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2011-04-18 19:16:24 +02:00
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#endif
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2021-03-04 08:02:21 +01:00
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/* CONFIG_UG9664HSWAG01_NINTERFACES determines the number of physical
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* interfaces that will be supported.
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2011-04-18 19:16:24 +02:00
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*/
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2011-04-18 01:48:01 +02:00
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2011-04-18 19:16:24 +02:00
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#ifndef CONFIG_UG9664HSWAG01_NINTERFACES
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# define CONFIG_UG9664HSWAG01_NINTERFACES 1
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#endif
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#if CONFIG_UG9664HSWAG01_NINTERFACES != 1
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# warning "Only a single UG-9664HSWAG01 interface is supported"
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# undef CONFIG_UG9664HSWAG01_NINTERFACES
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# define CONFIG_UG9664HSWAG01_NINTERFACES 1
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#endif
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2013-06-24 20:37:02 +02:00
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/* Orientation */
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#if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT)
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# warning "No support for portrait modes"
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# define CONFIG_LCD_LANDSCAPE 1
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# undef CONFIG_LCD_PORTRAIT
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# undef CONFIG_LCD_RLANDSCAPE
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# undef CONFIG_LCD_RPORTRAIT
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#endif
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2011-04-18 19:16:24 +02:00
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/* Check contrast selection */
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#ifndef CONFIG_LCD_MAXCONTRAST
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# define CONFIG_LCD_MAXCONTRAST 255
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#endif
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#if CONFIG_LCD_MAXCONTRAST <= 0 || CONFIG_LCD_MAXCONTRAST > 255
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# error "CONFIG_LCD_MAXCONTRAST exceeds supported maximum"
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#endif
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#if CONFIG_LCD_MAXCONTRAST < 255
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# warning "Optimal setting of CONFIG_LCD_MAXCONTRAST is 255"
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#endif
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/* Check power setting */
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#if !defined(CONFIG_LCD_MAXPOWER)
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# define CONFIG_LCD_MAXPOWER 2
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#endif
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#if CONFIG_LCD_MAXPOWER != 2
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# warning "CONFIG_LCD_MAXPOWER should be 2"
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# undef CONFIG_LCD_MAXPOWER
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# define CONFIG_LCD_MAXPOWER 2
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#endif
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/* The OLED requires CMD/DATA SPI support */
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#ifndef CONFIG_SPI_CMDDATA
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# error "CONFIG_SPI_CMDDATA must be defined in your NuttX configuration"
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#endif
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2021-03-04 08:02:21 +01:00
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/* Color Properties *********************************************************/
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2011-04-18 01:48:01 +02:00
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/* The SSD1305 display controller can handle a resolution of 132x64. The OLED
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* on the base board is 96x64.
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*/
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#define UG_DEV_XRES 132
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#define UG_XOFFSET 18
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/* Display Resolution */
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2013-06-24 20:37:02 +02:00
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#define UG_LCD_XRES 96
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#define UG_LCD_YRES 64
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#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
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# define UG_XRES UG_LCD_XRES
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# define UG_YRES UG_LCD_YRES
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#else
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# define UG_XRES UG_LCD_YRES
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# define UG_YRES UG_LCD_XRES
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#endif
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2011-04-18 01:48:01 +02:00
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/* Color depth and format */
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#define UG_BPP 1
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#define UG_COLORFMT FB_FMT_Y1
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2012-11-07 17:04:10 +01:00
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/* Bytes per logical row and actual device row */
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2011-04-18 01:48:01 +02:00
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2011-04-19 03:16:40 +02:00
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#define UG_XSTRIDE (UG_XRES >> 3) /* Pixels arrange "horizontally for user" */
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#define UG_YSTRIDE (UG_YRES >> 3) /* But actual device arrangement is "vertical" */
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2011-04-18 01:48:01 +02:00
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/* The size of the shadow frame buffer */
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2011-04-19 03:16:40 +02:00
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#define UG_FBSIZE (UG_XRES * UG_YSTRIDE)
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2013-06-24 20:37:02 +02:00
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/* Orientation */
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#if defined(CONFIG_LCD_LANDSCAPE)
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# undef UG_LCD_REVERSEX
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# undef UG_LCD_REVERSEY
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#elif defined(CONFIG_LCD_RLANDSCAPE)
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# define UG_LCD_REVERSEX 1
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# define UG_LCD_REVERSEY 1
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#endif
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2011-04-19 03:16:40 +02:00
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/* Bit helpers */
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#define LS_BIT (1 << 0)
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#define MS_BIT (1 << 7)
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2011-04-18 01:48:01 +02:00
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2011-04-18 01:48:01 +02:00
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* Private Type Definition
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2011-04-18 01:48:01 +02:00
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/* This structure describes the state of this driver */
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struct ug_dev_s
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{
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2020-02-22 19:31:14 +01:00
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/* Publicly visible device structure */
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2011-04-18 01:48:01 +02:00
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struct lcd_dev_s dev;
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/* Private LCD-specific information follows */
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FAR struct spi_dev_s *spi;
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uint8_t contrast;
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2011-04-18 22:13:54 +02:00
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uint8_t powered;
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2011-04-18 19:16:24 +02:00
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2021-03-04 08:02:21 +01:00
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/* The SSD1305 does not support reading from the display memory in SPI
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* mode.Since there is 1 BPP and access is byte-by-byte, it is
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* necessary to keep a shadow copy of the framebuffer memory.
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2015-10-04 23:04:00 +02:00
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*/
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2011-04-18 19:16:24 +02:00
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2011-04-18 22:13:54 +02:00
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uint8_t fb[UG_FBSIZE];
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2011-04-18 01:48:01 +02:00
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};
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2011-04-18 01:48:01 +02:00
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* Private Function Protototypes
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2011-04-18 01:48:01 +02:00
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/* SPI helpers */
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static void ug_select(FAR struct spi_dev_s *spi);
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static void ug_deselect(FAR struct spi_dev_s *spi);
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/* LCD Data Transfer Methods */
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2022-06-17 12:17:18 +02:00
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static int ug_putrun(FAR struct lcd_dev_s *dev,
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fb_coord_t row, fb_coord_t col,
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2021-03-04 08:02:21 +01:00
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FAR const uint8_t *buffer,
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2011-04-18 01:48:01 +02:00
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size_t npixels);
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2022-06-17 12:17:18 +02:00
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static int ug_getrun(FAR struct lcd_dev_s *dev,
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fb_coord_t row, fb_coord_t col,
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2021-03-04 08:02:21 +01:00
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FAR uint8_t *buffer,
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2011-04-18 01:48:01 +02:00
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size_t npixels);
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/* LCD Configuration */
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static int ug_getvideoinfo(FAR struct lcd_dev_s *dev,
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FAR struct fb_videoinfo_s *vinfo);
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2021-03-04 08:02:21 +01:00
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static int ug_getplaneinfo(FAR struct lcd_dev_s *dev,
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unsigned int planeno,
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2011-04-18 01:48:01 +02:00
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FAR struct lcd_planeinfo_s *pinfo);
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/* LCD RGB Mapping */
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#ifdef CONFIG_FB_CMAP
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# error "RGB color mapping not supported by this driver"
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#endif
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/* Cursor Controls */
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#ifdef CONFIG_FB_HWCURSOR
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# error "Cursor control not supported by this driver"
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#endif
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/* LCD Specific Controls */
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static int ug_getpower(struct lcd_dev_s *dev);
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static int ug_setpower(struct lcd_dev_s *dev, int power);
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static int ug_getcontrast(struct lcd_dev_s *dev);
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static int ug_setcontrast(struct lcd_dev_s *dev, unsigned int contrast);
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/* Initialization */
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static inline void up_clear(FAR struct ug_dev_s *priv);
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2011-04-18 01:48:01 +02:00
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* Private Data
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
|
2011-04-18 01:48:01 +02:00
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/* This is working memory allocated by the LCD driver for each LCD device
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* and for each color plane. This memory will hold one raster line of data.
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* The size of the allocated run buffer must therefore be at least
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* (bpp * xres / 8). Actual alignment of the buffer must conform to the
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* bitwidth of the underlying pixel type.
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*
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* If there are multiple planes, they may share the same working buffer
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* because different planes will not be operate on concurrently. However,
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* if there are multiple LCD devices, they must each have unique run buffers.
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*/
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2021-03-04 08:02:21 +01:00
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static uint8_t g_runbuffer[UG_XSTRIDE + 1];
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2011-04-18 01:48:01 +02:00
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/* This structure describes the overall LCD video controller */
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static const struct fb_videoinfo_s g_videoinfo =
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{
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.fmt = UG_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
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.xres = UG_XRES, /* Horizontal resolution in pixel columns */
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.yres = UG_YRES, /* Vertical resolution in pixel rows */
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.nplanes = 1, /* Number of color planes supported */
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};
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/* This is the standard, NuttX Plane information object */
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|
2013-06-24 20:37:02 +02:00
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static const struct lcd_planeinfo_s g_planeinfo =
|
2011-04-18 01:48:01 +02:00
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{
|
2015-10-10 18:41:00 +02:00
|
|
|
.putrun = ug_putrun, /* Put a run into LCD memory */
|
|
|
|
.getrun = ug_getrun, /* Get a run from LCD memory */
|
|
|
|
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
|
|
|
|
.bpp = UG_BPP, /* Bits-per-pixel */
|
2011-04-18 01:48:01 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
/* This is the standard, NuttX LCD driver object */
|
|
|
|
|
2013-06-24 20:37:02 +02:00
|
|
|
static struct ug_dev_s g_ugdev =
|
2011-04-18 01:48:01 +02:00
|
|
|
{
|
|
|
|
.dev =
|
|
|
|
{
|
|
|
|
/* LCD Configuration */
|
2013-06-24 20:37:02 +02:00
|
|
|
|
2011-04-18 01:48:01 +02:00
|
|
|
.getvideoinfo = ug_getvideoinfo,
|
|
|
|
.getplaneinfo = ug_getplaneinfo,
|
|
|
|
|
|
|
|
/* LCD RGB Mapping -- Not supported */
|
2021-03-04 08:02:21 +01:00
|
|
|
|
2011-04-18 01:48:01 +02:00
|
|
|
/* Cursor Controls -- Not supported */
|
|
|
|
|
|
|
|
/* LCD Specific Controls */
|
|
|
|
|
|
|
|
.getpower = ug_getpower,
|
|
|
|
.setpower = ug_setpower,
|
|
|
|
.getcontrast = ug_getcontrast,
|
|
|
|
.setcontrast = ug_setcontrast,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 01:48:01 +02:00
|
|
|
* Private Functions
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 22:13:54 +02:00
|
|
|
* Name: ug_powerstring
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Convert the power setting to a string.
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 22:13:54 +02:00
|
|
|
|
|
|
|
static inline FAR const char *ug_powerstring(uint8_t power)
|
|
|
|
{
|
|
|
|
if (power == UG_POWER_OFF)
|
|
|
|
{
|
|
|
|
return "OFF";
|
|
|
|
}
|
|
|
|
else if (power == UG_POWER_DIM)
|
|
|
|
{
|
|
|
|
return "DIM";
|
|
|
|
}
|
|
|
|
else if (power == UG_POWER_ON)
|
|
|
|
{
|
|
|
|
return "ON";
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return "ERROR";
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2017-04-22 00:33:14 +02:00
|
|
|
* Name: ug_select
|
2011-04-18 01:48:01 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Select the SPI, locking and re-configuring if necessary
|
|
|
|
*
|
2018-03-13 16:52:27 +01:00
|
|
|
* Input Parameters:
|
2011-04-18 01:48:01 +02:00
|
|
|
* spi - Reference to the SPI driver structure
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* Assumptions:
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
static void ug_select(FAR struct spi_dev_s *spi)
|
|
|
|
{
|
2021-03-04 08:02:21 +01:00
|
|
|
/* Select UG-9664HSWAG01 chip (locking the SPI bus in case there are
|
|
|
|
* multiple devices competing for the SPI bus
|
2011-04-18 01:48:01 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
SPI_LOCK(spi, true);
|
2017-04-29 20:26:52 +02:00
|
|
|
SPI_SELECT(spi, SPIDEV_DISPLAY(0), true);
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2011-04-18 19:16:24 +02:00
|
|
|
/* Now make sure that the SPI bus is configured for the UG-9664HSWAG01 (it
|
2011-04-18 01:48:01 +02:00
|
|
|
* might have gotten configured for a different device while unlocked)
|
|
|
|
*/
|
|
|
|
|
|
|
|
SPI_SETMODE(spi, CONFIG_UG9664HSWAG01_SPIMODE);
|
|
|
|
SPI_SETBITS(spi, 8);
|
2020-01-02 17:49:34 +01:00
|
|
|
SPI_HWFEATURES(spi, 0);
|
2011-04-18 01:48:01 +02:00
|
|
|
#ifdef CONFIG_UG9664HSWAG01_FREQUENCY
|
2020-01-02 17:49:34 +01:00
|
|
|
SPI_SETFREQUENCY(spi, CONFIG_UG9664HSWAG01_FREQUENCY);
|
2011-04-18 01:48:01 +02:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2017-04-22 00:33:14 +02:00
|
|
|
* Name: ug_deselect
|
2011-04-18 01:48:01 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* De-select the SPI
|
|
|
|
*
|
2018-03-13 16:52:27 +01:00
|
|
|
* Input Parameters:
|
2011-04-18 01:48:01 +02:00
|
|
|
* spi - Reference to the SPI driver structure
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* Assumptions:
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
static void ug_deselect(FAR struct spi_dev_s *spi)
|
|
|
|
{
|
2011-04-18 19:16:24 +02:00
|
|
|
/* De-select UG-9664HSWAG01 chip and relinquish the SPI bus. */
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2017-04-29 20:26:52 +02:00
|
|
|
SPI_SELECT(spi, SPIDEV_DISPLAY(0), false);
|
2011-04-18 01:48:01 +02:00
|
|
|
SPI_LOCK(spi, false);
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 01:48:01 +02:00
|
|
|
* Name: ug_putrun
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This method can be used to write a partial raster line to the LCD:
|
|
|
|
*
|
2022-06-17 12:17:18 +02:00
|
|
|
* dev - The lcd device
|
2011-04-18 01:48:01 +02:00
|
|
|
* row - Starting row to write to (range: 0 <= row < yres)
|
|
|
|
* col - Starting column to write to (range: 0 <= col <= xres-npixels)
|
|
|
|
* buffer - The buffer containing the run to be written to the LCD
|
|
|
|
* npixels - The number of pixels to write to the LCD
|
|
|
|
* (range: 0 < npixels <= xres-col)
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2022-06-17 12:17:18 +02:00
|
|
|
static int ug_putrun(FAR struct lcd_dev_s *dev,
|
|
|
|
fb_coord_t row, fb_coord_t col,
|
2021-03-04 08:02:21 +01:00
|
|
|
FAR const uint8_t *buffer,
|
|
|
|
size_t npixels)
|
2011-04-18 01:48:01 +02:00
|
|
|
{
|
2022-06-17 12:17:18 +02:00
|
|
|
FAR struct ug_dev_s *priv = (FAR struct ug_dev_s *)dev;
|
2011-04-18 19:16:24 +02:00
|
|
|
FAR uint8_t *fbptr;
|
2011-04-19 03:16:40 +02:00
|
|
|
FAR uint8_t *ptr;
|
2011-04-18 01:48:01 +02:00
|
|
|
uint8_t devcol;
|
2011-04-19 03:16:40 +02:00
|
|
|
uint8_t fbmask;
|
2011-04-18 01:48:01 +02:00
|
|
|
uint8_t page;
|
2011-04-19 03:16:40 +02:00
|
|
|
uint8_t usrmask;
|
2011-04-18 01:48:01 +02:00
|
|
|
uint8_t i;
|
|
|
|
int pixlen;
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
|
2011-04-18 01:48:01 +02:00
|
|
|
DEBUGASSERT(buffer);
|
|
|
|
|
|
|
|
/* Clip the run to the display */
|
|
|
|
|
|
|
|
pixlen = npixels;
|
|
|
|
if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)UG_XRES)
|
|
|
|
{
|
|
|
|
pixlen = (int)UG_XRES - (int)col;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Verify that some portion of the run remains on the display */
|
|
|
|
|
2011-04-18 22:13:54 +02:00
|
|
|
if (pixlen <= 0 || row > UG_YRES)
|
2011-04-18 01:48:01 +02:00
|
|
|
{
|
2011-04-18 19:16:24 +02:00
|
|
|
return OK;
|
2011-04-18 01:48:01 +02:00
|
|
|
}
|
|
|
|
|
2013-06-24 20:37:02 +02:00
|
|
|
/* Perform coordinate conversion for reverse landscape mode.
|
|
|
|
* If the rows are reversed then rows are are a mirror reflection of
|
|
|
|
* top to bottom.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef UG_LCD_REVERSEY
|
2021-03-04 08:02:21 +01:00
|
|
|
row = (UG_YRES - 1) - row;
|
2013-06-24 20:37:02 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* If the column is switched then the start of the run is the mirror of
|
|
|
|
* the end of the run.
|
|
|
|
*
|
|
|
|
* col+pixlen-1
|
|
|
|
* col |
|
|
|
|
* 0 | | XRES
|
|
|
|
* . S>>>>>>E .
|
|
|
|
* . E<<<<<<S .
|
|
|
|
* | |
|
|
|
|
* | `-(XRES-1)-col
|
|
|
|
* ` (XRES-1)-col-(pixlen-1)
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef UG_LCD_REVERSEX
|
2021-03-04 08:02:21 +01:00
|
|
|
col = (UG_XRES - 1) - col;
|
2013-06-24 20:37:02 +02:00
|
|
|
col -= (pixlen - 1);
|
|
|
|
#endif
|
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
/* Get the page number. The range of 64 lines is divided up into eight
|
|
|
|
* pages of 8 lines each.
|
|
|
|
*/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
page = row >> 3;
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
/* Update the shadow frame buffer memory. First determine the pixel
|
|
|
|
* position in the frame buffer memory. Pixels are organized like
|
|
|
|
* this:
|
|
|
|
*
|
|
|
|
* --------+---+---+---+---+-...-+-----+
|
|
|
|
* Segment | 0 | 1 | 2 | 3 | ... | 131 |
|
|
|
|
* --------+---+---+---+---+-...-+-----+
|
|
|
|
* Bit 0 | | X | | | | |
|
|
|
|
* Bit 1 | | X | | | | |
|
|
|
|
* Bit 2 | | X | | | | |
|
|
|
|
* Bit 3 | | X | | | | |
|
|
|
|
* Bit 4 | | X | | | | |
|
|
|
|
* Bit 5 | | X | | | | |
|
|
|
|
* Bit 6 | | X | | | | |
|
2013-06-24 20:37:02 +02:00
|
|
|
* Bit 7 | | X | | | | |
|
2011-04-19 03:16:40 +02:00
|
|
|
* --------+---+---+---+---+-...-+-----+
|
|
|
|
*
|
|
|
|
* So, in order to draw a white, horizontal line, at row 45. we
|
|
|
|
* would have to modify all of the bytes in page 45/8 = 5. We
|
|
|
|
* would have to set bit 45%8 = 5 in every byte in the page.
|
|
|
|
*/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
fbmask = 1 << (row & 7);
|
|
|
|
fbptr = &priv->fb[page * UG_XRES + col];
|
2013-06-24 20:37:02 +02:00
|
|
|
#ifdef UG_LCD_REVERSEX
|
|
|
|
ptr = fbptr + (pixlen - 1);
|
|
|
|
#else
|
2011-04-19 03:16:40 +02:00
|
|
|
ptr = fbptr;
|
2013-06-24 20:37:02 +02:00
|
|
|
#endif
|
|
|
|
|
2017-11-25 20:13:30 +01:00
|
|
|
#ifdef CONFIG_LCD_PACKEDMSFIRST
|
2011-04-19 03:16:40 +02:00
|
|
|
usrmask = MS_BIT;
|
|
|
|
#else
|
|
|
|
usrmask = LS_BIT;
|
|
|
|
#endif
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
for (i = 0; i < pixlen; i++)
|
|
|
|
{
|
2011-04-18 01:48:01 +02:00
|
|
|
/* Set or clear the corresponding bit */
|
|
|
|
|
2013-06-24 20:37:02 +02:00
|
|
|
#ifdef UG_LCD_REVERSEX
|
|
|
|
if ((*buffer & usrmask) != 0)
|
|
|
|
{
|
|
|
|
*ptr-- |= fbmask;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
*ptr-- &= ~fbmask;
|
|
|
|
}
|
|
|
|
#else
|
2011-04-19 03:16:40 +02:00
|
|
|
if ((*buffer & usrmask) != 0)
|
2011-04-18 01:48:01 +02:00
|
|
|
{
|
2011-04-19 03:16:40 +02:00
|
|
|
*ptr++ |= fbmask;
|
2011-04-18 01:48:01 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2011-04-19 03:16:40 +02:00
|
|
|
*ptr++ &= ~fbmask;
|
2011-04-18 01:48:01 +02:00
|
|
|
}
|
2013-06-24 20:37:02 +02:00
|
|
|
#endif
|
2011-04-18 19:16:24 +02:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
/* Inc/Decrement to the next source pixel */
|
2011-04-18 19:16:24 +02:00
|
|
|
|
2017-11-25 20:13:30 +01:00
|
|
|
#ifdef CONFIG_LCD_PACKEDMSFIRST
|
2011-04-19 03:16:40 +02:00
|
|
|
if (usrmask == LS_BIT)
|
|
|
|
{
|
|
|
|
buffer++;
|
|
|
|
usrmask = MS_BIT;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
usrmask >>= 1;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
if (usrmask == MS_BIT)
|
2011-04-18 19:16:24 +02:00
|
|
|
{
|
|
|
|
buffer++;
|
2011-04-19 03:16:40 +02:00
|
|
|
usrmask = LS_BIT;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
usrmask <<= 1;
|
2011-04-18 19:16:24 +02:00
|
|
|
}
|
2011-04-19 03:16:40 +02:00
|
|
|
#endif
|
2011-04-18 01:48:01 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Offset the column position to account for smaller horizontal
|
|
|
|
* display range.
|
|
|
|
*/
|
|
|
|
|
|
|
|
devcol = col + UG_XOFFSET;
|
|
|
|
|
|
|
|
/* Select and lock the device */
|
|
|
|
|
|
|
|
ug_select(priv->spi);
|
|
|
|
|
|
|
|
/* Select command transfer */
|
|
|
|
|
2017-04-29 20:26:52 +02:00
|
|
|
SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY(0), true);
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
/* Set the starting position for the run */
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
SPI_SEND(priv->spi, SSD1305_SETPAGESTART + page); /* Set the page start */
|
2020-01-02 17:49:34 +01:00
|
|
|
SPI_SEND(priv->spi, SSD1305_SETCOLL + (devcol & 0x0f)); /* Set the low column */
|
|
|
|
SPI_SEND(priv->spi, SSD1305_SETCOLH + (devcol >> 4)); /* Set the high column */
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
/* Select data transfer */
|
|
|
|
|
2017-04-29 20:26:52 +02:00
|
|
|
SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY(0), false);
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
/* Then transfer all of the data */
|
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
SPI_SNDBLOCK(priv->spi, fbptr, pixlen);
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
/* Unlock and de-select the device */
|
|
|
|
|
2011-04-18 19:16:24 +02:00
|
|
|
ug_deselect(priv->spi);
|
2011-04-18 01:48:01 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 01:48:01 +02:00
|
|
|
* Name: ug_getrun
|
|
|
|
*
|
|
|
|
* Description:
|
2013-06-24 20:37:02 +02:00
|
|
|
* This method can be used to read a partial raster line from the LCD.
|
2011-04-18 01:48:01 +02:00
|
|
|
*
|
2022-06-17 12:17:18 +02:00
|
|
|
* dev - The lcd device
|
2011-04-18 01:48:01 +02:00
|
|
|
* row - Starting row to read from (range: 0 <= row < yres)
|
|
|
|
* col - Starting column to read read (range: 0 <= col <= xres-npixels)
|
|
|
|
* buffer - The buffer in which to return the run read from the LCD
|
|
|
|
* npixels - The number of pixels to read from the LCD
|
|
|
|
* (range: 0 < npixels <= xres-col)
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2022-06-17 12:17:18 +02:00
|
|
|
static int ug_getrun(FAR struct lcd_dev_s *dev,
|
|
|
|
fb_coord_t row, fb_coord_t col,
|
|
|
|
FAR uint8_t *buffer,
|
2011-04-18 22:13:54 +02:00
|
|
|
size_t npixels)
|
2011-04-18 01:48:01 +02:00
|
|
|
{
|
2022-06-17 12:17:18 +02:00
|
|
|
FAR struct ug_dev_s *priv = (FAR struct ug_dev_s *)dev;
|
2011-04-19 03:16:40 +02:00
|
|
|
FAR uint8_t *fbptr;
|
|
|
|
uint8_t page;
|
|
|
|
uint8_t fbmask;
|
|
|
|
uint8_t usrmask;
|
2011-04-18 01:48:01 +02:00
|
|
|
uint8_t i;
|
|
|
|
int pixlen;
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
ginfo("row: %d col: %d npixels: %d\n", row, col, npixels);
|
2011-04-18 01:48:01 +02:00
|
|
|
DEBUGASSERT(buffer);
|
|
|
|
|
|
|
|
/* Clip the run to the display */
|
|
|
|
|
|
|
|
pixlen = npixels;
|
|
|
|
if ((unsigned int)col + (unsigned int)pixlen > (unsigned int)UG_XRES)
|
|
|
|
{
|
|
|
|
pixlen = (int)UG_XRES - (int)col;
|
|
|
|
}
|
|
|
|
|
2011-04-18 22:13:54 +02:00
|
|
|
/* Verify that some portion of the run is actually the display */
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2011-04-18 22:13:54 +02:00
|
|
|
if (pixlen <= 0 || row > UG_YRES)
|
|
|
|
{
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2013-06-24 20:37:02 +02:00
|
|
|
/* Perform coordinate conversion for reverse landscape mode.
|
|
|
|
* If the rows are reversed then rows are are a mirror reflection of
|
|
|
|
* top to bottom.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef UG_LCD_REVERSEY
|
2021-03-04 08:02:21 +01:00
|
|
|
row = (UG_YRES - 1) - row;
|
2013-06-24 20:37:02 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* If the column is switched then the start of the run is the mirror of
|
|
|
|
* the end of the run.
|
|
|
|
*
|
|
|
|
* col+pixlen-1
|
|
|
|
* col |
|
|
|
|
* 0 | | XRES
|
|
|
|
* . S>>>>>>E .
|
|
|
|
* . E<<<<<<S .
|
|
|
|
* | |
|
|
|
|
* | `-(XRES-1)-col
|
|
|
|
* ` (XRES-1)-col-(pixlen-1)
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef UG_LCD_REVERSEX
|
2021-03-04 08:02:21 +01:00
|
|
|
col = (UG_XRES - 1) - col;
|
2013-06-24 20:37:02 +02:00
|
|
|
#endif
|
|
|
|
|
2011-04-18 22:13:54 +02:00
|
|
|
/* Then transfer the display data from the shadow frame buffer memory */
|
2021-03-04 08:02:21 +01:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
/* Get the page number. The range of 64 lines is divided up into eight
|
|
|
|
* pages of 8 lines each.
|
|
|
|
*/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
page = row >> 3;
|
2011-04-18 19:16:24 +02:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
/* Update the shadow frame buffer memory. First determine the pixel
|
|
|
|
* position in the frame buffer memory. Pixels are organized like
|
|
|
|
* this:
|
|
|
|
*
|
|
|
|
* --------+---+---+---+---+-...-+-----+
|
|
|
|
* Segment | 0 | 1 | 2 | 3 | ... | 131 |
|
|
|
|
* --------+---+---+---+---+-...-+-----+
|
|
|
|
* Bit 0 | | X | | | | |
|
|
|
|
* Bit 1 | | X | | | | |
|
|
|
|
* Bit 2 | | X | | | | |
|
|
|
|
* Bit 3 | | X | | | | |
|
|
|
|
* Bit 4 | | X | | | | |
|
|
|
|
* Bit 5 | | X | | | | |
|
|
|
|
* Bit 6 | | X | | | | |
|
2013-06-24 20:37:02 +02:00
|
|
|
* Bit 7 | | X | | | | |
|
2011-04-19 03:16:40 +02:00
|
|
|
* --------+---+---+---+---+-...-+-----+
|
|
|
|
*
|
|
|
|
* So, in order to draw a white, horizontal line, at row 45. we
|
|
|
|
* would have to modify all of the bytes in page 45/8 = 5. We
|
|
|
|
* would have to set bit 45%8 = 5 in every byte in the page.
|
|
|
|
*/
|
2011-04-18 19:16:24 +02:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
fbmask = 1 << (row & 7);
|
|
|
|
fbptr = &priv->fb[page * UG_XRES + col];
|
2013-06-24 20:37:02 +02:00
|
|
|
|
2017-11-25 20:13:30 +01:00
|
|
|
#ifdef CONFIG_LCD_PACKEDMSFIRST
|
2011-04-19 03:16:40 +02:00
|
|
|
usrmask = MS_BIT;
|
|
|
|
#else
|
|
|
|
usrmask = LS_BIT;
|
|
|
|
#endif
|
2011-04-18 19:16:24 +02:00
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
*buffer = 0;
|
|
|
|
for (i = 0; i < pixlen; i++)
|
|
|
|
{
|
|
|
|
/* Set or clear the corresponding bit */
|
2013-06-24 20:37:02 +02:00
|
|
|
|
|
|
|
#ifdef UG_LCD_REVERSEX
|
|
|
|
uint8_t byte = *fbptr--;
|
|
|
|
#else
|
2011-04-19 03:16:40 +02:00
|
|
|
uint8_t byte = *fbptr++;
|
2013-06-24 20:37:02 +02:00
|
|
|
#endif
|
|
|
|
|
2011-04-19 03:16:40 +02:00
|
|
|
if ((byte & fbmask) != 0)
|
2011-04-18 19:16:24 +02:00
|
|
|
{
|
2011-04-19 03:16:40 +02:00
|
|
|
*buffer |= usrmask;
|
2011-04-18 19:16:24 +02:00
|
|
|
}
|
|
|
|
|
2011-04-19 03:21:55 +02:00
|
|
|
/* Inc/Decrement to the next destination pixel. Hmmmm. It looks like
|
|
|
|
* this logic could write past the end of the user buffer. Revisit
|
|
|
|
* this!
|
|
|
|
*/
|
2011-04-18 19:16:24 +02:00
|
|
|
|
2017-11-25 20:13:30 +01:00
|
|
|
#ifdef CONFIG_LCD_PACKEDMSFIRST
|
2011-04-19 03:16:40 +02:00
|
|
|
if (usrmask == LS_BIT)
|
2011-04-18 19:16:24 +02:00
|
|
|
{
|
|
|
|
buffer++;
|
2011-04-19 03:21:55 +02:00
|
|
|
*buffer = 0;
|
2011-04-19 03:16:40 +02:00
|
|
|
usrmask = MS_BIT;
|
2011-04-18 19:16:24 +02:00
|
|
|
}
|
2011-04-19 03:16:40 +02:00
|
|
|
else
|
|
|
|
{
|
|
|
|
usrmask >>= 1;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
if (usrmask == MS_BIT)
|
|
|
|
{
|
|
|
|
buffer++;
|
|
|
|
*buffer = 0;
|
|
|
|
usrmask = LS_BIT;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
usrmask <<= 1;
|
|
|
|
}
|
|
|
|
#endif
|
2011-04-18 19:16:24 +02:00
|
|
|
}
|
|
|
|
|
2011-04-18 01:48:01 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 01:48:01 +02:00
|
|
|
* Name: ug_getvideoinfo
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get information about the LCD video controller configuration.
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
static int ug_getvideoinfo(FAR struct lcd_dev_s *dev,
|
|
|
|
FAR struct fb_videoinfo_s *vinfo)
|
|
|
|
{
|
|
|
|
DEBUGASSERT(dev && vinfo);
|
2016-06-11 19:59:51 +02:00
|
|
|
ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
|
2021-03-04 08:02:21 +01:00
|
|
|
g_videoinfo.fmt, g_videoinfo.xres,
|
|
|
|
g_videoinfo.yres, g_videoinfo.nplanes);
|
2011-04-18 01:48:01 +02:00
|
|
|
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 01:48:01 +02:00
|
|
|
* Name: ug_getplaneinfo
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get information about the configuration of each LCD color plane.
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
static int ug_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
|
|
|
|
FAR struct lcd_planeinfo_s *pinfo)
|
|
|
|
{
|
|
|
|
DEBUGASSERT(dev && pinfo && planeno == 0);
|
2016-06-11 19:59:51 +02:00
|
|
|
ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
|
2011-04-18 01:48:01 +02:00
|
|
|
memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
|
2022-06-17 12:17:18 +02:00
|
|
|
pinfo->dev = dev;
|
2011-04-18 01:48:01 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 01:48:01 +02:00
|
|
|
* Name: ug_getpower
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* Get the LCD panel power status
|
|
|
|
* (0: full off - CONFIG_LCD_MAXPOWER: full on).
|
|
|
|
* On backlit LCDs, this setting may correspond to the backlight setting.
|
2011-04-18 01:48:01 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
static int ug_getpower(struct lcd_dev_s *dev)
|
|
|
|
{
|
|
|
|
struct ug_dev_s *priv = (struct ug_dev_s *)dev;
|
2011-04-18 19:16:24 +02:00
|
|
|
DEBUGASSERT(priv);
|
2016-06-11 19:59:51 +02:00
|
|
|
ginfo("powered: %s\n", ug_powerstring(priv->powered));
|
2011-04-18 22:13:54 +02:00
|
|
|
return priv->powered;
|
2011-04-18 01:48:01 +02:00
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 01:48:01 +02:00
|
|
|
* Name: ug_setpower
|
|
|
|
*
|
|
|
|
* Description:
|
2021-03-04 08:02:21 +01:00
|
|
|
* Enable/disable LCD panel power
|
|
|
|
* (0: full off - CONFIG_LCD_MAXPOWER: full on).
|
|
|
|
* On backlit LCDs, this setting may correspond to the backlight setting.
|
2011-04-18 01:48:01 +02:00
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
static int ug_setpower(struct lcd_dev_s *dev, int power)
|
|
|
|
{
|
|
|
|
struct ug_dev_s *priv = (struct ug_dev_s *)dev;
|
|
|
|
|
2011-04-18 19:16:24 +02:00
|
|
|
DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER);
|
2016-06-11 19:59:51 +02:00
|
|
|
ginfo("power: %s powered: %s\n",
|
2011-04-18 22:13:54 +02:00
|
|
|
ug_powerstring(power), ug_powerstring(priv->powered));
|
2011-04-18 19:16:24 +02:00
|
|
|
|
|
|
|
/* Select and lock the device */
|
|
|
|
|
|
|
|
ug_select(priv->spi);
|
2011-04-18 22:13:54 +02:00
|
|
|
if (power <= UG_POWER_OFF)
|
2011-04-18 19:16:24 +02:00
|
|
|
{
|
|
|
|
/* Turn the display off */
|
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
SPI_SEND(priv->spi, SSD1305_DISPOFF); /* Display off */
|
2011-04-18 01:48:01 +02:00
|
|
|
|
2011-04-18 19:16:24 +02:00
|
|
|
/* Remove power to the device */
|
|
|
|
|
|
|
|
ug_power(0, false);
|
2011-04-18 22:13:54 +02:00
|
|
|
priv->powered = UG_POWER_OFF;
|
2011-04-18 19:16:24 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Turn the display on, dim or normal */
|
|
|
|
|
2011-04-18 22:13:54 +02:00
|
|
|
if (power == UG_POWER_DIM)
|
2011-04-18 19:16:24 +02:00
|
|
|
{
|
2020-01-02 17:49:34 +01:00
|
|
|
SPI_SEND(priv->spi, SSD1305_DISPONDIM); /* Display on, dim mode */
|
2011-04-18 19:16:24 +02:00
|
|
|
}
|
2011-04-18 22:13:54 +02:00
|
|
|
else /* if (power > UG_POWER_DIM) */
|
2011-04-18 19:16:24 +02:00
|
|
|
{
|
2020-01-02 17:49:34 +01:00
|
|
|
SPI_SEND(priv->spi, SSD1305_DISPON); /* Display on, normal mode */
|
2011-04-18 22:13:54 +02:00
|
|
|
power = UG_POWER_ON;
|
2011-04-18 19:16:24 +02:00
|
|
|
}
|
2021-03-04 08:02:21 +01:00
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
SPI_SEND(priv->spi, SSD1305_DISPRAM); /* Resume to RAM content display */
|
2011-04-18 19:16:24 +02:00
|
|
|
|
|
|
|
/* Restore power to the device */
|
|
|
|
|
|
|
|
ug_power(0, true);
|
2011-04-18 22:13:54 +02:00
|
|
|
priv->powered = power;
|
2011-04-18 19:16:24 +02:00
|
|
|
}
|
2021-03-04 08:02:21 +01:00
|
|
|
|
2011-04-18 19:16:24 +02:00
|
|
|
ug_deselect(priv->spi);
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 01:48:01 +02:00
|
|
|
* Name: ug_getcontrast
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST).
|
|
|
|
*
|
2021-03-04 08:02:21 +01:00
|
|
|
****************************************************************************/
|
2011-04-18 01:48:01 +02:00
|
|
|
|
|
|
|
static int ug_getcontrast(struct lcd_dev_s *dev)
|
|
|
|
{
|
|
|
|
struct ug_dev_s *priv = (struct ug_dev_s *)dev;
|
|
|
|
DEBUGASSERT(priv);
|
2011-04-18 19:16:24 +02:00
|
|
|
return (int)priv->contrast;
|
2011-04-18 01:48:01 +02:00
|
|
|
}
|
|
|
|
|
2021-03-04 08:02:21 +01:00
|
|
|
/****************************************************************************
|
2011-04-18 01:48:01 +02:00
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* Name: ug_setcontrast
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*
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* Description:
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* Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST).
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*
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2011-04-18 01:48:01 +02:00
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static int ug_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
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{
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struct ug_dev_s *priv = (struct ug_dev_s *)dev;
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2016-06-11 19:59:51 +02:00
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ginfo("contrast: %d\n", contrast);
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2011-04-18 01:48:01 +02:00
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DEBUGASSERT(priv);
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if (contrast > 255)
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{
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return -EINVAL;
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}
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/* Select and lock the device */
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ug_select(priv->spi);
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/* Select command transfer */
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2017-04-29 20:26:52 +02:00
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SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY(0), true);
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2011-04-18 01:48:01 +02:00
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/* Set the contrast */
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2020-01-02 17:49:34 +01:00
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SPI_SEND(priv->spi, SSD1305_SETCONTRAST); /* Set contrast control register */
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SPI_SEND(priv->spi, contrast); /* Data 1: Set 1 of 256 contrast steps */
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2011-04-18 01:48:01 +02:00
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priv->contrast = contrast;
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2013-06-24 20:37:02 +02:00
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2011-04-18 01:48:01 +02:00
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/* Unlock and de-select the device */
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2011-04-18 19:16:24 +02:00
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ug_deselect(priv->spi);
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2011-04-18 01:48:01 +02:00
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return OK;
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}
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2011-04-18 01:48:01 +02:00
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* Name: up_clear
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*
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* Description:
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* Clear the display.
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*
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2011-04-18 01:48:01 +02:00
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static inline void up_clear(FAR struct ug_dev_s *priv)
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{
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FAR struct spi_dev_s *spi = priv->spi;
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2011-04-19 03:16:40 +02:00
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int page;
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2011-04-18 01:48:01 +02:00
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int i;
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/* Clear the framebuffer */
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2011-04-18 19:16:24 +02:00
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memset(priv->fb, UG_Y1_BLACK, UG_FBSIZE);
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2011-04-18 01:48:01 +02:00
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/* Select and lock the device */
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ug_select(priv->spi);
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/* Go through all 8 pages */
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2011-04-19 03:16:40 +02:00
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for (page = 0, i = 0; i < 8; i++)
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2011-04-18 01:48:01 +02:00
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{
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/* Select command transfer */
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2017-04-29 20:26:52 +02:00
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SPI_CMDDATA(spi, SPIDEV_DISPLAY(0), true);
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2011-04-18 01:48:01 +02:00
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/* Set the starting position for the run */
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2021-03-04 08:02:21 +01:00
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SPI_SEND(priv->spi, SSD1305_SETPAGESTART + i);
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2020-01-02 17:49:34 +01:00
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SPI_SEND(priv->spi, SSD1305_SETCOLL + (UG_XOFFSET & 0x0f));
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SPI_SEND(priv->spi, SSD1305_SETCOLH + (UG_XOFFSET >> 4));
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2011-04-18 01:48:01 +02:00
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/* Select data transfer */
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2017-04-29 20:26:52 +02:00
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SPI_CMDDATA(spi, SPIDEV_DISPLAY(0), false);
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2011-04-18 01:48:01 +02:00
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2021-03-04 08:02:21 +01:00
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/* Then transfer all 96 columns of data */
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2011-04-18 01:48:01 +02:00
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2021-03-04 08:02:21 +01:00
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SPI_SNDBLOCK(priv->spi, &priv->fb[page * UG_XRES], UG_XRES);
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2011-04-18 01:48:01 +02:00
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}
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/* Unlock and de-select the device */
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ug_deselect(spi);
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}
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2011-04-18 01:48:01 +02:00
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* Public Functions
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2011-04-18 01:48:01 +02:00
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2021-03-04 08:02:21 +01:00
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/****************************************************************************
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2011-04-18 22:13:54 +02:00
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* Name: ug_initialize
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2011-04-18 01:48:01 +02:00
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*
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* Description:
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2011-04-18 22:13:54 +02:00
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* Initialize the UG-9664HSWAG01 video hardware. The initial state of the
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* OLED is fully initialized, display memory cleared, and the OLED ready to
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* use, but with the power setting at 0 (full off == sleep mode).
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*
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* Input Parameters:
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*
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* spi - A reference to the SPI driver instance.
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2021-03-04 08:02:21 +01:00
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* devno - A value in the range of 0 through
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* CONFIG_UG9664HSWAG01_NINTERFACES-1.
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2011-04-18 22:13:54 +02:00
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* This allows support for multiple OLED devices.
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*
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* Returned Value:
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*
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2021-03-04 08:02:21 +01:00
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* On success, this function returns a reference to the LCD object for
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* the specified OLED. NULL is returned on any failure.
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2011-04-18 01:48:01 +02:00
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*
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2021-03-04 08:02:21 +01:00
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****************************************************************************/
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2011-04-18 01:48:01 +02:00
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2021-03-04 08:02:21 +01:00
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FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi,
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unsigned int devno)
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2011-04-18 01:48:01 +02:00
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{
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/* Configure and enable LCD */
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2013-06-24 20:37:02 +02:00
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2011-04-18 01:48:01 +02:00
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FAR struct ug_dev_s *priv = &g_ugdev;
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2011-04-18 19:16:24 +02:00
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2016-06-11 19:59:51 +02:00
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ginfo("Initializing\n");
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2011-04-18 19:16:24 +02:00
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DEBUGASSERT(spi && devno == 0);
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/* Save the reference to the SPI device */
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priv->spi = spi;
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2011-04-18 01:48:01 +02:00
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/* Select and lock the device */
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ug_select(spi);
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2011-04-18 19:16:24 +02:00
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/* Make sure that the OLED off */
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ug_power(0, false);
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2011-04-18 01:48:01 +02:00
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/* Select command transfer */
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2017-04-29 20:26:52 +02:00
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SPI_CMDDATA(spi, SPIDEV_DISPLAY(0), true);
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2011-04-18 01:48:01 +02:00
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2012-11-07 22:53:14 +01:00
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/* Configure the device */
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2011-04-18 01:48:01 +02:00
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2020-01-02 17:49:34 +01:00
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SPI_SEND(spi, SSD1305_SETCOLL + 2); /* Set low column address */
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SPI_SEND(spi, SSD1305_SETCOLH + 2); /* Set high column address */
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2021-03-04 08:02:21 +01:00
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SPI_SEND(spi, SSD1305_SETSTARTLINE + 0); /* Display start set */
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2020-01-02 17:49:34 +01:00
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SPI_SEND(spi, SSD1305_SCROLL_STOP); /* Stop horizontal scroll */
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SPI_SEND(spi, SSD1305_SETCONTRAST); /* Set contrast control register */
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SPI_SEND(spi, 0x32); /* Data 1: Set 1 of 256 contrast steps */
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SPI_SEND(spi, SSD1305_SETBRIGHTNESS); /* Brightness for color bank */
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SPI_SEND(spi, 0x80); /* Data 1: Set 1 of 256 contrast steps */
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SPI_SEND(spi, SSD1305_MAPCOL131); /* Set segment re-map */
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SPI_SEND(spi, SSD1305_DISPNORMAL); /* Set normal display */
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2021-03-04 08:02:21 +01:00
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/* (void)SPI_SEND(spi, SSD1305_DISPINVERTED); */ /* Set inverse display */
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2020-01-02 17:49:34 +01:00
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SPI_SEND(spi, SSD1305_SETMUX); /* Set multiplex ratio */
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SPI_SEND(spi, 0x3f); /* Data 1: MUX ratio -1: 15-63 */
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SPI_SEND(spi, SSD1305_SETOFFSET); /* Set display offset */
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SPI_SEND(spi, 0x40); /* Data 1: Vertical shift by COM: 0-63 */
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SPI_SEND(spi, SSD1305_MSTRCONFIG); /* Set dc-dc on/off */
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SPI_SEND(spi, SSD1305_MSTRCONFIG_EXTVCC); /* Data 1: Select external Vcc */
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SPI_SEND(spi, SSD1305_SETCOMREMAPPED); /* Set com output scan direction */
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SPI_SEND(spi, SSD1305_SETDCLK); /* Set display clock divide
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2011-04-18 01:48:01 +02:00
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* ratio/oscillator/frequency */
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2020-01-02 17:49:34 +01:00
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SPI_SEND(spi, 15 << SSD1305_DCLKFREQ_SHIFT | 0 << SSD1305_DCLKDIV_SHIFT);
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SPI_SEND(spi, SSD1305_SETCOLORMODE); /* Set area color mode on/off & low power
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2011-04-18 01:48:01 +02:00
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* display mode */
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2020-01-02 17:49:34 +01:00
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SPI_SEND(spi, SSD1305_COLORMODE_MONO | SSD1305_POWERMODE_LOW);
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SPI_SEND(spi, SSD1305_SETPRECHARGE); /* Set pre-charge period */
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SPI_SEND(spi, 15 << SSD1305_PHASE2_SHIFT | 1 << SSD1305_PHASE1_SHIFT);
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SPI_SEND(spi, SSD1305_SETCOMCONFIG); /* Set COM configuration */
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SPI_SEND(spi, SSD1305_COMCONFIG_ALT); /* Data 1, Bit 4: 1=Alternative COM pin configuration */
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SPI_SEND(spi, SSD1305_SETVCOMHDESEL); /* Set VCOMH deselect level */
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2021-03-04 08:02:21 +01:00
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SPI_SEND(spi, SSD1305_VCOMH_X7P7); /* Data 1: ~0.77 x Vcc */
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2020-01-02 17:49:34 +01:00
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SPI_SEND(spi, SSD1305_SETLUT); /* Set look up table for area color */
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SPI_SEND(spi, 0x3f); /* Data 1: Pulse width: 31-63 */
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SPI_SEND(spi, 0x3f); /* Data 2: Color A: 31-63 */
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SPI_SEND(spi, 0x3f); /* Data 3: Color B: 31-63 */
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SPI_SEND(spi, 0x3f); /* Data 4: Color C: 31-63 */
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SPI_SEND(spi, SSD1305_DISPON); /* Display on, normal mode */
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SPI_SEND(spi, SSD1305_DISPRAM); /* Resume to RAM content display */
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2011-04-18 01:48:01 +02:00
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/* Let go of the SPI lock and de-select the device */
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ug_deselect(spi);
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/* Clear the framebuffer */
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up_mdelay(100);
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up_clear(priv);
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return &priv->dev;
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}
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