2022-01-07 18:44:06 +01:00
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/****************************************************************************
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* arch/xtensa/src/esp32s3/esp32s3_gpio.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <arch/irq.h>
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#include "xtensa.h"
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#include "esp32s3_irq.h"
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#include "hardware/esp32s3_iomux.h"
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#include "hardware/esp32s3_gpio.h"
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#include "esp32s3_gpio.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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2022-03-18 13:49:32 +01:00
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#define ESP32S3_NPINS 49
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2022-01-07 18:44:06 +01:00
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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2022-03-18 13:49:32 +01:00
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/****************************************************************************
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* Name: is_valid_gpio
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*
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* Description:
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* Check if the requested pin is a valid GPIO pin.
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*
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* Input Parameters:
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* pin - Pin to be checked for validity.
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*
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* Returned Value:
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* True if the requested pin is a valid GPIO pin, false otherwise.
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*
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****************************************************************************/
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static inline bool is_valid_gpio(uint32_t pin)
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{
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/* ESP32-S3 has 45 GPIO pins numbered from 0 to 21 and 26 to 48 */
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return pin <= 21 || (pin >= 26 && pin < ESP32S3_NPINS);
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}
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2022-01-07 18:44:06 +01:00
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: esp32s3_configgpio
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*
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* Description:
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* Configure a GPIO pin based on encoded pin attributes.
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*
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* Input Parameters:
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* pin - GPIO pin to be configured.
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* attr - Attributes to be configured for the selected GPIO pin.
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* The following attributes are accepted:
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* - Direction (OUTPUT or INPUT)
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* - Pull (PULLUP, PULLDOWN or OPENDRAIN)
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* - Function (if not provided, assume function GPIO by
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* default)
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* - Drive strength (if not provided, assume DRIVE_2 by
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* default)
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*
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* Returned Value:
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* Zero (OK) on success, or -1 (ERROR) in case of failure.
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*
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2022-01-07 18:44:06 +01:00
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****************************************************************************/
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2022-03-18 13:49:32 +01:00
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int esp32s3_configgpio(uint32_t pin, gpio_pinattr_t attr)
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2022-01-07 18:44:06 +01:00
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{
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uintptr_t regaddr;
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uint32_t func;
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uint32_t cntrl;
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uint32_t pin2func;
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2022-03-18 13:49:32 +01:00
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DEBUGASSERT(is_valid_gpio(pin));
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2022-01-07 18:44:06 +01:00
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func = 0;
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cntrl = 0;
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/* Handle input pins */
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if ((attr & INPUT) != 0)
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{
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2022-03-18 13:49:32 +01:00
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if (pin < 32)
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{
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putreg32((UINT32_C(1) << pin), GPIO_ENABLE_W1TC_REG);
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}
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else
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{
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putreg32((UINT32_C(1) << (pin - 32)), GPIO_ENABLE1_W1TC_REG);
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}
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2022-01-07 18:44:06 +01:00
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/* Input enable */
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func |= FUN_IE;
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if ((attr & PULLUP) != 0)
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{
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func |= FUN_PU;
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}
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else if ((attr & PULLDOWN) != 0)
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{
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func |= FUN_PD;
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}
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}
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/* Handle output pins */
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if ((attr & OUTPUT) != 0)
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{
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putreg32((UINT32_C(1) << pin), GPIO_ENABLE_W1TS_REG);
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2022-01-07 18:44:06 +01:00
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}
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2022-03-18 13:49:32 +01:00
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/* Configure the pad's function */
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2022-01-07 18:44:06 +01:00
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if ((attr & FUNCTION_MASK) != 0)
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{
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2022-03-18 13:49:32 +01:00
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uint32_t val = ((attr & FUNCTION_MASK) >> FUNCTION_SHIFT) - 1;
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func |= val << MCU_SEL_S;
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2022-01-07 18:44:06 +01:00
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}
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else
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{
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2022-03-18 13:49:32 +01:00
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/* Function not provided, assuming function GPIO by default */
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2022-01-07 18:44:06 +01:00
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func |= (uint32_t)(PIN_FUNC_GPIO << MCU_SEL_S);
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}
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2022-03-18 13:49:32 +01:00
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/* Configure the pad's drive strength */
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if ((attr & DRIVE_MASK) != 0)
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{
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uint32_t val = ((attr & DRIVE_MASK) >> DRIVE_SHIFT) - 1;
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func |= val << FUN_DRV_S;
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}
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else
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{
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/* Drive strength not provided, assuming strength 2 by default */
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func |= UINT32_C(2) << FUN_DRV_S;
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}
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2022-01-07 18:44:06 +01:00
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if ((attr & OPEN_DRAIN) != 0)
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{
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cntrl |= (1 << GPIO_PIN_PAD_DRIVER_S);
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}
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/* Set the pin function to its register */
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pin2func = (pin + 1) * 4;
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regaddr = REG_IO_MUX_BASE + pin2func;
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putreg32(func, regaddr);
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regaddr = GPIO_REG(pin);
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putreg32(cntrl, regaddr);
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return OK;
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}
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/****************************************************************************
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* Name: esp32s3_gpio_matrix_in
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*
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* Description:
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2022-03-18 13:49:32 +01:00
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* Set GPIO input to a signal.
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* NOTE: one GPIO can input to several signals.
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*
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* Input Parameters:
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* pin - GPIO pin to be configured.
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* - If pin == 0x3c, cancel input to the signal, input 0
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* to signal.
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* - If pin == 0x3a, input nothing to signal.
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* - If pin == 0x38, cancel input to the signal, input 1
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* to signal.
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* signal_idx - Signal index.
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* inv - Flag indicating whether the signal is inverted.
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*
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* Returned Value:
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* None.
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2022-01-07 18:44:06 +01:00
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*
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****************************************************************************/
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2022-03-18 13:49:32 +01:00
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void esp32s3_gpio_matrix_in(uint32_t pin, uint32_t signal_idx, bool inv)
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{
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uint32_t regaddr = GPIO_FUNC0_IN_SEL_CFG_REG + (signal_idx * 4);
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uint32_t regval = pin << GPIO_FUNC0_IN_SEL_S;
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if (inv)
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{
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regval |= GPIO_FUNC0_IN_INV_SEL;
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}
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2022-03-18 13:49:32 +01:00
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if (pin != 0x3a)
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{
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regval |= GPIO_SIG0_IN_SEL;
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}
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putreg32(regval, regaddr);
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}
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/****************************************************************************
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* Name: esp32s3_gpio_matrix_out
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*
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* Description:
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2022-03-18 13:49:32 +01:00
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* Set signal output to GPIO.
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* NOTE: one signal can output to several GPIOs.
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*
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* Input Parameters:
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* pin - GPIO pin to be configured.
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* signal_idx - Signal index.
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* - If signal_idx == 0x100, cancel output to the GPIO.
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* out_inv - Flag indicating whether the signal output is inverted.
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* oen_inv - Flag indicating whether the signal output enable is
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* inverted.
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*
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* Returned Value:
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* None.
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2022-01-07 18:44:06 +01:00
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*
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****************************************************************************/
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2022-03-18 13:49:32 +01:00
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void esp32s3_gpio_matrix_out(uint32_t pin, uint32_t signal_idx, bool out_inv,
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bool oen_inv)
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{
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2022-03-18 13:49:32 +01:00
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uint32_t regaddr = GPIO_FUNC0_OUT_SEL_CFG_REG + (pin * 4);
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2022-01-07 18:44:06 +01:00
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uint32_t regval = signal_idx << GPIO_FUNC0_OUT_SEL_S;
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2022-03-18 13:49:32 +01:00
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DEBUGASSERT(is_valid_gpio(pin));
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2022-01-07 18:44:06 +01:00
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2022-03-18 13:49:32 +01:00
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putreg32(1ul << pin, GPIO_ENABLE_W1TS_REG);
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2022-01-07 18:44:06 +01:00
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if (out_inv)
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{
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regval |= GPIO_FUNC0_OUT_INV_SEL;
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}
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if (oen_inv)
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{
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regval |= GPIO_FUNC0_OEN_INV_SEL;
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}
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putreg32(regval, regaddr);
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}
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