MPFS: Use riscv_mhartid to obtain hartid
Preparation for S-mode, read mhartid via function call instead of directly from the machine mode register
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f8ffcbbf36
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@ -26,12 +26,30 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <nuttx/arch.h>
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#include <nuttx/arch.h>
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#include <arch/csr.h>
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#include "riscv_internal.h"
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#include "riscv_internal.h"
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/****************************************************************************
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/****************************************************************************
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* Public Functions
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* Public Functions
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****************************************************************************/
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****************************************************************************/
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/****************************************************************************
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* Name: riscv_mhartid
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*
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* Description:
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* Context aware way to query hart id
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*
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* Returned Value:
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* Hart id
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*
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****************************************************************************/
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uintptr_t riscv_mhartid(void)
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{
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return READ_CSR(mhartid);
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}
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/****************************************************************************
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/****************************************************************************
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* Name: up_cpu_index
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* Name: up_cpu_index
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*
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*
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@ -48,10 +66,9 @@
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*
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*
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_SMP
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int up_cpu_index(void)
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int up_cpu_index(void)
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{
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{
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int mhartid;
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return (int)riscv_mhartid();
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asm volatile ("csrr %0, mhartid": "=r" (mhartid));
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return mhartid;
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}
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}
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#endif
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@ -253,6 +253,19 @@ void riscv_cpu_boot(int cpu);
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int riscv_pause_handler(int irq, void *c, void *arg);
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int riscv_pause_handler(int irq, void *c, void *arg);
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#endif
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#endif
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/****************************************************************************
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* Name: riscv_mhartid
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*
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* Description:
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* Context aware way to query hart id
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*
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* Returned Value:
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* Hart id
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*
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****************************************************************************/
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uintptr_t riscv_mhartid(void);
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#undef EXTERN
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#undef EXTERN
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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@ -32,6 +32,7 @@ CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
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CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
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CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
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CMN_CSRCS += riscv_mdelay.c riscv_udelay.c riscv_copyfullstate.c
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CMN_CSRCS += riscv_mdelay.c riscv_udelay.c riscv_copyfullstate.c
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CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c
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CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c
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CMN_CSRCS += riscv_cpuindex.c
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ifeq ($(CONFIG_SCHED_BACKTRACE),y)
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ifeq ($(CONFIG_SCHED_BACKTRACE),y)
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CMN_CSRCS += riscv_backtrace.c
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CMN_CSRCS += riscv_backtrace.c
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@ -62,7 +62,7 @@ void up_irqinitialize(void)
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/* Disable all global interrupts for current hart */
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/* Disable all global interrupts for current hart */
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uint64_t hart_id = READ_CSR(mhartid);
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uintptr_t hart_id = riscv_mhartid();
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uint32_t *miebase;
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uint32_t *miebase;
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if (hart_id == 0)
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if (hart_id == 0)
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@ -180,7 +180,7 @@ void up_disable_irq(int irq)
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/* Clear enable bit for the irq */
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/* Clear enable bit for the irq */
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uint64_t hart_id = READ_CSR(mhartid);
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uintptr_t hart_id = riscv_mhartid();
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uintptr_t miebase;
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uintptr_t miebase;
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if (hart_id == 0)
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if (hart_id == 0)
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@ -234,7 +234,7 @@ void up_enable_irq(int irq)
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/* Set enable bit for the irq */
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/* Set enable bit for the irq */
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uint64_t hart_id = READ_CSR(mhartid);
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uintptr_t hart_id = riscv_mhartid();
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uintptr_t miebase;
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uintptr_t miebase;
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if (hart_id == 0)
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if (hart_id == 0)
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@ -33,6 +33,7 @@
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#include <arch/board/board.h>
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#include <arch/board/board.h>
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#include "riscv_internal.h"
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#include "riscv_internal.h"
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#include "group/group.h"
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#include "group/group.h"
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#include "hardware/mpfs_memorymap.h"
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#include "hardware/mpfs_memorymap.h"
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#include "hardware/mpfs_plic.h"
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#include "hardware/mpfs_plic.h"
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@ -70,7 +71,7 @@ void *riscv_dispatch_irq(uint64_t vector, uint64_t *regs)
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/* Firstly, check if the irq is machine external interrupt */
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/* Firstly, check if the irq is machine external interrupt */
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uint64_t hart_id = READ_CSR(mhartid);
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uintptr_t hart_id = riscv_mhartid();
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uintptr_t claim_address;
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uintptr_t claim_address;
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if (hart_id == 0)
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if (hart_id == 0)
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@ -111,7 +111,7 @@ const uint64_t g_entrypoints[5] =
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* Name: __mpfs_start
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* Name: __mpfs_start
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****************************************************************************/
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****************************************************************************/
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void __mpfs_start(uint32_t mhartid)
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void __mpfs_start(uint64_t mhartid)
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{
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{
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const uint32_t *src;
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const uint32_t *src;
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uint32_t *dest;
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uint32_t *dest;
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@ -33,6 +33,7 @@
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#include <nuttx/spinlock.h>
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#include <nuttx/spinlock.h>
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#include "riscv_internal.h"
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#include "riscv_internal.h"
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#include "mpfs.h"
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#include "mpfs.h"
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#include "mpfs_clockconfig.h"
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#include "mpfs_clockconfig.h"
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@ -114,7 +115,7 @@ void up_timer_initialize(void)
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{
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{
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/* what is our timecmp address for this hart */
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/* what is our timecmp address for this hart */
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uint64_t hart_id = READ_CSR(mhartid);
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uintptr_t hart_id = riscv_mhartid();
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_mtime_cmp = (uint64_t *)MPFS_CLINT_MTIMECMP0 + hart_id;
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_mtime_cmp = (uint64_t *)MPFS_CLINT_MTIMECMP0 + hart_id;
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/* Attach timer interrupt handler */
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/* Attach timer interrupt handler */
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