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Xtensa: Replace CONFIG_XTENSA_CALL0_ABI with compiler defined __XTENSA_CALL0_ABI__

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This commit is contained in:
Gregory Nutt 2016-10-30 07:37:51 -06:00
parent dc82fa81b8
commit 8c96221093
9 changed files with 54 additions and 39 deletions
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7
arch/xtensa/Kconfig
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@ -31,13 +31,6 @@ config ARCH_FAMILY_LX6
Cadence® Tensilica® Xtensa® LX6 data plane processing unit (DPU). Cadence® Tensilica® Xtensa® LX6 data plane processing unit (DPU).
The LX6 is a configurable and extensible processor core. The LX6 is a configurable and extensible processor core.
config XTENSA_CALL0_ABI
bool
default y
---help---
The Window ABI is not supported. Only the CALL0 ABI is supported in the
current implementation.
config XTENSA_USE_OVLY config XTENSA_USE_OVLY
bool bool
default n default n

6
arch/xtensa/include/irq.h
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@ -113,7 +113,7 @@
# define _REG_CALL0_START _REG_LOOPS_START # define _REG_CALL0_START _REG_LOOPS_START
#endif #endif
#ifndef CONFIG_XTENSA_CALL0_ABI #ifndef __XTENSA_CALL0_ABI__
/* Temporary space for saving stuff during window spill */ /* Temporary space for saving stuff during window spill */
# define REG_TMP0 (_REG_CALL0_START + 0) # define REG_TMP0 (_REG_CALL0_START + 0)
@ -243,7 +243,7 @@ static inline uint32_t up_irq_save(void)
static inline void up_irq_enable(void) static inline void up_irq_enable(void)
{ {
#ifdef CONFIG_XTENSA_CALL0_ABI #ifdef __XTENSA_CALL0_ABI__
xtensa_setps(PS_INTLEVEL(0) | PS_UM); xtensa_setps(PS_INTLEVEL(0) | PS_UM);
#else #else
xtensa_setps(PS_INTLEVEL(0) | PS_UM | PS_WOE); xtensa_setps(PS_INTLEVEL(0) | PS_UM | PS_WOE);
@ -254,7 +254,7 @@ static inline void up_irq_enable(void)
static inline void up_irq_disable(void) static inline void up_irq_disable(void)
{ {
#ifdef CONFIG_XTENSA_CALL0_ABI #ifdef __XTENSA_CALL0_ABI__
xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM); xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM);
#else #else
xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE); xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE);

26
arch/xtensa/src/common/xtensa_abi.h
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@ -36,22 +36,40 @@
/* Windowed ABI /* Windowed ABI
* *
* Windowed Register Usage * The Windowed Register Option replaces the simple 16-entry AR register
* file with a larger register file from which a window of 16 entries is
* visible at any given time. The window is rotated on subroutine entry
* and exit, automatically saving and restoring some registers. When the
* window is rotated far enough to require registers to be saved to or
* restored from the program stack, an exception is raised to move some
* of the register values between the register file and the program stack.
*
* Windowed Register Usage:
* ---------------- ----------------------------------
* Callee Register Usage * Callee Register Usage
* Register Name * Register Name
* ---------------- ----------------------------------
* a0 Return address * a0 Return address
* a1/sp Stack pointer * a1/sp Stack pointer
* a2..a7 In, out, inout, and return values * a2..a7 In, out, inout, and return values
* ---------------- ----------------------------------
* *
* Calls to routines that use only a2..a3 as parameters may use the CALL4, * Calls to routines that use only a2..a3 as parameters may use the CALL4,
* CALL8, or CALL12 instructions to save 4, 8, or 12 live registers. Calls * CALL8, or CALL12 instructions to save 4, 8, or 12 live registers. Calls
* to routines that use a2..a7 for parameters may use only CALL8 or CALL12. * to routines that use a2..a7 for parameters may use only CALL8 or CALL12.
* *
* The stack pointer SP should only be modified by ENTRY and MOVSP
* instructions (except for initialization and restoration). If some other
* instruction modifies SP, any values in the register-spill area will not
* be moved.
*
* Call 0 ABI * Call 0 ABI
* *
* CALL0 AR Register Usage * CALL0 AR Register Usage
* ---------------- ----------------------------------
* Callee Register Usage * Callee Register Usage
* Register Name * Register Name
* ---------------- ----------------------------------
* a0 Return Address * a0 Return Address
* a1/sp Stack pointer * a1/sp Stack pointer
* a2..a7 In, out, inout, and return values * a2..a7 In, out, inout, and return values
@ -59,6 +77,10 @@
* a12..a15 Callee-saved * a12..a15 Callee-saved
* a15 Stack-Frame Pointer (optional) * a15 Stack-Frame Pointer (optional)
* *
* a0, a2-a11 Caller-saved
* a1, a12..a15 Callee-saved
* ---------------- ----------------------------------
*
* CALL0 is used. The return address is placed in A0 and the CPU simply * CALL0 is used. The return address is placed in A0 and the CPU simply
* jumps to the CALL0 function entry point. * jumps to the CALL0 function entry point.
*/ */
@ -82,7 +104,7 @@
*/ */
#ifdef __ASSEMBLY__ #ifdef __ASSEMBLY__
#ifdef CONFIG_XTENSA_CALL0_ABI #ifdef __XTENSA_CALL0_ABI__
/* Call0 */ /* Call0 */
.macro entry1 size=0x10 .macro entry1 size=0x10

4
arch/xtensa/src/common/xtensa_context.S
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@ -146,11 +146,11 @@ _xtensa_context_save:
s32i a3, a2, (4 * REG_LCOUNT) s32i a3, a2, (4 * REG_LCOUNT)
#endif #endif
#ifndef CONFIG_XTENSA_CALL0_ABI #ifndef __XTENSA_CALL0_ABI__
mov a9, a0 /* Preserve ret addr */ mov a9, a0 /* Preserve ret addr */
#endif #endif
#ifndef CONFIG_XTENSA_CALL0_ABI #ifndef __XTENSA_CALL0_ABI__
/* To spill the reg windows, temp. need pre-interrupt stack ptr and /* To spill the reg windows, temp. need pre-interrupt stack ptr and
* a4-15. Need to save a9,12,13 temporarily (in frame temps) and * a4-15. Need to save a9,12,13 temporarily (in frame temps) and
* recover originals. Interrupts need to be disabled below * recover originals. Interrupts need to be disabled below

2
arch/xtensa/src/common/xtensa_dumpstate.c
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@ -123,7 +123,7 @@ static inline void xtensa_registerdump(void)
(unsigned long)regs[REG_LBEG], (unsigned long)regs[REG_LEND], (unsigned long)regs[REG_LBEG], (unsigned long)regs[REG_LEND],
(unsigned long)regs[REG_LCOUNT]); (unsigned long)regs[REG_LCOUNT]);
#endif #endif
#ifndef CONFIG_XTENSA_CALL0_ABI #ifndef __XTENSA_CALL0_ABI__
_alert(" TMP0: %08lx TMP1: %08lx TMP2: %08lx\n", _alert(" TMP0: %08lx TMP1: %08lx TMP2: %08lx\n",
(unsigned long)regs[REG_TMP0], (unsigned long)regs[REG_TMP1], (unsigned long)regs[REG_TMP0], (unsigned long)regs[REG_TMP1],
(unsigned long)regs[REG_TMP2]); (unsigned long)regs[REG_TMP2]);

2
arch/xtensa/src/common/xtensa_initialstate.c
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@ -87,7 +87,7 @@ void up_initial_state(struct tcb_s *tcb)
* mode. * mode.
*/ */
#ifdef CONFIG_XTENSA_CALL0_ABI #ifdef __XTENSA_CALL0_ABI__
xcp->regs[REG_PS] = PS_UM | PS_EXCM; xcp->regs[REG_PS] = PS_UM | PS_EXCM;
#else #else

6
arch/xtensa/src/common/xtensa_int_handlers.S
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@ -134,7 +134,7 @@
l32i a4, a4, \level << 2 l32i a4, a4, \level << 2
beqz a4, 2f beqz a4, 2f
#ifdef CONFIG_XTENSA_CALL0_ABI #ifdef __XTENSA_CALL0_ABI__
callx0 a4 callx0 a4
beqz a2, 5f beqz a2, 5f
#else #else
@ -221,7 +221,7 @@
.macro ps_setup level tmp .macro ps_setup level tmp
#if 0 /* Nested interrupts no yet supported */ #if 0 /* Nested interrupts no yet supported */
# ifdef CONFIG_XTENSA_CALL0_ABI # ifdef __XTENSA_CALL0_ABI__
/* Disable interrupts at level and below */ /* Disable interrupts at level and below */
movi \tmp, PS_INTLEVEL(\level) | PS_UM movi \tmp, PS_INTLEVEL(\level) | PS_UM
@ -229,7 +229,7 @@
movi \tmp, PS_INTLEVEL(\level) | PS_UM | PS_WOE movi \tmp, PS_INTLEVEL(\level) | PS_UM | PS_WOE
# endif # endif
#else #else
# ifdef CONFIG_XTENSA_CALL0_ABI # ifdef __XTENSA_CALL0_ABI__
/* Disable all low- and medium-priority interrupts. Nested are not yet /* Disable all low- and medium-priority interrupts. Nested are not yet
* supported. * supported.
*/ */

4
arch/xtensa/src/common/xtensa_macros.h
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@ -59,7 +59,7 @@
* expansions are implemented as assembler macros. * expansions are implemented as assembler macros.
*/ */
#ifdef CONFIG_XTENSA_CALL0_ABI #ifdef __XTENSA_CALL0_ABI__
/* Call0 */ /* Call0 */
.macro entry1 size=0x10 .macro entry1 size=0x10
@ -86,7 +86,7 @@
# define RET(sz) retw # define RET(sz) retw
# define RET0 retw # define RET0 retw
#endif /* CONFIG_XTENSA_CALL0_ABI */ #endif /* __XTENSA_CALL0_ABI__ */
#endif /* __ASSEMBLY */ #endif /* __ASSEMBLY */
#endif /* __ARCH_XTENSA_SRC_COMMON_XTENSA_MACROS_H */ #endif /* __ARCH_XTENSA_SRC_COMMON_XTENSA_MACROS_H */

4
arch/xtensa/src/common/xtensa_schedsigaction.c
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@ -151,7 +151,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
*/ */
CURRENT_REGS[REG_PC] = (uint32_t)xtensa_sigdeliver; CURRENT_REGS[REG_PC] = (uint32_t)xtensa_sigdeliver;
#ifdef CONFIG_XTENSA_CALL0_ABI #ifdef __XTENSA_CALL0_ABI__
CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM); CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM);
#else #else
CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM | PS_WOE); CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM | PS_WOE);
@ -186,7 +186,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
*/ */
tcb->xcp.regs[REG_PC] = (uint32_t)xtensa_sigdeliver; tcb->xcp.regs[REG_PC] = (uint32_t)xtensa_sigdeliver;
#ifdef CONFIG_XTENSA_CALL0_ABI #ifdef __XTENSA_CALL0_ABI__
tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM); tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM);
#else #else
tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM | PS_WOE); tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM | PS_WOE);