Add support for ST Micro EEPROM device geometries. From Sebastien Lorquet
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@ -46,6 +46,12 @@
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* 20 MHz for 25AA512, 25LC512, 25xx1024
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* 20 MHz for Atmel devices (>4.5V)
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* 10 MHz for Atmel devices (>2.5V)
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* 20 MHz for <1Mbit STM devices (>4.5V)
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* 16 MHz for 1Mbit STM devices (>4.5V)
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* 10 MHz for all STM devices (>2.5V)
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* 5 MHz for 1Mbit STM devices (>1.8V)
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* 2 MHz for 1Mbit STM devices (>1.7V)
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* 5 MHz for 2Mbit STM devices
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* All devices have the same instruction set.
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*
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* The following devices should be supported:
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@ -89,6 +95,19 @@
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* AT25256B 32768 64 2
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* AT25512 65536 128 2
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* AT25M01 131072 256 3
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* ST Microelectronics
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* M95010 128 16 1
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* M95020 256 16 1
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* M95040 512 16 1+bit
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* M95080 1024 32 2
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* M95160 2048 32 2
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* M95320 4096 32 2
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* M95640 8192 32 2
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* M95128 16384 64 2
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* M95256 32768 64 2
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* M95512 65536 128 2
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* M95M01 131072 256 3
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* M95M02 262144 256 3
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*/
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/****************************************************************************
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@ -130,6 +149,10 @@
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* CE 0xC7 Chip erase (25xx512/1024)
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* RDID 0xAB Wake up and read electronic signature (25xx512/1024)
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* DPD 0xB9 Sleep (25xx512/1024)
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*
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* Identification page access for ST devices
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* RDID/RDLS 0x83 Read identification page / Read ID page lock status
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* WRID/LID 0x82 Write identification page / Lock ID page
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*/
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/* SR bits definitions */
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@ -160,7 +183,7 @@ struct ee25xx_geom_s
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struct ee25xx_dev_s
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{
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struct spi_dev_s *spi; /* spi device where the EEPROM is attached */
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struct spi_dev_s *spi; /* SPI device where the EEPROM is attached */
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uint32_t size; /* in bytes, expanded from geometry */
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uint16_t pgsize; /* write block size, in bytes, expanded from geometry */
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uint16_t addrlen; /* number of BITS in data addresses */
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@ -196,25 +219,29 @@ static const struct ee25xx_geom_s g_ee25xx_devices[] =
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{
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/* Microchip devices */
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{ 0, 1, 1, 0}, /*25xx010A 128 16 1*/
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{ 1, 1, 1, 0}, /*25xx020A 256 16 1*/
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{ 2, 1, 1, 1}, /*25xx040 512 16 1+bit*/
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{ 3, 1, 1, 0}, /*25xx080 1024 16 1*/
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{ 3, 2, 2, 0}, /*25xx080B 1024 32 2*/
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{ 4, 1, 2, 0}, /*25xx160 2048 16 2*/
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{ 4, 2, 2, 0}, /*25xx160B/D 2048 32 2*/
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{ 5, 2, 2, 0}, /*25xx320 4096 32 2*/
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{ 6, 2, 2, 0}, /*25xx640 8192 32 2*/
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{ 7, 3, 2, 0}, /*25xx128 16384 64 2*/
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{ 8, 3, 2, 0}, /*25xx256 32768 64 2*/
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{ 9, 4, 2, 0}, /*25xx512 65536 128 2*/
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{10, 5, 3, 0}, /*25xx1024 131072 256 3*/
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{ 0, 1, 1, 0}, /* 25xx010A 128 16 1*/
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{ 1, 1, 1, 0}, /* 25xx020A 256 16 1*/
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{ 2, 1, 1, 1}, /* 25xx040 512 16 1+bit*/
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{ 3, 1, 1, 0}, /* 25xx080 1024 16 1*/
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{ 3, 2, 2, 0}, /* 25xx080B 1024 32 2*/
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{ 4, 1, 2, 0}, /* 25xx160 2048 16 2*/
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{ 4, 2, 2, 0}, /* 25xx160B/D 2048 32 2*/
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{ 5, 2, 2, 0}, /* 25xx320 4096 32 2*/
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{ 6, 2, 2, 0}, /* 25xx640 8192 32 2*/
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{ 7, 3, 2, 0}, /* 25xx128 16384 64 2*/
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{ 8, 3, 2, 0}, /* 25xx256 32768 64 2*/
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{ 9, 4, 2, 0}, /* 25xx512 65536 128 2*/
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{10, 5, 3, 0}, /* 25xx1024 131072 256 3*/
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/* Atmel devices */
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{ 0, 0, 1, 0}, /*AT25010B 128 8 1*/
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{ 1, 0, 1, 0}, /*AT25020B 256 8 1*/
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{ 2, 0, 1, 1}, /*AT25040B 512 8 1+bit*/
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{ 0, 0, 1, 0}, /* AT25010B 128 8 1*/
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{ 1, 0, 1, 0}, /* AT25020B 256 8 1*/
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{ 2, 0, 1, 1}, /* AT25040B 512 8 1+bit*/
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/* STM devices */
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{11, 5, 3, 0}, /* M95M02 262144 256 3*/
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};
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/* Driver operations */
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@ -66,7 +66,11 @@ enum eeprom_25xx_e
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EEPROM_AT25020B,
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EEPROM_AT25040B,
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/* Aliases (devices similar to previously defined ones)*/
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/* STM geometries */
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EEPROM_M95M02,
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/* Aliases (devices similar to previously defined ones) */
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EEPROM_AT25080B = EEPROM_25xx080B,
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EEPROM_AT25160B = EEPROM_25xx160B,
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@ -76,6 +80,17 @@ enum eeprom_25xx_e
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EEPROM_AT225256B = EEPROM_25xx256,
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EEPROM_AT25512 = EEPROM_25xx512,
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EEPROM_AT25M02 = EEPROM_25xx1024,
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EEPROM_M95010 = EEPROM_25xx010,
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EEPROM_M95020 = EEPROM_25xx020,
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EEPROM_M95040 = EEPROM_25xx040,
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EEPROM_M95080 = EEPROM_25xx080B,
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EEPROM_M95160 = EEPROM_25xx160B,
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EEPROM_M95320 = EEPROM_25xx320,
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EEPROM_M95640 = EEPROM_25xx640,
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EEPROM_M95128 = EEPROM_25xx128,
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EEPROM_M95256 = EEPROM_25xx256,
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EEPROM_M95512 = EEPROM_25xx512,
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EEPROM_M95M01 = EEPROM_25xx1024,
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};
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/****************************************************************************
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