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arch/risc-v: Correct format of 32-bit insn in misaligned handler

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FIx:
Format specifies type 'unsigned long' but the argument has type 'uint32_t' (aka 'unsigned int')

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi 2022-04-13 16:25:18 +08:00 committed by Xiang Xiao
parent 898d789a5f
commit f5cf35784e
1 changed files with 1 additions and 1 deletions
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arch/risc-v/src/common/riscv_misaligned.c
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@ -447,7 +447,7 @@ static bool decode_insn(uintptr_t *regs, riscv_insn_ctx_t *ctx)
case INSN_FSD: case INSN_FSD:
_alert("Misaligned float instruction not support yet\n"); _alert("Misaligned float instruction not support yet\n");
default: default:
_alert("Uncompressed: %lx\n", insn.insn); _alert("Uncompressed: %x\n", insn.insn);
return false; return false;
} }