Merged in paulpatience/nuttx-boards/stm32f429i_disco_board (pull request #32)
STM32F429I-Disco: Update STM32_RCC_DCKCFGR_PLLSAIDIVR
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commit
f9cf6a0759
@ -312,7 +312,10 @@
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#define BOARD_LTDC_PLLSAIN 192
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#define BOARD_LTDC_PLLSAIR 4
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#define BOARD_LTDC_PLLSAIQ 7
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#define BOARD_LTDC_PLLSAIDIVR RCC_PLLSAIDIVR_DIV8
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/* Division factor for LCD clock */
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#define STM32_RCC_DCKCFGR_PLLSAIDIVR RCC_DCKCFGR_PLLSAIDIVR_DIV8
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/* Pixel Clock Polarity */
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#define BOARD_LTDC_GCR_PCPOL 0 /* !LTDC_GCR_PCPOL */
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@ -369,7 +372,10 @@
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#define BOARD_LTDC_PLLSAIN ???
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#define BOARD_LTDC_PLLSAIR ???
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#define BOARD_LTDC_PLLSAIQ ???
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#define BOARD_LTDC_PLLSAIDIVR ???
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/* Division factor for LCD clock */
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#define STM32_RCC_DCKCFGR_PLLSAIDIVR ???
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/* Pixel Clock Polarity */
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#define BOARD_LTDC_GCR_PCPOL ???
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@ -418,12 +424,6 @@
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#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(BOARD_LTDC_PLLSAIR)
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#define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(BOARD_LTDC_PLLSAIQ)
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/* Configure division factor for LCD clock */
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#define STM32_RCC_DCKCFGR_PLLSAIDIVR \
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RCC_DCKCFGR_PLLSAIDIVR(BOARD_LTDC_PLLSAIDIVR)
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#endif /* CONFIG_STM32_LTDC */
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/************************************************************************************
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