Commit Graph

4 Commits

Author SHA1 Message Date
Inochi Amaoto
a33313413d arch/risc-v: introduce dynamic stack allocation.
It is misleading to allocate stack from static array and heap,
make all stack allocated from heap area.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
Yanfeng Liu
61b897f412 risc-v/k230: update LOOPSPERMSEC enable DEBUG_FEATURES
This contains minor updates for LOOPSPERMSEC and DEBUG_FEATURES in
existing configs.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-02-24 19:03:00 -08:00
Yanfeng Liu
b516b29efc risc-v/k230: revise CanMV230 kernel build support
changes:
- under boards/risc-v/k230/canmv230/scripts/:
  - Make.defs           add POSTBUILD actions
  - ld-flat.script      minor reformating
  - ld-kernel.script    minor reformating
- under boards/risc-v/k230/canmv230/src/:
  - Makefile            add clean of generated ROMFS source
  - canmv_init.c        use `ferr` and drop too late runtime warning
  - romfs_stub.c        use const for romfs_img_len

The POSTBULD actions can warn stub ROMFS usage at build time, thus
the too late warning in canmv_init.c can be removed.
The cleaning of `libboard.a` in POSTBUILD can also ensure real ROMFS
is in use, as some times weak_data is still in use.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-07 06:40:10 -08:00
Yanfeng Liu
75d0c2946d risc-v: Initial support for CanMV-k230 board and K230 chip
The code is mainly derived from the NuttX qemu-rv/rv-virt codebase.

Major changes:

- boards/Kconfig:       add new BOARD_K230_CANMV
- arch/risc-v/Kconfig:  add new CHIP_K230 chip and ARCH_RV_MMIO_BITS
- arch/risc-v/src/common/riscv_mtimer.c: use ARCH_RV_MMIO_BITS to
                        select MMIO access width

New additions:

- arch/risc-v/include/k230/: k230 SoC definitions
- arch/risc-v/src/k230/:     k230 SoC sources
- boards/risc-v/k230/canmv230/:  CanMV-K230 board sources and configs
- Documentation/platforms/risc-v/k230/: simple doc

Note that only FLAT build works for canmv230 now.

This PR has changes in RiscV common layer thus may affect other RiscV ports
It changes the mtime/mtimecmp access control from using config ARCH_RV64 to
newly intorduced config ARCH_RV_MMIO_BITS.

Original design uses ARCH_RV64 to select 64bit MMIO in riscv_mtimer.c, this
can't cope with the situation with K230 --- it has ARCH_RV64 but only can do
32bit MMIO. So a new ARCH_RV_MMIO_BITS config has been introduced. Its value
depicts the MMIO width in bits. The MMIO_BITS defaults to 32/64 for RV32/
RV64 respectively. This allows the macro to replace current use of ARCH_RV64
in riscv_mtimer.c.

The new MMIO_BITS config is a derived one, and for RiscV chips with
equal CPU and MMIO widths there is no need to explicitly set it as the
default rule will do that. Only chips with different CPU and MMIO widths
need set it in Kconfig.

So by design this change should be safe but RiscV ports should be checked.

"ostest" verification has been done for:

- canmv230/nsh
- rv-vivt/nsh
- rv-virt/nsh64

configuration generation and manual check of derived RV_MMIO_BITS has been
done for:

- star64/nsh
- arty_a7/nsh
- bl602evb/nsh

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2023-12-17 01:10:57 -08:00