Commit Graph

21182 Commits

Author SHA1 Message Date
shipei
0beba027e7 audio:add 24K sample rate support
Signed-off-by: shipei <shipei@xiaomi.com>
2023-09-15 02:26:03 +08:00
chenwen@espressif.com
75999d247f xtensa/esp32s3: SPI support psram and flash timing tuning
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-09-15 00:35:17 +08:00
Peter van der Perk
0d4b42255b s32k3: emac use semi-unique MAC address 2023-09-14 20:54:21 +08:00
simbit18
50e6dcb1e0 Fix nuttx coding style
Correct forming guard names
2023-09-13 22:49:38 +08:00
simbit18
b3973496cd Fix Kconfig style
Remove spaces from Kconfig
Add comments
2023-09-13 21:39:49 +08:00
wangming9
72cf51faf3 arm/psci: Fixed arm psci related compilation errors
Summary
include/arch/syscall.h: Assembler messages:
include/arch/syscall.h:133: Error: bad instruction `struct arm_smccc_res'
include/arch/syscall.h:134: Error: junk at end of line, first unrecognized character is `{'
include/arch/syscall.h:135: Error: bad instruction `unsigned long a0'
include/arch/syscall.h:136: Error: bad instruction `unsigned long a1'
include/arch/syscall.h:137: Error: bad instruction `unsigned long a2'
include/arch/syscall.h:138: Error: bad instruction `unsigned long a3'
include/arch/syscall.h:139: Error: bad instruction `unsigned long a4'
include/arch/syscall.h:140: Error: bad instruction `unsigned long a5'
include/arch/syscall.h:141: Error: bad instruction `unsigned long a6'
include/arch/syscall.h:142: Error: bad instruction `unsigned long a7'
include/arch/syscall.h:143: Error: junk at end of line, first unrecognized character is `}'
include/arch/syscall.h:145: Error: bad instruction `typedef struct arm_smccc_res

Signed-off-by: wangming9 <wangming9@xiaomi.com>
2023-09-13 21:06:51 +08:00
Jukka Laitinen
bd52ae1ad9 arch/risc-v/src/mpfs/mpfs_i2c.c: Clean up using priv->status and STOP interrupts
- There are occasional extra STOPs being sent due to an IP bug when using an
  FPGA based I2C. Add a flag "inflight" to mask out extra STOP interrupts when
  using the FPGA based implementation
- There are no MPFS_I2C_ST_STOP_SENT irq's "initally". It is just already
  either success or still in progress

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-09-12 22:11:24 +08:00
jianglianfang
479bfd5414 sim_framebuffer: add double buffer for sim
support double framebuffer mode and adapter to the new vsync queue.

Signed-off-by: jianglianfang <jianglianfang@xiaomi.com>
2023-09-12 22:10:10 +08:00
pengyiqiang
6536ddcdcf sim/framebuffer: remove duplicate poll notify
The framebuffer of the emulator is a single buffer mode, and the pan_display method is not implemented, so as long as the fb device is created and poll notify once, the fb can be kept in a writable state.

Signed-off-by: pengyiqiang <pengyiqiang@xiaomi.com>
2023-09-12 22:10:10 +08:00
Shanmin Zhang
b9fb9bea1d arm: support reboot / poweroff for qemu virt arm
Signed-off-by: Shanmin Zhang <zhangshanmin@xiaomi.com>
2023-09-12 21:57:13 +08:00
Tomáš Pilný
98b43752d5 esp32/rmt: fix bug in rmt_reset 2023-09-12 17:44:42 +08:00
Tomáš Pilný
103270be1d esp32/rmt: Improve comments in ESP32's RMT peripheral 2023-09-12 17:44:42 +08:00
Xiang Xiao
d4fd9f53cd Fix error: arch/sim/src/sim/posix/sim_alsa.c:290:18: error: 'flags' undeclared
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-09-12 10:02:50 +08:00
daniellizewski
a75b3bad15 Fixed typo in CRC define 2023-09-12 00:41:59 +08:00
Petro Karashchenko
a003a7ea36 arch/xtensa/esp32s3: add UART RS485 support
This commit adds support of RS485 support in ESP32-S3 serial driver

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-11 23:20:49 +08:00
Pavel Pisa
b9472129c8 arch/arm/samv7: fix typos in quadrature encoder and timer drivers
The typo s/.timid/.tcid prevents to compile NuttX with
quadrature encoder configured for timer1 (CONFIG_SAMV7_TC1_QE)
and s/SAM_TC789_BASE/SAM_TC678_BASE prevented use of the
of the timer 2.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
2023-09-11 23:11:43 +08:00
yintao
9e43a4d31c sim: To avoid system calls being interrupted when use host api
Signed-off-by: yintao <yintao@xiaomi.com>
2023-09-11 20:33:49 +08:00
hujun5
70a67099b3 timer/trustzone: set CPU frequency in tee environment
In an implementation that supports the ARM Security Extensions, only
software executing in a Secure PL1 mode can write to CNTFRQ

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-10 23:10:06 +08:00
liaoao
d63e3962bf qemu:fdt:add device tree support for goldfish arm/arm64
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-09-10 23:10:06 +08:00
wangming9
c8a4bdf21a arch/arm: GoldFish Platform support
Summary:
    Adding virtual evaluate platform GoldFish. Which is based on
    Android Goldfish Emulator, it's a ARM virt board but Android
    enhance it with more featue.
    The patch set goldfish as a arm chip.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
2023-09-10 23:10:06 +08:00
liaoao
78c942a05a devicetree: add devicetree support for arm/arm64
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-09-10 14:28:41 +03:00
hujun5
90fba56d2e timer/trustzone: set CPU frequency in tee environment
In an implementation that supports the ARM Security Extensions, only
software executing in a Secure PL1 mode can write to CNTFRQ

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-10 14:28:41 +03:00
hujun5
d9cbf84d86 arm/oneshot: rm sched_[un]lock
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-09 20:26:32 +08:00
hujun5
3f8f3340d1 pic32mx: sched_lock should replace with enter_critical_secion
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-09 10:26:03 +08:00
hujun5
0b23a316ca sam_hsmci: rm sched_[un]lock
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-09 00:21:29 +08:00
shipei
f150699d7a audio:add media session support for sim_alsa audio_ops_s interface
fix Compiler Warning:initialization of ‘int (*)(struct audio_lowerhalf_s *, void *)’
from incompatible pointer type ‘int (*)(struct audio_lowerhalf_s *)’ [-Wincompatible-pointer-types]

Signed-off-by: shipei <shipei@xiaomi.com>
2023-09-09 00:13:06 +08:00
Jukka Laitinen
a6388b8843 arch/risc-v/src/mpfs: Add ksz9477 initialization
This adds initialization of the ksz9477 switch when used instead of
a PHY, directly connected to SGMII

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-09-08 22:34:27 +08:00
Michal Lenc
6d0151c8da sam_usbdevhs.c: fix compile warning
chip/sam_usbdevhs.c:2474:11: warning: 'response' may be used uninitialized [-Wmaybe-uninitialized]
 2474 |           sam_ctrlep_write(ep0, response.b, nbytes);
      |           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
chip/sam_usbdevhs.c:1845:13: note: by argument 2 of type 'const uint8_t *' {aka 'const unsigned char *'} to 'sam_ctrlep_write' declared here
 1845 | static void sam_ctrlep_write(struct sam_ep_s *privep, const uint8_t *buffer,
      |             ^~~~~~~~~~~~~~~~
chip/sam_usbdevhs.c:2001:24: note: 'response' declared here
 2001 |   union wb_u           response;
      |                        ^~~~~~~~

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-09-08 15:56:52 +03:00
Petro Karashchenko
f39de6fd1a arch/arm/armv[7|8]-m: implement dcache clean as barrier in write-through mode
This change fixes the issue when SAMv7 GMAC sometimes does not start packet
transmission. The issue is that EMAC_NCR_TSTART is written to EMAC_NCR register
while tx descriptor is not delivered to memory.

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-08 11:54:04 +08:00
Eren Terzioglu
a26996fb3b xtensa/esp32s3: Add support to TWAI/CANBus controller 2023-09-08 01:49:43 +08:00
hujun5
83ba72e4b4 cxd56xx: rm sched_[un]lock
According to the current implementation, "cxd56_cpu1siguninit" will only
be called once during the NuttX startup phase,
and it won't involve scenarios of multi-threaded concurrent access.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-09-08 01:47:40 +08:00
Michal Lenc
c2bc3dfb12 samv7: add support for SD card detection from CD/DAT3 line
Some SD card connectors do not have separate card detection pin. In that
case card detection has to be done on CD/DAT3 data line. This means
software (i.e. architecture level driver) has to take care of pin
configuration switching (pin has to be set as data pin in case of
transfer and as interrupt card detection pin when there is no action
on data line).

This commit adds CD/DAT3 line card detection support for SAMv7 MCU.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-09-08 01:13:36 +08:00
yanxiaowei
5c780f6697 sim/framebuffer: fix memory leak
LeakSanitizer: detected memory leaks in XStringListToTextProperty

Signed-off-by: yanxiaowei <yanxiaowei@xiaomi.com>
2023-09-07 11:21:58 +03:00
cuiziwei
ba73272f67 nuttx/sim:add up_irq_enbale function.
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2023-09-06 21:42:42 +03:00
Jukka Laitinen
b750f94896 arch/risc-v/src/mpfs: Generate an unique locally administrated MAC address
Add a function to read PolarFire's serial number from system controller, and use the first five digits as device's mac address

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-09-07 00:53:00 +08:00
Jari Nippula
ef18d2b599 arch/riscv/src/mpfs/mpfs_ethernet.c: discard err rxframe in int work
Workaround to avoid deadlock situation: The RX shall not try to wait for complete
frame in case there is RX errors detected.

In case mpfs_receive is called, it keeps waiting for complete frame and
also keeps the net_lock locked. In the mean while, the TX may run out of free
descriptors, but can not get net_lock mutex lock to be able to release used
descriptors. If there are no free TX descs it disables RX interrupts because
it may require to send response to the received frame.
So, TX side keeps RX interrupts disabled due to lack of free descriptors and
RX blocks TX to release those descs by stubbornly waiting for complete frame.
2023-09-07 00:53:00 +08:00
Xu Xingliang
a2df576ecf kasan: add option to disable read/write checks
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2023-09-07 00:41:43 +08:00
yintao
cb105192c7 nuttx/sim: Sim_rptun support configuring whether the master will automatically boot slave
Signed-off-by: yintao <yintao@xiaomi.com>
2023-09-06 17:05:55 +03:00
Eero Nurkkala
0152b031a4 risc-v/mpfs: enhance rpmsg throughput
RPMSG is associated with the use of HPWORK / LPWORK queues.
After sending a message to the remote end (Linux), the system
waits for an ack before proceeding. Unfortunately this may
take sometimes more time than one would expect. Ack waiting is
also unnecessary: nothing is done with that information. Even
worse, the net_lock() is also held during the blocked time so
it blocks other network stacks that are unrelated to this.

Also reorganize the mpfs_opensbi_*.S so that the trap
handler is easily relocated in the linker .ld file without
the need to relocate the utils.S. This makes it easier to
separate the files into own segments. The trap file should be
located in the zero device.

Moreover, provide support for simultaneous ACK and message
present handling capabilities in both directions. There are
times when both bits are set but only other is being handled.

In the end, the maximum throughput of the RPMSG bus increases
easily 10-20% or even more.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-09-06 14:32:11 +08:00
Seppo Hirvela
67ad63c7a4 risc-v/mpfs: ihc: fix to work with the latest NuttX OpenAMP version 2023-09-06 14:32:11 +08:00
Jani Paalijarvi
a1aebb7a64 risc-v/mpfs: ihc: Minor fixes
Remove unnecessary VQID shifting (16 -> 0).
Give an error if RPTUN init fails.
2023-09-06 14:32:11 +08:00
Jani Paalijarvi
cc5e8222b3 risc-v/mpfs: ihc: Increase RPMSG buffer size
Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
2023-09-06 14:32:11 +08:00
Jani Paalijarvi
3bd4bd6196 risc-v/mpfs: ihc: Make Vring addresses configurable 2023-09-06 14:32:11 +08:00
Jani Paalijarvi
00cb72bc09 risc-v/mpfs: ihc: Make IHC HSS workaround configurable 2023-09-06 14:32:11 +08:00
Philippe Leduc
87cec56154 Handle GPIO IRQs
Add board buttons
2023-09-06 12:30:35 +08:00
Philippe Leduc
5b7c948aef Add GPIO
Add userleds
2023-09-06 12:30:35 +08:00
Petro Karashchenko
12ea47b10f arch/xtensa/esp32s3: add UART2 support
This commits adds support of UART2 for EPS32S3 and fixes pin mode
assignment for iomux mode

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-06 02:40:49 +08:00
Stuart Ianna
99d630b18d arch/risc-v/litex/litex_sdio: Address race condition in eventwait.
Wraps litex_eventwait in a critical section to handle the case that an event can occur before it's waited on.
2023-09-06 02:23:57 +08:00
Tiago Medicci Serrano
8a51534903 esp32s3/i2s: Check compatibility of the current master clock set
The master clock frequency should be multiple of the sample rate
and bit clock at the same time. Then, check if the current master
clock satisfies such a condition and set it accordingly otherwise.
2023-09-05 13:33:05 +08:00
Tiago Medicci Serrano
f1b459347b esp32s3/i2s: Add interface to stop the I2S streams
In order to gracefully stop the I2S stream, add an interface to set
a `streaming` status variable that sets the `AUDIO_APB_FINAL` flag
that will be handled by the upper layers of the audio subsystem.
2023-09-05 13:33:05 +08:00