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Author SHA1 Message Date
Oki Minabe
4fa21c4719 armv7-a: Inner Shareable TLB maintenance operations 
Summary:
- Use Inner Shareable for TLB maintenance operations
- Add config option as CONFIG_ARM_HAVE_MPCORE
- This PR is in preparation for smp with kernel build

Impact:
- armv7-a

Testing:
- sabre-6quad:smp w/ qemu
- sabre-6quad:knsh_smp w/ qemu (WIP)

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
 2022-05-06 15:26:59 +09:00
Xiang Xiao
45fb96c508 esp32x/wlan: Fix error: increment of a boolean expression 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-05 16:23:32 -03:00
Xiang Xiao
346c3a1e83 drivers/sensors: Fix incompatible pointer type for bool 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-05 16:23:32 -03:00
Xiang Xiao
a229e4a399 boards: Remove CONFIG_C99_BOOL8 from all defconfig 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-05 16:23:32 -03:00
Xiang Xiao
1e0f3ba4da libc: Remove C99_BOOL8 from libs/libxx/Kconfig 
since it can be detected automatically by __STDC_VERSION__

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-05 16:23:32 -03:00
Xiang Xiao
fb996ebaa9 compiler.h: Move c++ standard feature out of compiler specific section 
and correct the code indent

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-05 16:23:32 -03:00
chao.an
0c223998c7 arm/cortex-m/toolchain: try print runtime library only in clang 
fix compile warning:

make: arm-nuttx-elf-gcc: Command not found

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-05-05 17:31:12 +02:00
Ville Juven
fdef3a7b92 binfmt/libelf: Fix function description field 
Copy&paste error, wrong description field used
 2022-05-04 10:34:24 +03:00
Xiang Xiao
bbdbca00c1 libc/assert: let CONFIG_NDEBUG default to !CONFIG_DEBUG_ASSERTIONS 
so the user could just change CONFIG_DEBUG_ASSERTIONS in most case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-04 10:07:34 +03:00
Xiang Xiao
577f301a2c libc: Move cxx_initialize.c from libc/sched/ to libc/misc 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-04 08:58:43 +02:00
Xiang Xiao
b9eff677fe libc: Simplify the c++ initialization 
1.Remove CXX_INITIALIZE_MACHO and CXX_INITIALIZE_SINIT
2.Merge cxx_initialize_sinit.c and cxx_initialize_macho.c into cxx_initialize.c

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-04 08:58:43 +02:00
Xiang Xiao
c1082f04d3 libxx: Make HAVE_CXXINITIALIZE workable even HAVE_CXX isn't enabled 
since this infrastructure is also used in no c++ case(e.g. gcov)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-04 08:58:43 +02:00
Abdelatif Guettouche
b19b931722 arch/xtensa/src/common/xtensa_coproc.S: Use the first allocated memory 
for the local variable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-04 01:39:07 +08:00
Simon Filgis
6e8c32e778 MCAN_INT_ACKE must be on the list of MCAN_TXERR_INTS to be properly handeled 2022-05-04 01:38:25 +08:00
Anton Potapov
862b815f87 Restore lost flash define for stm32. 2022-05-03 23:07:15 +08:00
Xiang Xiao
0b84e07467 sensors/ak09912: Fix the style problem 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-03 16:50:52 +03:00
Xiang Xiao
c628529e2d arch/arm: Remove FAR and CODE from board folder(3) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-03 16:50:52 +03:00
Xiang Xiao
a3c9b413d8 arch/arm: Remove FAR and CODE from board folder(2) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-03 16:50:52 +03:00
Xiang Xiao
cd001725b7 arch/arm: Remove FAR and CODE from board folder(1) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-03 16:50:52 +03:00
Xiang Xiao
972a260391 arch/arm: Remove FAR and CODE from chip folder(3) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-03 16:50:52 +03:00
Xiang Xiao
44ad6d0a23 arch/arm: Remove FAR and CODE from chip folder(2) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-03 16:50:52 +03:00
Xiang Xiao
03c31d332f arch/arm: Remove FAR and CODE from chip folder(1) 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-03 16:50:52 +03:00
Xiang Xiao
fead1964cb boards/space: Remove the unneeded XXXEXT definition 
these make variable is defined in common place now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-03 16:48:35 +03:00
Ville Juven
248b738f25 arm_addrenv: Add stubs for modifying permissions 
Adds stubs for up_addrenv_text_enable/disable_write. These don't have
to do anything as the ARM MMU allows setting access per mode. Currently
the settings for user .text area grants the kernel write access, but
revokes user write access.
 2022-05-03 21:25:25 +09:00
Ville Juven
9af8b740e6 Elf loader: give temporary write access to user .text memory 
When the .elf file is loaded from disk, the kernel must be given write
access to the allocated .text section in the task's address environment.

The access is removed after the elf is loaded and relocations are done.

NOTE:
The reason this works for the ARM implementation, is that the ARM MMU
can be configured to give write access for the privileged mode, but
revoke write access for the user mode.

Regardless, it would be smart to revoke write access even for the
kernel, when the kernel does not need it. This framework allows doing
that, if someone wishes to take up the task.
 2022-05-03 21:25:25 +09:00
Oki Minabe
0ba891c1b0 armv7-a: smp: fix stack coloration 
Summary:
- The stack pointer is subtracted to alloc xcptcontext area
  in the __cpu?_start block
- Fix the stack coloration overrun to the previous cpu's xcpt area

Impact:
- armv7-a's smp configuration

Testing:
- smp and ostest on sabre-6quad:smp w/ qemu

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
 2022-05-03 19:12:04 +08:00
Masayuki Ishikawa
0908c67d73 boards: rv-virt: Add support ELF to nsh and nsh64 defconfigs 
Summary:
- This commit adds support ELF to nsh and nsh64 defconfigs

Impact:
- None

Testing:
  nsh> mount -t hostfs -o fs=../apps/bin /system/bin
  nsh> hello
  Hello, World!!

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-05-03 13:57:24 +08:00
Ville Juven
2fd29b6408 RISC-V: Fix bug in riscv_addrenv.c 
Need 1 full page extra for heap, not 1 byte.
 2022-05-03 03:05:22 +08:00
Masayuki Ishikawa
9b20f97064 boards: rv-virt: Add hostfs support to nsh and nsh64 defconfigs 
Summary:
- This commit adds hostfs support to nsh and nsh64 defconfigs

Impact:
- None

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-05-02 19:46:58 +08:00
Masayuki Ishikawa
5a9b2920e8 arch: risc-v: Add support for semihosting and hostfs 
Summary:
- This commit adds support for semihosting and hostfs

Impact:
- None

Testing:
- Tested with nsh and nsh64 (defconfig will be updated later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-05-02 19:46:58 +08:00
Ville Juven
9c5fb9ec8d binfmt_execmodule: Use heap size getter for print 2022-05-02 17:06:08 +08:00
Ville Juven
0ae2e68116 RISC-V: Temporarily disable error about missing SBI 2022-05-02 16:13:15 +08:00
Ville Juven
a5d49140ea MPFS: Add dummy rofms image 
To allow building with ROMFS enabled
 2022-05-02 16:13:15 +08:00
Ville Juven
31b916c485 MPFS: Add kernel space mappings 
Mappings are done with vaddr=paddr.
- I/O space mapped with two gigapages
- Kernel space mapped to statically allocated page tables. 2MB of kernel
  memory is supported.
- Page pool is mapped to the kernel space, to allow virtual memory access
  for the kernel e.g. to initialize the page memory when it is allocated.
 2022-05-02 16:13:15 +08:00
Ville Juven
2287ebcbcf MPFS: Add knsh (CONFIG_BUILD_KERNEL=y) 
Re-name the old knsh (CONFIG_BUILD_PROTECTED=y) to pnsh
 2022-05-02 16:13:15 +08:00
Ville Juven
3f6504076e MPFS: Add page pool allocation 2022-05-02 16:13:15 +08:00
Ville Juven
cccfe31d0c MPFS: Add sources for CONFIG_ARCH_ADDRENV 2022-05-02 16:13:15 +08:00
Ville Juven
6bf8623897 RISC-V: Fix crt0 file compilation 
Definition of STACK_FRAME_SIZE was moved
 2022-05-02 16:10:47 +08:00
Masayuki Ishikawa
7b6ac23277 boards: sabre-6quad: Add defconfig for libcxx 
Summary:
- This commit adds defconfig for libcxx

Impact:
- None

Testing:
- Tested with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-05-02 10:24:16 +03:00
Masayuki Ishikawa
c5af689180 boards: sabre-6quad: Fix dramboot.ld for libcxx 
Summary:
- I noticed that cxxtest does not work correctly.
- Finally, I found that initializers for c++ is not called.
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with cxxtest (defconfig will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-05-02 10:24:16 +03:00
Xiang Xiao
f77a0ec7fa arch: Move -finstrument-functions from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 23:54:15 +03:00
Xiang Xiao
1fde7e17bb arch: Move -fstack-protector-all from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 23:54:15 +03:00
Xiang Xiao
aeb9c5d822 boards: Move -fno-strict-aliasing from Make.defs to Toolchain.defs 
and migrate MAXOPTIMIZATION into ARCHOPTIMIZATION

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 11:36:41 +03:00
Xiang Xiao
1e23799455 arch/riscv: Optimize the syscall performance in kernel mode 
by renaming riscv_dispatch_syscall to sys_callx, so the caller
don't need the immediate step(syscallx->riscv_dispatch_syscall)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 11:31:01 +03:00
Xiang Xiao
efce8bd198 Revert "arch/risc-v: use STACK_FRAME_SIZE for in S-mode syscall asm" 
This reverts commit 9b7f9867aa.
 2022-05-01 11:31:01 +03:00
Xiang Xiao
a021177de8 arch: Fix the style found in review 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 11:29:44 +03:00
Xiang Xiao
4a03cab6f9 libc: Remove the redundant seek in writev 
since the file position isn't changed if write return fail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 10:07:36 +03:00
Xiang Xiao
220f1dd6a0 boards: run tools/refresh.sh to normalize defconfig 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 09:50:50 +03:00
Xiang Xiao
05ff19d17b tools/testbuild.sh: Don't skip configure and distclean 
to improve the test coverage

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 09:50:50 +03:00
chao.an
5db447623d arm/cxd56xx/lc823450/rp2040: replace arch testset to board implement 
This patch to resolve the regression which leads to the breakage of spresense:smp

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-05-01 06:38:25 +09:00