Commit Graph

279 Commits

Author SHA1 Message Date
p-szafonimateusz
2b1da40832 arch/x86_64/intel64: fix compilation errors in intel64_oneshot_lower.c
clock_time2ticks and clock_ticks2time macros changes but this file was not update

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 21:24:39 +08:00
p-szafonimateusz
d6a6a0a7cc arch/intel64/hpet: add FSB interrupts support and support for 32-bit mode
These are changes to make HPET work with ACRN hypervisor:

- FSB interrupt delivery (which works like PCI MSI)
- 32-bit mode support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 09:28:08 -03:00
p-szafonimateusz
0659b333b4 arch/x86_64/intel64: add MSI/MSI-X support
Add MSI and MSI-X support for intel64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 09:42:08 +08:00
ouyangxiangzhen
74df0974b2 arch/x86_64: Add ARCH_X86_64_IDLE_NOP and ARCH_X86_64_IDLE_MWAIT
Using the HLT instruction in VM usually traps into the Hypervisor and releases CPU control. This will result in real-time performance degradation. Using the NOP or MWAIT instruction for an IDLE loop can reduce energy consumption while not trapping into the Hypervisor.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2024-09-12 18:12:12 +02:00
hujun5
1aab457b4c sched:add parameters to restore_critical_section
reason:
In SMP, when a context switch occurs, restore_critical_section is executed.
To reduce the time taken for context switching, we directly pass the required
parameters to restore_critical_section instead of acquiring them repeatedly.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-10 23:14:09 +08:00
p-szafonimateusz
882c0d0a47 arch/x86_64: convert all asm() to __asm__()
asm() is not supported by -std=c99, __asm__() is more portable

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-07 01:01:24 +02:00
ouyangxiangzhen
dc7d3470e6 arch/x86_64: Fix wrong RDTSCP implementation
RDTSCP instruction reads the current value of the processor’s
time-stamp counter (a 64-bit MSR) into the EDX:EAX registers, and it
also reads the value of the IA32_TSC_AUX MSR (address C0000103H) into
the ECX register. However, the current RDTSCP implementation does not
provide a hint for the compiler that ECX has been changed, resulting in
register corrupted and subtle errors.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2024-09-06 17:27:20 +02:00
ouyangxiangzhen
f6e4ab25bd arch/x86_64: Support QEMU PVH ELF loader
Enabling CONFIG_ARCH_CHIP_INTEL64_PVH_BOOT will allow nuttx.elf loaded by QEMU -kernel parameter.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2024-09-06 20:56:46 +08:00
yangshuyong
7cbb7d36d8 Changed the x86 64 pci driver
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
hujun5
608b59e401 smp: enable smp_call in all smp arch
reason:
In subsequent implementations, we will replace up_cpu_pause with smp_call.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-06 07:11:38 +09:00
fangxinyong
7b05a550dc sched: replace up_cpu_index with this_cpu
Make this_cpu is arch independent and up_cpu_index do that.
In AMP mode, up_cpu_index() may return the index of the physical core.

Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
2024-09-05 12:09:24 +08:00
hujun5
433f159c06 arch: remove unused up_cpu_pausereq waiting
reason:
After the up_cpu_pause call completes, it guarantees that other CPUs have fully stopped.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-05 07:15:54 +09:00
guoshichao
4c01594d5b nuttx: remove the unnecessary -pipe build option
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-08-31 10:22:20 +08:00
Petro Karashchenko
a8ec8b8cd2 arch/x86_64: remove 'ul' sufix from shift value
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-08-25 19:22:15 +08:00
Petro Karashchenko
b7cbe16fed arch/x86_64: remove redundant init
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-08-25 19:22:15 +08:00
cuiziwei
7b43a9413a arch/EXTRA_LIBS: link all staging library.
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2024-08-21 01:40:15 +08:00
xuxin19
9fdd299d32 cmake:split the archive process to avoid parameter problems
refer to:https://cmake.org/cmake/help/latest/variable/CMAKE_LANG_ARCHIVE_APPEND.html

this will solve the problem of too long parameters
when executing ar in cygwin environment such as msys.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-08-18 23:26:01 +08:00
chenxiaoyi
7ce5241f0e types.h: fix windows build error
Windows Kits\10\Include\10.0.22621.0\ucrt\corecrt.h(605,39): error C2371: 'wint_t': redefinition; different basic types
Windows Kits\10\Include\10.0.22621.0\ucrt\corecrt.h(606,39): error C2371: 'wctype_t': redefinition; different basic types

Co-authored-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
Co-authored-by: xuxin19 <xuxin19@xiaomi.com>
2024-08-14 22:36:57 +08:00
yanghuatao
fecc5091af toolchain/ghs: Fix SP_DSB warnings
"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 252: warning #76-D:
          argument to macro is empty
        SP_DSB();
               ^

"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 261: warning #76-D:
          argument to macro is empty
    SP_DMB();
           ^

"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 252: warning #76-D:
          argument to macro is empty
        SP_DSB();
               ^

"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 261: warning #76-D:
          argument to macro is empty
    SP_DMB();
           ^

"/mnt/yang/qixinwei_vela_warnings/nuttx/include/nuttx/spinlock.h", line 296: warning #76-D:
          argument to macro is empty
        SP_DSB();
               ^

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-08-11 14:28:12 -03:00
chao an
4ef3eeb305 arch/x86_64: fix build break if disable CONFIG_SPINLOCK
Create version.h
chip/intel64_irq.c:78:34: error: conflicting type qualifiers for ‘g_irq_spin’
   78 | static spinlock_t                g_irq_spin;
      |                                  ^~~~~~~~~~
In file included from chip/intel64_irq.c:40:
include/nuttx/spinlock.h:168:28: note: previous declaration of ‘g_irq_spin’ with type ‘spinlock_t’ {aka ‘volatile unsigned char’}
  168 | extern volatile spinlock_t g_irq_spin;
      |                            ^~~~~~~~~~
chip/intel64_cpu.c: In function ‘x86_64_cpu_ready_set’:
chip/intel64_cpu.c:314:3: warning: implicit declaration of function ‘spin_lock’ [-Wimplicit-function-declaration]
  314 |   spin_lock(&g_ap_boot);
      |   ^~~~~~~~~
chip/intel64_cpu.c:322:3: warning: implicit declaration of function ‘spin_unlock’; did you mean ‘sched_unlock’? [-Wimplicit-function-declaration]
  322 |   spin_unlock(&g_ap_boot);
      |   ^~~~~~~~~~~

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-05 16:20:47 +08:00
p-szafonimateusz
3c05da536a arch/intel64: add support for HPET as system clock
HPET can be used as system clock for x86_64

to set HPET as system clock you have to enable:
  CONFIG_ONESHOT=y
  CONFIG_ALARM_ARCH=y
  CONFIG_INTEL64_ONESHOT=y
  CONFIG_ARCH_INTEL64_HPET_ALARM=y

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-08-01 17:49:41 +08:00
p-szafonimateusz
07c1f5db92 arch/intel64/irq.h: rename rdtsc macros
rename _rdtsc macro to rdtsc to avoid conflict with external code
rename rdtsc macro to rdtscp to be the same as asm instruction used

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-30 21:53:08 +08:00
p-szafonimateusz
90e47bf1f5 arch/x86_64/src/intel64/intel64_cpu.c: remove workaround for spin_lock
remove workaround for spin_lock which is no longer needed after inline splinlock change
2024-07-30 21:40:53 +08:00
hujun5
a4fece3450 spin_lock: inline spin_lock
test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
2024-07-15 02:29:30 +08:00
p-szafonimateusz
8682321d0c arch/x86_64: addrenv support
Add addrenv support for x86_64.
For now we support mapping on PT level, so PD, PDT and PML4 are static

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
0200a48f72 arch/intel64/intel64_map_region.c: use MMU api to implement up_map_region
use new MMU api to implement up_map_region().

The new implementation support maping over 0xffffffff but requires CONFIG_MM_PGALLOC=y

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
b1f3435d22 arch/intel64: add support for MM_PGALLOC
add support for MM_PGALLOC for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
e0183927b4 arch/x86_64: add MMU interface
add MMU api for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
53d112fa95 x86_64: add ELF support
add arch_elf64.c for x86_64, ported from sim/x86

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
bd73a915bd arch/x86_64: add support for FMA, AVX-2 and AVX-512
add support for FMA, AVX-2 and AVX-512 instruction sets for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-01 13:27:33 +08:00
p-szafonimateusz
2192d83200 arch/x86_64: add support for XSAVE/XRSTOR
Add support for XSAVE/XRSTOR to handle x86_64 procesor extended states.
Support for these instructions is required to support AVX instruction set

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-01 13:27:33 +08:00
p-szafonimateusz
66516918ce x86_64/irq.h: use 32bit operations in up_cpu_index()
Use 32bit operations for id field in intel64_cpu_s which is int type.

This fixes an error that appears when enabling some debug options:
  `Error: operand size mismatch for `movq'``

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-30 21:40:50 +08:00
xuxingliang
c6d712df0e sched: move nxsched_dumponexit() to task_exithook
So the tcb->group still exists to dump files.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-06-30 17:30:42 +08:00
p-szafonimateusz
8220b169f3 arch/intel64: add SMP support
modified various intel64 files to support SMP

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 22:37:48 +08:00
p-szafonimateusz
8d4681a190 arch/intel64: add support for AP cores boot
Intel64 can now boot application cores which is needed for SMP

IMPORTANT: CONFIG_BOARD_LOOPSPERMSEC must be properly configured,
otherwise AP boot sequence can fail due too short delays during the AP startup

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 22:37:48 +08:00
p-szafonimateusz
961ade88fe arch/intel64: add support for inter-processor signaling
Add support for inter-processor signaling in x86_64 based on up_trigger_irq() interface.
Preparations for SMP.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 12:57:37 +08:00
p-szafonimateusz
c6170286ca arch/intel64: add cpu specific data and per-cpu interrupt stacks
Use GS base regsiter to store reference to CPU private data.
Then we can easily refer to private CPU data using the GS segment.

Required for SMP support.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 09:40:32 -03:00
p-szafonimateusz
97726d9747 arch/x86_64/intel64/intel64_rtc.c: fix compilation
fix missing reference to comm_region->tsc_khz and
fix 'defined but not used' warnings in arch/x86_64/intel64_rtc.c

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 09:47:46 +02:00
p-szafonimateusz
09146beee9 x86_64: hide --whole-archive behind Kconfig option
Hide --whole-archive behind Kconfig option for x86.
This option is not needed and breaks ELF modules build.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 02:31:53 +08:00
p-szafonimateusz
7afee44c22 arch/x86_64: addrenv should add offset only for RAM region
addrenv should add LOAD offset only for RAM region, the rest of memory is maped 1:1

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-28 02:31:09 +08:00
p-szafonimateusz
c5d1eaae72 arch/intel64: get TSC frequency only when not provided from Kconfig
on ACRN hypervisor obtaining frequency from CPUID seems to be broken,
so we have to specify this value from Kconfig.

If frequency autodetection is enabled but the returned data are
incorrect - crash early.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-27 11:49:50 -03:00
xuxin19
275ec7102c cmake:bugfix CMake compilation options settings should not use strings
when repeatedly enabling and disabling string-controlled configurations,
the generated toolchain configuration may be incorrect.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-05-30 10:02:10 -03:00
Philippe Leduc
3dc6b4c9bd Add basic support for locales in order to C++ streams to build and work for simple cases (POSIX / C locale).
Fix build with C++ GCC toolchain
2024-04-29 17:34:10 +08:00
p-szafonimateusz
9a6fa489d8 x86_64_acpi.c: avoid debug messages in acpi_init()
acpi_init() must be called early during boot, some system components may be
unavailable at this stage, so debug messages won't work

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-24 12:55:58 -03:00
p-szafonimateusz
37a6806bb4 x86_64_acpi.c: cosmetic changes
cosmetic changes after review

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-04-24 12:04:08 +08:00
p-szafonimateusz
d484e85bb9 x86_64_acpi.c: make sure that RSDP is mapped
rsdp memory may be not mapped when provided from multiboot2 header.
For some reason the previous code worked on some machines.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-23 11:29:21 +02:00
p-szafonimateusz
530f5cd324 arch/intel64: add cache support
Add dcache and icache support for intel64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:13:44 +02:00
p-szafonimateusz
30226901c0 arch/x86_64: add simple ACPI parser
add simple ACPI parser for intel64.

For now RSDP signature can be found in BIOS legacy region or can be provided by multiboot2

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:47:09 +08:00
p-szafonimateusz
0aac7d929d intel64/arch.h: fix ist_t structure, there is no reserved5 field
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00
p-szafonimateusz
8b09118350 intel64/intel64_handlers.c: cosmetic changes
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-04-22 23:46:10 +08:00