Support for the STMicroelectronics STM32L562E-DK development board. This
is a proof-of-concept port that demonstrates running NuttX as the
Non-Secure TrustZone domain companion to TrustedFirmware-M.
Signed-off-by: Michael Jung <mijung@gmx.net>
The QuickFeather board added as an initial target.
These featrues are minimally implemented:
* Clock Configuration -- All clocking registers are defined and
configuration is used to setup the HSO, M4 Core, and M4 Perif
clocks. Additionally some clock debugging is stubbed for
bringing out clock paths to IO pins.
* UART -- The lowputc as well as the serial driver is implemnted
for the single UART device. Currently the configuration is
hard coded, but uses the proper interfaces to later fill in.
* SysTick -- The system tick timer is implemented and clocking
properly. Tickless mode is not yet implemented.
* Interrupts -- The interrupt system is implemented and verified
using the UART and SysTick systems.
* GPIO -- GPIO and IOMUX systems are defined and implemented.
This is verified using the UART as well as the Arch LED
system. The GPIO interupt system is stubbed out but not
implemented.
* Arch LEDS -- The blue LED as part of the RGB LED is configured
and attached to the Arch LED system. This indicates the device
coming online as well as when a hardfault is triggered.
Applications and Testing:
* There is a nsh configuration implemented that includes debug
features as well as the ostest, getprime, and mem test.
All of these have been run and verified.
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.
This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.
boards/Kconfig:
* Make NuttX recognize the existence of b-g474e-dpow1,
the B-G474E-DPOW1 Discovery Board.
boards/arm/stm32/b-g474e-dpow1/Kconfig:
boards/arm/stm32/b-g474e-dpow1/README.txt:
boards/arm/stm32/b-g474e-dpow1/configs/nsh/defconfig:
boards/arm/stm32/b-g474e-dpow1/include/board.h:
boards/arm/stm32/b-g474e-dpow1/scripts/Make.defs:
boards/arm/stm32/b-g474e-dpow1/scripts/ld.script:
boards/arm/stm32/b-g474e-dpow1/src/.gitignore:
boards/arm/stm32/b-g474e-dpow1/src/Make.defs:
boards/arm/stm32/b-g474e-dpow1/src/b-g474e-dpow1.h:
boards/arm/stm32/b-g474e-dpow1/src/stm32_appinit.c:
boards/arm/stm32/b-g474e-dpow1/src/stm32_autoleds.c:
boards/arm/stm32/b-g474e-dpow1/src/stm32_boot.c:
boards/arm/stm32/b-g474e-dpow1/src/stm32_userleds.c:
* Add minimal support for the B-G474E-DPOW1 Discovery
Board. The board boots successfully through to the
NSH prompt. NSH runs and is responsive.
With big thanks for detailed code review and suggestions:
David Sidrane (davids5)
Mateusz Szafoni (raiden00)
Abdelatif Guettouche (Ouss4)
* boards/arm/stm32/nucleo-f429zi: Initial port to nucleo-f429zi board.
* boards/arm/stm32/nucleo-f429zi: Add two demo configs.
* Add the nucleo-f429zi to boards/Kconfig
boards/Kcondig: Fixed line alignment issue.
* boards/arm/stm32/nucleo-f429zi: Change the license header of all new files to an Apache 2.0 license.
* boards/arm/stm32/nucleo-f429zi: nxstyle fixed
* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer
* arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2
* arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly
* arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling
* arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure
* arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method
* arch: x86_64: Fix C alias of page table and GDT/IST
* arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup
* arch: x86_64: Consolidate MSR definition in arch/arch.h
* arch: x86_64: Edit the way of handling GDT/IST in C into structures
* arch: x86_64: Correct the starting point of isr/irq stack
* arch: x86_64: Update up_initialize.c with the new initializing procedure
* arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT
* arch: x86_64: Overhual of interrupt initialization procedure
* arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory]
* arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure
* arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug
* arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot
* arch: x86_64: Correctly apply license header, comment and format code
* arch: x86_64: properly send a SIGFPE on floating point error
* arch: x86_64: Remove unused variable in up_restore_auxstate
* arch: x86_64: properly trash the processor with an infinite loop
* arch: x86_64: Fix typo in ISR handler causing ISR not handled
* arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path
* arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE
* arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method
* board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support
* arch: x86_64: update defconfigs
* arch: x86_64: rename qemu as qemu-intel64
* arch: x86_64: update Board readme
