Commit Graph

15219 Commits

Author SHA1 Message Date
David Sidrane
8068dc0238 stm32h7:sdmmc It is not an error if no wait was needed
If the CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is enabled and the
   card is found to be ready in the waitenable call. Then
   we do not need a Watchdog nor to configure the pin for
   IRQ to detect ready.

   This was reported as an error, and it is not, it simply means
   we do not have to wait.
2023-05-10 00:46:44 +08:00
simbit18
58ebf26b98 arch/arm/src/tlsr82/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
79d6d56532 arch/arm/src/sama5/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
64c4fb0a53 arch/arm/src/s32k3xx/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
simbit18
02c9e20b8d arch/arm/src/lpc43xx/Kconfig: Fix indentation
Remove spaces from Kconfig
2023-05-10 00:45:29 +08:00
simbit18
1fc6a4469a arch/arm/src/kinetis/Kconfig: Fix indentation
Remove spaces from Kconfig
2023-05-10 00:45:29 +08:00
simbit18
75b02b037c arch/arm/src/imx6/Kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-10 00:45:29 +08:00
Filipe Cavalcanti
c5f3d3d596 arch/arm/src/common/tiva_i2c.c: Update the current message buffer before writing to I2C data register. 2023-05-09 12:22:48 +03:00
Lwazi Dube
5a553db88a arch/arm/sama5: Fix OHCI SchedulingOverrun interrupt storm.
The following message is printed continuously and the nsh
shell is unusable on sama5d3-xplained.
"OHCI ERROR: Unhandled interrupts pending: 000001". This
happens when a keyboard is removed and reinserted on
port3 (lower port) while a bluetooth dongle is in port2.
2023-05-09 10:18:34 +08:00
simbit18
8a0729ac18 arch/arm/src/stm32h7/kconfig
Remove spaces from Kconfig
2023-05-08 12:42:54 -03:00
simbit18
5ed2d90c31 arch/arm/src/sama5/kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-08 12:42:54 -03:00
simbit18
4d48e4626d arch/arm/src/imxrt/Kconfig: Fix indentation
Remove spaces from Kconfig
2023-05-08 12:42:54 -03:00
Filipe Cavalcanti
9355bd9d01 boards/arm/tiva: mpu6050 driver binding to TM4C1294
Fixed printf warning during compilation and added MPU6050 to bringup of tm4c.
2023-05-08 11:48:06 -03:00
Xiang Xiao
6f6fce95a2 Replace all sprintf with snprintf
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-08 09:57:01 +02:00
hujun5
0f243bde33 arch: fix the issue of asynchronous signal processing
in SMP, signal processing cannot be nested, we use xcp.sigdeliver to identify whether there is currently a signal being processed, but this state does not match the actual situation
One possible scenario is that signal processing has already been completed, but an interrupt occurs, resulting in xcp.sigdeliver not being correctly set to NULL,
At this point, a new signal arrives, which can only be placed in the queue and cannot be processed immediately
Our solution is that signal processing and signal complete status are set in the same critical section, which can ensure status synchronization

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-08 09:11:14 +02:00
zhangyuan21
841b178782 assert: show stacks with the sp from regs
1. Get the value of sp from dump regs when an exception occurs,
   to avoid getting the value of fp from up_getsp and causing
   incomplete stack printing.
2. Determine which stack the value belongs to based on the value
   of SP to avoid false reports of stack overflow

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-05 13:40:04 +08:00
zhangyuan21
884be2bdb9 assert: Distinguish between assert and exception
CURRENT_REGS may change during assert handling, so pass
in the 'regs' parameter at the entry point of _assert.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-03 14:49:32 +08:00
Lwazi Dube
e2083354f1 arch/arm/sama5: Use a recursive mutex to fix OHCI deadlock.
Unplugging a USB device from an OHCI root hub will cause
a deadlock if DRVR_EPFREE is called from sam_rhsc_bottomhalf. A
typical call chain looks like this: sam_rhsc_bottomhalf->
CLASS_DISCONNECTED->usbhost_destroy->DRVR_EPFREE. In this case
DRVR_EPFREE tries to lock a locked mutex. A recursive mutex
prevents this deadlock.
2023-05-03 12:53:30 +08:00
Xiang Xiao
3c54e66683 mtd/nand: Fix the comment and remove the uneeded inclusion
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-01 22:47:00 +03:00
TimJTi
9c66f14e38 SAMA5D2 Class D 2023-04-29 13:46:04 +08:00
zhangyuan21
4a4386c822 Revert "arch/armv7ar: use robust code sequences for cache maintenance"
This reverts commit 69fd539886.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-27 20:21:57 +08:00
chao an
60d188353c arm/unwind: EABI unwind needs frame pointer support
Signed-off-by: chao an <anchao@xiaomi.com>
2023-04-27 16:38:40 +08:00
zouboan
4b5c18b9b2 arm/Toolchain.defs: fix error sed:-e expression #1,character 1:unknown command:' in Windows native build
arm/Toolchain.defs: fix error sed:-e expression #1,character 1:unknown command:' in Windows native build
2023-04-27 00:32:15 +08:00
zhangyuan21
eb0e05be0d arch/armv7-r: add armv7-r smp support
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-26 10:54:30 +08:00
jturnsek
bcc8801480 Initial FlexIO support 2023-04-26 10:16:18 +08:00
Michal Lenc
40d07760f6 samv7: add support for adjtime() interface
This commit adds deifiniton of get_timer_period() and adj_timer_period()
functions used by adjtime() interface.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-04-25 14:37:50 -03:00
Fotis Panagiotopoulos
70e42f5bfe stm32_f7/h7_eth: Added error handling for abnormal interrupts. 2023-04-25 15:20:09 +02:00
Ville Juven
d48114a4b7 sched/addrenv.c: Implement re-entrancy for addrenv_select()
Store the old environment in a local context so another temporary address
environment can be selected. This can happen especially when a process
is being loaded (the new process's mappings are temporarily instantiated)
and and interrupt occurs.
2023-04-25 14:33:19 +02:00
Ville Juven
20623d7369 sem/sem_init: Change sem_xxx -> nxsem_xxx in kernel modules
Use the kernel space api nxsem_xxx when inside the kernel.
2023-04-25 13:41:51 +02:00
zhangyuan21
6605f95133 l2cc: Do not repeat disabling the cache when the cache is already disabled
When l2cc is already in disable state, performing a disable operation
again will flush incorrect cache data to memory

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-25 15:36:10 +08:00
zhangyuan21
69fd539886 arch/armv7ar: use robust code sequences for cache maintenance
Invalidate operations at DDI0246H_l2c310_r3p3_trm:
If there is a stale entry in the L2 cache, the system enables the invalidation of
the L1 cache. But before the controller invalidates the L2 cache, it allocates a
line from the L2 cache to an L1 cache.

The robust code sequence for invalidation with a non-exclusive cache arrangement is:
1. InvalLevel2 Address ; forces the address out past level 2
2. CACHE SYNC ; Ensures completion of the L2 inval
3. InvalLevel1 Address ; This is broadcast within the cluster
4. DSB ; Ensure completion of the inval as far as Level 2.

This sequence ensures that, if there is an allocation to L1 after the L1 invalidation, the data
picked up is the new data and not stale data from the L2

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-25 15:35:37 +08:00
Masayuki Ishikawa
fb6bef2c2d arch: imx6: Add support for AR8031 gigabit ethernet phy
Summary:
- This commit adds AR8031 gigabit ethernet phy for the
  sabre-6quad board.

Impact:
- None

Testing:
- Tested with sabre-6quad:netnsh_ar8031 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-04-25 11:45:19 +08:00
Masayuki Ishikawa
dc914f43ea arch: imx6: Fix CONFIG_IMX_ENET_ENHANCEDBD related code
Summary:
- This commit applies the changes from imxrt
- See 3a4542f3c4

Impact:
- imx6 ethernet with d-cache

Testing:
- Tested with imx6_with_ar8031 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-04-25 11:45:19 +08:00
chao an
b8780fe906 arch/arm: relax compiler check for workaround with "GCC 12.2"
1. relax compiler check for workaround with "GCC 12.2"
2. export GCCVER to environment

Signed-off-by: chao an <anchao@xiaomi.com>
2023-04-24 19:00:52 +03:00
zhangyuan21
d7de93f906 arch/arm: Resolving warnings for assembly instructions
arm/arm_saveusercontext.S:61: Warning: duplicated register (r14) in register list

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-24 23:49:33 +08:00
Xiang Xiao
51dc67ad5f fs: Add g_ prefix for all global file_operations instances
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-04-24 16:13:29 +02:00
raiden00pl
d416ead27c arch/nrf52: reimplement I-Cache control operations in nrf52_start.c 2023-04-22 01:42:01 +08:00
raiden00pl
c70c178a7d arch/nrf52: nvmc and flash should depends on ALLOW_BSD_COMPONENTS=y 2023-04-22 01:42:01 +08:00
raiden00pl
bd9bfa9302 arch/nrf53: add RPMSG HCI controller support 2023-04-22 01:37:24 +08:00
Fotis Panagiotopoulos
873abcb9ab stm32_eth: Added error handling for abnormal interrupts. 2023-04-22 01:30:48 +08:00
raiden00pl
cc7826df4d arch/nrf52: add QSPI support 2023-04-22 01:12:27 +08:00
zhangyuan21
1e726a914a arch/arm: change up_saveusercontext to assembly code
minidump will backtrace failure when use C code to save user context,
because the stack push operation in C code can disrupt the stack information.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-22 01:11:00 +08:00
David Sidrane
ac6ad45045 stm32l5:pinmap Add suffix to all pins and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings and
   all pins should have had suffixes to allow any pins attributes to
   be set. This is board dependent.

   This change adds CONFIG_STM32L5_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps with suffixes.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, CONFIG_STM32L5_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set CONFIG_STM32L5_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
7e48b58993 stm32wb:pinmap Add suffix to all pins and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings and
   all pins should have had suffixes to allow any pins attributes to
   be set. This is board dependent.

   This change adds CONFIG_STM32WB_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps with suffixes.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, CONFIG_STM32WB_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set CONFIG_STM32WB_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
a8093281c4 stm32f0l0g0:stm32f0{3|5|7|9}x_pinmap & stm32g0_pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32F0G0L0_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, CONFIG_STM32F0G0L0_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set CONFIG_STM32F0G0L0_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
77cf6ce273 stm32l4:stm32l4x{3|4|5|6|r}xx_pinmap pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32L4_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, CONFIG_STM32L4_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set CONFIG_STM32L4_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
1ece250b18 stm32:stm32f10{0|2|3{c|r|v|z}|5{r|v}|7v}_pinmap refactor
replace all GPIO_MODE_xxMHz with GPIO_MODE_2MHz provide GPIO_ADJUST_MODE
    and add legacy pinmap

    For the stm32F1 pinmaps should not have contained GPIO_MODE_50MHz settings
    on all pins. Speed is board dependent.

    This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
    lazy migration to using pinmaps that can have the GPIO_MODE_xxMHz set.

    The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
    The tools will take a board.h, and use all the defconfigs with the legacy
    pinmap and output the required changes that one needs to make to a board.h
    file.

    Eventually, CONFIG_STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
    pinmaps removed from NuttX.

    Any new boards added should set CONFIG_STM32_USE_LEGACY_PINMAP=n and
    fully define the pins in board.hf1
2023-04-19 09:58:11 +02:00
David Sidrane
ee6fb7880b stm32:stm32l15xxx pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
5d025d5d50 stm32:stm32g4xx{c|k|r|m|v|q} pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00
David Sidrane
98cd82f905 stm32:stm32f3{0|3|7}xxx pinmap Remove GPIO_SPEED_xxx and add legacy pinmap
Pinmaps should not have contained GPIO_SPEED_xxx settings.
   This is board dependent.

   This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
   lazy migration to using pinmaps without speeds.

   The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
   The tools will take a board.h file and a legacy pinmap and outut the required
   changes that one needs to make to a board.h file.

   Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
   pinmaps removed from NuttX.

   Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
   fully define the pins in board.h
2023-04-19 09:58:11 +02:00