Add the address alignment to keep the constraint of ARMv7-M architecture same as RAM vector.
ARMv7-M architecture describes the vector table address alignment as following.
The Vector table must be naturally aligned to a power of two
whose alignment value is greater than or equal to (Number of Exceptions supported x 4),
with a minimum alignment of 128 bytes.
I wonder why the implementation of arm_vectors.c does not follow
this constraint of address alignment about ARMv7-M architecture.
Although RAM vector is taken care about it.
I think, as the result it was done by linker script on each board.
At our system, NuttX will be started by bootloader.
To fix the address of entry point(__start) I set the address of entry point to beginning of binary,
so the beginning of binary is not a vector table.
At this case, keeping the address alignment constraint of arm_vectors.c is needed.
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s2 targets and removes the need
for running 'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
After change, when CONFIG_PM_NDOMAINS > 1,
the pm_register will not able to get notificaion
from not PM_IDLE_DOMAIN.
Should use pm_domain_register as a replacement.
Isolate domains from global callbacks can decrease
not necessary execution, and reduce the
lock instruction requirements.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
waitpid() cannot be used in kernel mode unless SCHED_HAVE_PARENT is
selected -> add dependency if BUILD_KERNEL is selected.
Why? Because without SCHED_HAVE_PARENT waitpid() works in a non-standard
way, meaning it does not use SIGCHLD to wake the parent, as it should.
Also, returning the child status via stat_loc corrupts memory as stat_loc
points to the parent's address environment:
pid_t nxsched_waitpid(pid_t pid, int *stat_loc, int options)
{
...
group->tg_statloc = stat_loc;
...
}
And later when the status is returned, the child writes to tg_statloc,
which points to the parent's address environment -> random memory
corruption:
static inline void nxtask_exitwakeup(FAR struct tcb_s *tcb, int status)
{
...
if (group->tg_statloc != NULL)
{
*group->tg_statloc = status << 8;
}
...
}
GRAN_ALIGNED should check that the memory block's alignment (log2align)
is correct, not that the memory block is aligned with the granule size.
This fixes DEBUGASSERT() in mm_granfree:
_assert: Assertion failed : at file: mm_gran/mm_granfree.c:49
The assertion triggers if granule size != alignment.
Cache the next timeout value in the drivers instance and update the mtimecmp value once. This is advantageous as the opensbi ecall to set the timer is expensive in systems which don't have the supervisor mode timer extension.
umm_memdump() should be always declared otherwise we get error when DEBUG_MM=n:
sched/task/task_exithook.c:468:7: error: implicit declaration of function ‘umm_memdump’; did you mean ‘mm_memdump’? [-Wimplicit-function-declaration]
This patch changes how user service calls are executed:
Instead of using the common interrupt logic, execute the user service
call directly.
Why? When a user makes a service call request, all of the service call
parameters are already loaded into the correct registers, thus it makes
no sense to first clobber them and then reload them, which is what the
old logic does. It is much more effective to run the system call directly.
During a user system call the interrupts must be re-enabled, which the
new logic does as soon as we know the exception is a user service call
request.
This patch does NOT change the behavior of reserved system calls (like
switch_context), only the user service call request is affected.
Also, convert the type to union; we don't need the list element once
the item has been popped from the free list (the linkage is never needed
when the item is in use).
This provides an alternate tickless scheduling method, which uses the riscv
mtimer as a timebase, allowing the time and timeh registers to used
throughout an application.
The exiting tickless method, using Litex's timer0 has been left in place, as
it is a more performant option, but currently has the potential issue
identified in #11189.
when repeatedly enabling and disabling string-controlled configurations,
the generated toolchain configuration may be incorrect.
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
This adds basic API description for ADC and DAC peripherals. External
ADC/DAC controllers are listed as well.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
