Correct flash write and erase functions, they inherit some
broken code from other platforms. Also fix the confusion between
eraseblock(sector) and page sizes.
Signed-off-by: Jari Nippula <jari.nippula@intel.com>
If the flash option register was locked before modifying it, return
it to the locked state after modify.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
SO_ERROR is used to report asynchronous errors that are the result
of events within the network stack and not synchronous errors that
are the result of a library call(send/recv/connect)
Synchronous results are reported via errno.
Linux Programmer's Manual
...
NAME
getsockopt, setsockopt - get and set options on sockets
...
RETURN VALUE
...
On error, -1 is returned, and errno is set appropriately
Change-Id: I1a1a05a684dff8672aaf47eabee157ac0d275c2d
Signed-off-by: chao.an <anchao@xiaomi.com>
NOTE: lpwork's priority has been changed from 30 to 60 to avoid an
error when calling getsockname() just after connect() in ftpc.c
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Remove support for the Codesourcery, Atollic, DevKitArm, Raisonance, and CodeRed toolchains. Not only are these tools old and no longer used but they are all equivalent to standard ARM EABI toolchains. Retaining specific support has no effect (they are still supported, but now just as generic EABI toolchains).
First, configure the dmacfg in spi_dmarxsetup and spi_dmatxsetup. Then,
check for dmacapable, and only after that set up the dma.
This way the dmacapable actually works, and we don't need to initialize
the dmacfg structures twice.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
When starting dma transfer, the dcache for the TX buffer should be cleaned.
"flush" performs also invalidate, which is unnecessary. The TX buffer
can be unaligned to the cahche line in some(most) cases, whereas RX buffer
can never be.
The cache for the receive buffer can be dirty and valid before call to exchange.
Thus another memory access (hitting the same cache line) may corrupt receive data
while waiting for transfer to complete. So the receive buffer should be
invalidated before the transfer
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
Modify some comments and debug assertions, which inherit from previous versions
and make no sense. Also add a few nerr printouts to make it easier to debug
running out of buffers
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
