Gustavo Henrique Nihei
4f31c89963
esp32c3-devkit: Rename linker script to indicate use for Flat mode
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-18 11:43:52 +08:00
Gustavo Henrique Nihei
c778f35f08
risc-v/esp32c3: Add support for Protected Mode
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-18 11:43:52 +08:00
Xiang Xiao
5958d3ac62
risc-v: Move "LDFLAGS += -melf32lriscv" from Make.defs to Toolchain.defs
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-16 11:17:08 +03:00
Xiang Xiao
1f920e55d3
Move warning option from Make.defs to Toolchain.defs
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 15:40:35 +03:00
Xiang Xiao
aeb9c5d822
boards: Move -fno-strict-aliasing from Make.defs to Toolchain.defs
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and migrate MAXOPTIMIZATION into ARCHOPTIMIZATION
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 11:36:41 +03:00
Xiang Xiao
b12c0a1e31
boards: Remove -std=c++1x from Make.defs
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let the implementation of standard library choice what they want
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-29 21:08:14 -03:00
Xiang Xiao
8f8ee25a9c
boards: Move -g from Make.defs to Toolchain.defs
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-25 16:23:03 +03:00
Xiang Xiao
75326e563d
boards: Move -fno-common from Make.defs to Toolchain.defs
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-25 07:57:29 +03:00
chao.an
1c8e12406e
compile/opt: add config DEBUG_LINK_MAP
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Selecting this option will pass "-Map=$(TOPDIR)$(DELIM)nuttx.map" to ld
when linking NuttX ELF. That file can be useful for verifying
and debugging magic section games, and for seeing which
pieces of code get eliminated with DEBUG_OPT_UNUSED_SECTIONS.
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-22 01:37:23 +08:00
chao.an
64d7326ed5
compile/opt: add config DEBUG_OPT_UNUSED_SECTIONS
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Enable this option to optimization the unused input sections with the
linker by compiling with " -ffunction-sections -fdata-sections ", and
linking with " --gc-sections ".
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-22 01:37:23 +08:00
Gustavo Henrique Nihei
06d0a9f1ad
xtensa|risc-v: Make CXX exception and RTTI depend on Kconfig options
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
a0617177e8
risc-v/esp32c3: Fix inclusion of C++ constructors/destructors table
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RISC-V GCC is configured with --enable-initfini-array so it emits an
.init_array section instead of .ctors
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-30 11:19:29 +08:00
Xiang Xiao
ee931c137f
boards: Remove -fno-builtin
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it's more efficent to generate the machine code directly if possible
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-10 19:46:01 +02:00
Xiang Xiao
67cda6ce1e
board/esp32: Update esp-wireless-drivers-3rdparty
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and add -fno-common since the symbol duplication is fixed in the new firmware
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-24 09:05:40 +01:00
Xiang Xiao
163fe4ff0b
boards: Replace CONFIG_CYGWIN_WINTOOL with CONVERT_PATH
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 21:15:36 +01:00
Xiang Xiao
1d1bdd85a3
Remove the double blank line from source files
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 20:10:14 +01:00
Alan Rosenthal
8defb843aa
Remove duplicate linker script definitions
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## Summary
A lot of linker scripts were listed twice, once for unix, once for windows.
This PR cleans up the logic so they're only listed once.
## Impact
Any opportunity to use a single source of truth and reduce lines of code is a win!
## Testing
CI will test all build
2022-02-17 02:55:25 +08:00
Huang Qi
0c28fe9831
boards: Remove unused NXFLAT flags from Make.defs
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Since NXFLAT only avaliable on arm.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-01-27 11:08:43 +08:00
Xiang Xiao
c5c50acb93
board: Remove -fstrict-volatile-bitfields
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 16:00:48 +01:00
Xiang Xiao
8bcdefafc9
board: Remove -fno-strength-reduce
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-19 00:14:03 +01:00
Huang Qi
c2e8c92b25
arch/risc-v: Refine Toolchain.defs
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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-28 00:30:10 -06:00
chao.an
cbd82f1c1b
compile/flags: remove redundant -fomit-frame-pointer from board flags
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-27 22:31:27 -06:00
Dong Heng
698f1f76ff
risc-v/esp32c3: Refactor SPI Flash to support umask interrupt when R/W/E SPI Flash
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This can fix BLE assert when erase SPI Flash.
2021-12-06 13:13:11 +09:00
Abdelatif Guettouche
a01cb867ce
esp32c3_rom.ld: Add some of the string.h functions to the linker
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script.
These functions are strongly declared and thus will be used instead of
any other implementation. Furthermore, necessary Kconfig options are
selected to avoid building those function from NuttX's C library.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-13 11:54:42 -03:00
ChenWen
440787c0c1
risc-v/esp32c3: Fix Wi-Fi & BLE coexist issue
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1. Wi-Fi and BLE use common PHY functions.
2. Fix Wi-Fi & BLE coexist adapter error.
3. Update esp-wireless-drivers-3rdparty, provide coexist protection for connection.
2021-11-04 11:02:05 -03:00
Gustavo Henrique Nihei
47e804b167
risc-v/esp32c3: Make BLE adapter code compliant to nxstyle
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-05 08:45:40 -03:00
Abdelatif Guettouche
ee20d0f545
esp32c3_rom.ld: Add a strong declaration to some libgcc function that
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are ROM resident.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-01 10:09:04 -03:00
Gustavo Henrique Nihei
3c63cb522c
risc-v/esp32c3: Enable booting from MCUboot bootloader
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-27 18:22:29 -07:00
Alan C. Assis
099e9fb4f7
boards: Remove -nostartfiles -nodefaultlibs from LDFLAGS
2021-09-13 08:58:25 +08:00
Abdelatif Guettouche
11ed8575cd
boards/rsic-v/esp32c3: Use the common gnu-elf.ld file from binfmt/libelf
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instead of keeping the same file for each board.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-24 08:04:14 -05:00
Abdelatif Guettouche
eb403bc996
boards/riscv/esp32c3: Rename the iram_0_2 segment to irom_0_0 to avoid
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confusions.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-24 07:00:51 -05:00
Abdelatif Guettouche
60da4317b9
arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for
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consistency.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
f54804bafc
arch/risc-v/esp32c3: Create a separate heap for the RTC memory.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
bd0e03fecf
boards/risc-v/esp32c3-devkit/esp32c3.ld: Add the RTC BSS section for
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completeness.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
61f7bc6e2a
boards/risc-v/esp32c3-devkit/scripts: Drop the "iram" in the name of the RTC
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section.
The RTC region is accessed by both I and D buses. The old name of
`rtc_iram_seg` is a bit confusing.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
dd4962b2f8
boards/esp32c3-devkit: Add the necessary flags for loadable modules and
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a module defconfig to test the "module" example.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 18:08:36 -03:00
Abdelatif Guettouche
3b7ae20843
boards/risc-v/esp32c3-devkit: Add an ELF defconfig and the necessary ELF
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flags and linker script to support that.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 18:08:36 -03:00
Dong Heng
76df958e34
riscv/esp32c3: Support SPI Flash encryption read/write
2021-05-23 08:37:25 -03:00
chenwen
16667930cb
risc-v/esp32c3: Support ESP32-C3 PM standby and sleep
2021-05-12 10:15:06 -03:00
Dong Heng
fcd5648bca
riscv/esp32c3: Fix SPI Flash driver internal chip data address error
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"g_rom_flashchip" is not in fixed address between all ESP32-C3's different versions.
2021-04-28 09:58:16 -05:00
Gustavo Henrique Nihei
ba23526e39
boards/esp32c3-devkit: Allocate .noinit in a dedicated section
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Previously it was being allocated into .bss section after the _ebss
address. Although functional, this is not intuitive.
2021-04-28 15:40:49 +01:00
Dong Heng
31854ca135
riscv/esp32c3: Fix heap end address
2021-04-12 01:36:11 -05:00
Alin Jerpelea
3d96d5f2ce
arch: esp32: Mixed Case identifier fix
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Fix Mixed Case Identifier reported by nxstyle
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alan Carvalho de Assis
4f8ff0765f
risc-v/esp32c3: Add SPIFlash support
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Co-Authored-By: Dong Heng <dongheng@espressif.com>
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-26 09:19:25 +01:00
Dong Heng
458caf2732
riscv/esp32c3: Add ESP32-C3 WLAN netcard driver
2021-03-16 10:42:32 -03:00
Gustavo Henrique Nihei
7fe096c65e
risc-v: Fix typos reported by codespell
2021-02-25 16:25:47 +00:00
Abdelatif Guettouche
5562f08369
boards: Add the ESP32-C3 DevKit board
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-18 01:21:53 -08:00