Commit Graph

52216 Commits

Author SHA1 Message Date
raiden00pl
60807efc85 mrf24j40: always use SPI MODE(0,0)
Other SPI modes are not supported. From doc:

  "The MRF24J40 supports SPI (mode 0,0) which requires
  that SCK idles in a low state."
2024-01-28 09:46:16 -08:00
raiden00pl
32df0dbbaa mrf24j40/Kconfig: add missing IEEE802154_MRF24J40_FREQUENCY option 2024-01-28 09:46:16 -08:00
Yanfeng Liu
f69f0674f6 arch/risc-v: add status fields for VS and XS
add defintions for vector extension and additional user-mode
extension fields for MSTATUS and SSTATUS registers.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-28 06:38:25 -08:00
ThomasNS
fff193324d xmc4 ccu4 register map 2024-01-27 20:14:02 -08:00
Yanfeng Liu
bb63f8f36d risc-v/canmv230: add CMake support
Adding CMakeLists.txt files to support CMake build system.
Note that only FLAT build works now due to limitations of current
CMake build system.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-27 00:56:57 -08:00
Benign X
8ba74d06c6 arch/sim: fix X11 compile failed 2024-01-27 00:51:32 -08:00
ThomasNS
26ffb1f568 add xmc4800-relax to nuttx 2024-01-26 19:14:33 -08:00
chenwen@espressif.com
ba1b96e9d9 xtensa/esp32s3: Add DMA peripheral to spi driver configuration
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-01-26 19:14:04 -08:00
yangjian11
b3b8ec35a6 tools/nxstyle: can use ',' in the string when declaring it
Signed-off-by: yangjian11 <yangjian11@xiaomi.com>
2024-01-26 06:12:48 -08:00
chenwen@espressif.com
8bef8ee9d5 xtensa/esp32s3: Fix crash issue that occurs when deleting a semaphore in WPA3
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-01-26 04:45:26 -08:00
wangyongrong
5651612f45 rptun: extract rptun char to rpmsg/rpmsg.c
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-01-26 00:42:28 -08:00
Takeyoshi Kikuchi
8571893435 arm: sama5: sam_serial: fix to compile with "UART Flow control enabled" on SAMA5D2.
SAMA5D2 has UART (TX/RX only) and FLEXCOM USART (with control pins).
UART has only TX/RX, so if I try to use flow control with FLEXCOM USART,
there is no register definition on the UART side and get a compilation error.

Signed-off-by: Takeyoshi Kikuchi <kikuchi@centurysys.co.jp>
2024-01-26 11:25:23 +08:00
Michal Lenc
addfa1c030 samv7: fix QSPI DMA option not showing in menuconfig
Commit 03e5c02 introduced option to have both standard SPI and QSPI
in SPI mode on one system. However this change broke the appearance of
QSPI driver configuration menu entry in menuconfig as it was dependent
on !SAMV7_QSPI_IS_SPI (which is now true for all MCUs having standard
SPI ability in QSPI driver).

This change makes sure the menu is correctly shown when QSPI driver
used.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-01-25 18:19:27 -08:00
raiden00pl
a12fdd8876 cosmetic changes after pci code rebase 2024-01-25 09:09:30 -08:00
raiden00pl
2e758f33ee fix various compilation errors after pci code rebase 2024-01-25 09:09:30 -08:00
raiden00pl
50f7e96e5e boards/x86_64: refresh earlyfb and pcitest configurations 2024-01-25 09:09:30 -08:00
Brennan Ashton
0ed4123326 x86_64: Early framebuffer console
This adds support for creating an early frame buffer and primatives for
writing to this frame buffer as a console. This does require the font
infrastructure as well as multiboot2.

Additionally this can now be used with a UEFI bootloader long as it
boots NuttX via Multiboot2.  There does seem to be a PCI interrupt
issue when running in UEFI mode.

I was able to boot my laptop using this and see PCI devices enumerate.

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

x86_64: Add conditionals around the multiboot framebuffer
2024-01-25 09:09:30 -08:00
Brennan Ashton
69ed5bb67d Various fixes for PCI work
Squashed commits:

1. Porting prior PCI work in place of jailhouse code

At this point the PCI enumeration works for x86_64 including over
pci-pci bridges.

Running QEMU with this configuration we see the bridge and the
device on the bridge.  It also detected the qemu test device

qemu-system-x86_64 \
  -cpu host,+pcid,+x2apic,+tsc-deadline,+xsave,+rdrand \
  --enable-kvm -smp 1 -m 2G -cdrom boot.iso --nographic -no-reboot \
  -device pci-testdev \
  -device pci-bridge,id=bridge0,chassis_nr=2 \
  -device e1000,bus=bridge0,addr=0x3

qemu_pci_init: Initializing PCI Bus
pci_probe_device: [00:00.0] Found 8086:1237, class/revision 06000002
pci_probe_device: [00:01.1] Found 8086:7010, class/revision 01018000
pci_probe_device: [00:01.2] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.3] Found 8086:7113, class/revision 06800003
pci_probe_device: [00:01.4] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.5] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.6] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.7] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:02.0] Found 1234:1111, class/revision 03000002
pci_probe_device: [00:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:04.0] Found 1b36:0005, class/revision 00ff0000
pci_probe_device: [00:04.0] Probing
pci_check_pci_bridge: [00:05.0] Found Bridge
pci_probe_device: [01:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:05.0] Found 1b36:0001, class/revision 06040000

2. Remove unused CONFIG_PCI_MAX_BDF option

3. Add a workaround for Jailhouse pci scanning

4. Extend BAR parsing and handle PIO and MMIO for pci-testdev

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

5. PCI: Add initial support for QEMU 'edu' test device

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

6. Bring up PCI later in boot process

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

7. Add ISR and DMA support to QEMU edu test pci device

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

8. Fix bad function prototype definition in qemu_edu

9. intel64:  Add a pci test configuration and instructions

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

10. PCI: Fix issue in identification of 64bit bar

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2024-01-25 09:09:30 -08:00
Yang Chung-Fan
18f97bf2f8 pcie: add framework
Squashed commits:

1. x86_64: qemu: implement pci-e functions and enumerate pci-e devices on boot

2. virt: add qemu pci-testdev driver

3. pcie: types array should be null terminated

4. pcie: enable don't take flags, hardcoded enabling flags

5. pcie: checking bar > 4 for 64bit bars are sufficient

6. pcie: qemu: remove not used header

7. pcie: qemu: return -EINVAL if buffer argument is NULL

8. pcie: make pcie enumerate routine as common instead of architecture dependent

9. pcie: cosmetic changes to fit check tools

10. pcie: create MSI/MSIX related marcos and simplify the msi/msix routines
2024-01-25 09:09:30 -08:00
wangchen
204f4a18a0 Support to ARP Address Conflict Detection
Support to ARP Address Conflict Detection

Signed-off-by: wangchen <wangchen41@xiaomi.com>
2024-01-25 11:25:03 -03:00
Ville Juven
a188cf3480 mpfs_corespi: Fix firing of stale interrupt after warm reset
After warm reset the interrupt source in the HW block is not explicitly
cleared, thus once the interrupt source is enabled the old / stale interrupt
fires immediately.

This causes a DEBUGASSERT() failure on line 808 mpfs_spi_unload_rx_fifo:
  DEBUGASSERT(nwords > 0);
2024-01-25 11:23:12 -03:00
Tiago Medicci Serrano
c4f76ff867 esp32c3: Fix building native MCUboot from sources
This commit fixes building native MCUboot from sources by getting
the required sources from `esp-hal-3rdparty` repository and enable
building MCUboot and using it as the 2nd stage bootlaoder.
2024-01-25 11:22:39 -03:00
Tiago Medicci Serrano
a2673d3bcd esp32c3: Improve selection of the bootloader being used on Kconfig
- A pre-built IDF bootloader is used by default;
- `ESP32C3_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32C3_PARTITION_TABLE.
2024-01-25 11:22:39 -03:00
Tiago Medicci Serrano
641a0df27f esp32s3: Improve selection of the bootloader being used on Kconfig
- A pre-built IDF bootloader is used by default;
- `ESP32S3_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32S3_PARTITION_TABLE.
2024-01-25 11:22:39 -03:00
Tiago Medicci Serrano
1e1ea7bb5d esp32s2: Improve selection of the bootloader being used on Kconfig
- A pre-built IDF bootloader is used by default;
- `ESP32S2_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32S2_PARTITION_TABLE.
2024-01-25 11:22:39 -03:00
Tiago Medicci Serrano
ec3714c816 esp32: Improve selection of the bootloader being used on Kconfig
- A pre-built IDF bootloader is used by default;
- `ESP32_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32_PARTITION_TABLE.
2024-01-25 11:22:39 -03:00
Tiago Medicci Serrano
7ac14b544e risc-v/espressif: Select simple boot by default for RISC-V
Simple boot is a method of booting that doesn't depend on a 2nd
stage bootloader. Please note that some of the ESP-IDF bootloader
features are not available using simple boot, such as partition
tables and OTA: most of these features are implemented in NuttX
and MCUboot.
2024-01-25 11:22:39 -03:00
Yanfeng Liu
ebef20ee17 docs: revising comments and documents
- spi/slave.h: revise comments in pulic types section
- doc/sim.rst: minor formatting, add ways to escape cu

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-24 23:38:52 -08:00
Michal Lenc
fba4b2593c samv7: refactor DAC driver
This commit refactors DAC driver. The functionality remains the same
but driver start up is now done in dac_setup (after application called
open function) instead of sam_dac_initialize (called from BSP). This
ensures that driver does not take resources (timer, interrupt) until
opened. Implementation of dac_shutdown is also provided, therefore
the driver frees resources once closed.

This change is consistent with other drivers implementation.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-01-24 18:46:33 -08:00
wangyongrong
5018964155 rpmsgfs: decoupling rpmsgfs server and rpmsg virtio.
create a new general api to make rpmsgfs work with virtio/spi/uart transport.

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-01-24 06:52:13 -08:00
xuchaojie
cefb170ea7 bcmf_driver:wlan interface status reset by unsolicited wpa packet
Avoid incorrect NIC flag Settings

Signed-off-by: xuchaojie <xuchaojie@xiaomi.com>
2024-01-24 20:18:40 +08:00
Michal Lenc
55ec92e181 samv7: add support for SPI mode in USART peripheral
USART peripheral can work in SPI mode as well. This commit adds support
for such functionality. Only 1 slave device is supported by the
peripheral therefore board level does not have to ensure correct CS
setup.

The usage of the peripheral is the same as with other SPI drivers.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-01-23 17:16:35 -03:00
chenwen@espressif.com
bdd02cc624 xtensa/esp32s3: Add APIs to release DMA channel resources
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-01-23 17:16:16 -03:00
Michal Lenc
22110b3b83 ioexpander: add support for iC-JX expander
This commit adds basic support for iC-JX expander in SPI mode. The
expander is functional and supports both input and output pins. Further
expander functionalities (filtering, adc, interrupt support) are not
yet implemented.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-01-23 17:15:25 -03:00
Almir Okato
f8b0b06b97 esp32c3-generic: add simple boot support
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.

This commit also makes this bootloader configuration as default
for esp32c3-generic target and removes the need for running
'make bootloader' command for it.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-01-23 04:09:25 -08:00
w2016561536
6b5ca79509 esp32s3/spi-dma: Fix spi dma transfer.
Fix esp32s3 spi dma transfer only transmit first byte and receive empty problem.
2024-01-23 04:05:52 -08:00
Lee Lup Yuen
62c358946d risc-v/bl808: Flush MMU Cache after updating SATP
Ox64 BL808 crashes with a Page Fault when we run `getprime` then `hello`. This is caused by the T-Head C906 MMU incorrectly accessing the MMU Page Tables of the Previous Process (`getprime`) while starting the New Process (`hello`).

To fix the problem, this PR flushes the MMU Cache whenever we point the MMU SATP Register to the New Page Tables. We execute 2 RISC-V Instructions that are specific to T-Head C906:

- DCACHE.IALL: Invalidate all Page Table Entries in the D-Cache
- SYNC.S: Ensure that all Cache Operations are completed

This is derived from the T-Head Errata for Linux Kernel. More details here: https://lupyuen.github.io/articles/mmu#appendix-flush-the-mmu-cache-for-t-head-c906

Modified Files:

- `arch/risc-v/src/common/riscv_mmu.h`: If needed, `mmu_write_satp()` calls `mmu_flush_cache()` (weak function) to flush the MMU Cache. (Like for T-Head C906)

- `arch/risc-v/src/bl808/bl808_mm_init.c`: Flush the MMU Cache for T-Head C906. Extend `mmuflags` from 32-bit to 64-bit to be consistent with `mmu_ln_setentry()`.

- `boards/risc-v/bl808/ox64/configs/nsh/defconfig`: Enable `ostest` in the Build Config. Update `CONFIG_BOARD_LOOPSPERMSEC` according to `calib_udelay`.
2024-01-23 01:25:20 -08:00
Yanfeng Liu
cba993df85 risc-v/cmake: add support to Ubuntu stock toolchain
Ubuntu stock toolchain `gcc-riscv64-unknown-elf` complains about
current CMake system (see issue#11573). This tries to fix it so
that both newer XPack and stock toolchains can be used with CMake.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-23 01:23:44 -08:00
Masayuki Ishikawa
78d22b997c boards: rv-virt: Fix the hello app crash with nsh64
Summary:
- I noticed that the hello app crashes due to
  https://github.com/apache/nuttx/pull/11576
- This is a tentative fix to avoid the crash

Impact:
- None

Testing:
- Tested with qemu-8.2.0

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2024-01-22 23:18:43 -08:00
David Sidrane
6c186b6084 stm32h7:serial make TX DMA busy when there are an outstanding transaction
If a TX DMA completion interrups a forground write.
    The TX DMA completion can start a dma_send and it will
    then followed by the forground write's dma_send
    stoping the,then in progress DMA.

    By atomicaly marking the tx dma busy, the forground
    write will not perform the dma_send, and will only
    enqueue the data. At the next TX dma completion any
    data pending in the tx queue will be sent
2024-01-22 06:06:01 -08:00
ThomasNS
1c28bf2ed1 fix typo: it is P4.0 and not P0.4 2024-01-22 05:46:33 -08:00
YAMAMOTO Takashi
81996900db fix build with CONFIG_SCHED_INSTRUMENTATION_FUNCTION 2024-01-22 19:30:40 +08:00
dependabot[bot]
2ec36fa7bd build(deps): bump actions/cache from 3 to 4
Bumps [actions/cache](https://github.com/actions/cache) from 3 to 4.
- [Release notes](https://github.com/actions/cache/releases)
- [Changelog](https://github.com/actions/cache/blob/main/RELEASES.md)
- [Commits](https://github.com/actions/cache/compare/v3...v4)

---
updated-dependencies:
- dependency-name: actions/cache
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>
2024-01-22 01:42:03 -08:00
Yanfeng Liu
b46ee08230 rv-virt/configs: avoid build errors
- disable NSH_SYMTAB to avoid build errors with cmake.
- enable LIBM to avoid build errors with Ubuntu stock
  gcc-riscv64-unknown-elf toolchain.
- use HELLO=y for easy use within qemu console.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-22 08:18:04 +01:00
Tiago Medicci Serrano
282feec9a3 esp32-devkitc/mcuboot_update_agent: Update defconfig
Espressif's MCUboot should be built from sources.
2024-01-21 06:33:25 -08:00
Tiago Medicci Serrano
0ecc3aaad2 esp32: Explicitly fail on boot-up for unsupported ESP32 versions.
ESP32 is supported on NuttX starting from chip revision 3.0. This,
however, didn't prevent the user from using older chip revisions,
which caused unexpected behaviors. This commit checks chip revision
before finishing booting NuttX.
2024-01-21 06:33:25 -08:00
Tiago Medicci Serrano
2954551ef6 esp32/hardware/esp32_efuse.h: Update macros for registers.
This commit is intended to update the EFUSE's register content and
update related configs:
 - Remove duplicated configs from `esp32_soc.h`;
 - Add missing header files from APB registers;
 - Add missing macro definitions from EFUSE;
 - Update related code to use the new macros;
2024-01-21 06:33:25 -08:00
Tiago Medicci Serrano
8752e6d863 esp32/hardware: Rename efuse_reg.h to esp32_efuse.h. 2024-01-21 06:33:25 -08:00
fangxinyong
5d40882d4c Documentation: update doc for etc romfs
as apache/nuttx#11498, need update documentation for etc romfs,
that mount etc romfs from nsh to sched/init.
2024-01-21 06:11:46 -08:00
raiden00pl
2ff700de92 Documentation: migrate x86_64 readme to rst 2024-01-21 06:11:18 -08:00